process.cc revision 12441:ece14e2e8c0a 
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Gabe Black
29 *          Ali Saidi
30 *          Korey Sewell
31 */
32
33#include "arch/mips/process.hh"
34
35#include "arch/mips/isa_traits.hh"
36#include "base/loader/elf_object.hh"
37#include "base/loader/object_file.hh"
38#include "base/logging.hh"
39#include "cpu/thread_context.hh"
40#include "debug/Loader.hh"
41#include "mem/page_table.hh"
42#include "params/Process.hh"
43#include "sim/aux_vector.hh"
44#include "sim/process.hh"
45#include "sim/process_impl.hh"
46#include "sim/syscall_return.hh"
47#include "sim/system.hh"
48
49using namespace std;
50using namespace MipsISA;
51
52MipsProcess::MipsProcess(ProcessParams *params, ObjectFile *objFile)
53    : Process(params, new FuncPageTable(params->name, params->pid, PageBytes),
54              objFile)
55{
56    fatal_if(params->useArchPT, "Arch page tables not implemented.");
57    // Set up stack. On MIPS, stack starts at the top of kuseg
58    // user address space. MIPS stack grows down from here
59    Addr stack_base = 0x7FFFFFFF;
60
61    Addr max_stack_size = 8 * 1024 * 1024;
62
63    // Set pointer for next thread stack.  Reserve 8M for main stack.
64    Addr next_thread_stack_base = stack_base - max_stack_size;
65
66    // Set up break point (Top of Heap)
67    Addr brk_point = objFile->dataBase() + objFile->dataSize() +
68                     objFile->bssSize();
69    brk_point = roundUp(brk_point, PageBytes);
70
71    // Set up region for mmaps.  Start it 1GB above the top of the heap.
72    Addr mmap_end = brk_point + 0x40000000L;
73
74    memState = make_shared<MemState>(brk_point, stack_base, max_stack_size,
75                                     next_thread_stack_base, mmap_end);
76}
77
78void
79MipsProcess::initState()
80{
81    Process::initState();
82
83    argsInit<uint32_t>(PageBytes);
84}
85
86template<class IntType>
87void
88MipsProcess::argsInit(int pageSize)
89{
90    int intSize = sizeof(IntType);
91
92    // Patch the ld_bias for dynamic executables.
93    updateBias();
94
95    // load object file into target memory
96    objFile->loadSections(initVirtMem);
97
98    typedef AuxVector<IntType> auxv_t;
99    std::vector<auxv_t> auxv;
100
101    ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
102    if (elfObject)
103    {
104        // Set the system page size
105        auxv.push_back(auxv_t(M5_AT_PAGESZ, MipsISA::PageBytes));
106        // Set the frequency at which time() increments
107        auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
108        // For statically linked executables, this is the virtual
109        // address of the program header tables if they appear in the
110        // executable image.
111        auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
112        DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable());
113        // This is the size of a program header entry from the elf file.
114        auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
115        // This is the number of program headers from the original elf file.
116        auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
117        // This is the base address of the ELF interpreter; it should be
118        // zero for static executables or contain the base address for
119        // dynamic executables.
120        auxv.push_back(auxv_t(M5_AT_BASE, getBias()));
121        //The entry point to the program
122        auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
123        //Different user and group IDs
124        auxv.push_back(auxv_t(M5_AT_UID, uid()));
125        auxv.push_back(auxv_t(M5_AT_EUID, euid()));
126        auxv.push_back(auxv_t(M5_AT_GID, gid()));
127        auxv.push_back(auxv_t(M5_AT_EGID, egid()));
128    }
129
130    // Calculate how much space we need for arg & env & auxv arrays.
131    int argv_array_size = intSize * (argv.size() + 1);
132    int envp_array_size = intSize * (envp.size() + 1);
133    int auxv_array_size = intSize * 2 * (auxv.size() + 1);
134
135    int arg_data_size = 0;
136    for (vector<string>::size_type i = 0; i < argv.size(); ++i) {
137        arg_data_size += argv[i].size() + 1;
138    }
139    int env_data_size = 0;
140    for (vector<string>::size_type i = 0; i < envp.size(); ++i) {
141        env_data_size += envp[i].size() + 1;
142    }
143
144    int space_needed =
145        argv_array_size +
146        envp_array_size +
147        auxv_array_size +
148        arg_data_size +
149        env_data_size;
150
151    // set bottom of stack
152    memState->setStackMin(memState->getStackBase() - space_needed);
153    // align it
154    memState->setStackMin(roundDown(memState->getStackMin(), pageSize));
155    memState->setStackSize(memState->getStackBase() - memState->getStackMin());
156    // map memory
157    allocateMem(memState->getStackMin(), roundUp(memState->getStackSize(),
158                pageSize));
159
160    // map out initial stack contents; leave room for argc
161    IntType argv_array_base = memState->getStackMin() + intSize;
162    IntType envp_array_base = argv_array_base + argv_array_size;
163    IntType auxv_array_base = envp_array_base + envp_array_size;
164    IntType arg_data_base = auxv_array_base + auxv_array_size;
165    IntType env_data_base = arg_data_base + arg_data_size;
166
167    // write contents to stack
168    IntType argc = argv.size();
169
170    argc = htog((IntType)argc);
171
172    initVirtMem.writeBlob(memState->getStackMin(), (uint8_t*)&argc, intSize);
173
174    copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
175
176    copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
177
178    // Copy the aux vector
179    for (typename vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) {
180        initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
181                (uint8_t*)&(auxv[x].a_type), intSize);
182        initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
183                (uint8_t*)&(auxv[x].a_val), intSize);
184    }
185
186    // Write out the terminating zeroed auxilliary vector
187    for (unsigned i = 0; i < 2; i++) {
188        const IntType zero = 0;
189        const Addr addr = auxv_array_base + 2 * intSize * (auxv.size() + i);
190        initVirtMem.writeBlob(addr, (uint8_t*)&zero, intSize);
191    }
192
193    ThreadContext *tc = system->getThreadContext(contextIds[0]);
194
195    setSyscallArg(tc, 0, argc);
196    setSyscallArg(tc, 1, argv_array_base);
197    tc->setIntReg(StackPointerReg, memState->getStackMin());
198
199    tc->pcState(getStartPC());
200}
201
202
203MipsISA::IntReg
204MipsProcess::getSyscallArg(ThreadContext *tc, int &i)
205{
206    assert(i < 6);
207    return tc->readIntReg(FirstArgumentReg + i++);
208}
209
210void
211MipsProcess::setSyscallArg(ThreadContext *tc, int i, MipsISA::IntReg val)
212{
213    assert(i < 6);
214    tc->setIntReg(FirstArgumentReg + i, val);
215}
216
217void
218MipsProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
219{
220    if (sysret.successful()) {
221        // no error
222        tc->setIntReg(SyscallSuccessReg, 0);
223        tc->setIntReg(ReturnValueReg, sysret.returnValue());
224    } else {
225        // got an error, return details
226        tc->setIntReg(SyscallSuccessReg, (IntReg) -1);
227        tc->setIntReg(ReturnValueReg, sysret.errnoValue());
228    }
229}
230