process.cc revision 11704
16691Stjones1@inf.ed.ac.uk/*
26691Stjones1@inf.ed.ac.uk * Copyright (c) 2004-2005 The Regents of The University of Michigan
36691Stjones1@inf.ed.ac.uk * All rights reserved.
46691Stjones1@inf.ed.ac.uk *
56691Stjones1@inf.ed.ac.uk * Redistribution and use in source and binary forms, with or without
66691Stjones1@inf.ed.ac.uk * modification, are permitted provided that the following conditions are
76691Stjones1@inf.ed.ac.uk * met: redistributions of source code must retain the above copyright
86691Stjones1@inf.ed.ac.uk * notice, this list of conditions and the following disclaimer;
96691Stjones1@inf.ed.ac.uk * redistributions in binary form must reproduce the above copyright
106691Stjones1@inf.ed.ac.uk * notice, this list of conditions and the following disclaimer in the
116691Stjones1@inf.ed.ac.uk * documentation and/or other materials provided with the distribution;
126691Stjones1@inf.ed.ac.uk * neither the name of the copyright holders nor the names of its
136691Stjones1@inf.ed.ac.uk * contributors may be used to endorse or promote products derived from
146691Stjones1@inf.ed.ac.uk * this software without specific prior written permission.
156691Stjones1@inf.ed.ac.uk *
166691Stjones1@inf.ed.ac.uk * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
176691Stjones1@inf.ed.ac.uk * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
186691Stjones1@inf.ed.ac.uk * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
196691Stjones1@inf.ed.ac.uk * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
206691Stjones1@inf.ed.ac.uk * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
216691Stjones1@inf.ed.ac.uk * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
226691Stjones1@inf.ed.ac.uk * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
236691Stjones1@inf.ed.ac.uk * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
246691Stjones1@inf.ed.ac.uk * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
256691Stjones1@inf.ed.ac.uk * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
266691Stjones1@inf.ed.ac.uk * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
276691Stjones1@inf.ed.ac.uk *
286691Stjones1@inf.ed.ac.uk * Authors: Gabe Black
296691Stjones1@inf.ed.ac.uk *          Ali Saidi
306691Stjones1@inf.ed.ac.uk *          Korey Sewell
316691Stjones1@inf.ed.ac.uk */
326691Stjones1@inf.ed.ac.uk
336691Stjones1@inf.ed.ac.uk#include "arch/mips/isa_traits.hh"
346691Stjones1@inf.ed.ac.uk#include "arch/mips/process.hh"
356691Stjones1@inf.ed.ac.uk#include "base/loader/elf_object.hh"
366691Stjones1@inf.ed.ac.uk#include "base/loader/object_file.hh"
376691Stjones1@inf.ed.ac.uk#include "base/misc.hh"
386691Stjones1@inf.ed.ac.uk#include "cpu/thread_context.hh"
396691Stjones1@inf.ed.ac.uk#include "debug/Loader.hh"
406691Stjones1@inf.ed.ac.uk#include "mem/page_table.hh"
416691Stjones1@inf.ed.ac.uk#include "sim/process.hh"
426691Stjones1@inf.ed.ac.uk#include "sim/process_impl.hh"
438229Snate@binkert.org#include "sim/system.hh"
446691Stjones1@inf.ed.ac.uk
456691Stjones1@inf.ed.ac.ukusing namespace std;
466691Stjones1@inf.ed.ac.ukusing namespace MipsISA;
476691Stjones1@inf.ed.ac.uk
486691Stjones1@inf.ed.ac.ukMipsLiveProcess::MipsLiveProcess(LiveProcessParams * params,
496691Stjones1@inf.ed.ac.uk        ObjectFile *objFile)
506691Stjones1@inf.ed.ac.uk    : LiveProcess(params, objFile)
516691Stjones1@inf.ed.ac.uk{
526691Stjones1@inf.ed.ac.uk    // Set up stack. On MIPS, stack starts at the top of kuseg
536691Stjones1@inf.ed.ac.uk    // user address space. MIPS stack grows down from here
546691Stjones1@inf.ed.ac.uk    stack_base = 0x7FFFFFFF;
556691Stjones1@inf.ed.ac.uk
566691Stjones1@inf.ed.ac.uk    // Set pointer for next thread stack.  Reserve 8M for main stack.
576691Stjones1@inf.ed.ac.uk    next_thread_stack_base = stack_base - (8 * 1024 * 1024);
586691Stjones1@inf.ed.ac.uk
596691Stjones1@inf.ed.ac.uk    // Set up break point (Top of Heap)
606691Stjones1@inf.ed.ac.uk    brk_point = objFile->dataBase() + objFile->dataSize() + objFile->bssSize();
616691Stjones1@inf.ed.ac.uk    brk_point = roundUp(brk_point, PageBytes);
626691Stjones1@inf.ed.ac.uk
636691Stjones1@inf.ed.ac.uk    // Set up region for mmaps.  Start it 1GB above the top of the heap.
646691Stjones1@inf.ed.ac.uk    mmap_end = brk_point + 0x40000000L;
6510558Salexandru.dutu@amd.com}
6610558Salexandru.dutu@amd.com
676691Stjones1@inf.ed.ac.ukvoid
686691Stjones1@inf.ed.ac.ukMipsLiveProcess::initState()
6910558Salexandru.dutu@amd.com{
7010558Salexandru.dutu@amd.com    LiveProcess::initState();
7110558Salexandru.dutu@amd.com
726691Stjones1@inf.ed.ac.uk    argsInit<uint32_t>(PageBytes);
736691Stjones1@inf.ed.ac.uk}
746691Stjones1@inf.ed.ac.uk
756691Stjones1@inf.ed.ac.uktemplate<class IntType>
766691Stjones1@inf.ed.ac.ukvoid
776691Stjones1@inf.ed.ac.ukMipsLiveProcess::argsInit(int pageSize)
786691Stjones1@inf.ed.ac.uk{
796691Stjones1@inf.ed.ac.uk    int intSize = sizeof(IntType);
806691Stjones1@inf.ed.ac.uk
816691Stjones1@inf.ed.ac.uk    // Patch the ld_bias for dynamic executables.
826691Stjones1@inf.ed.ac.uk    updateBias();
836691Stjones1@inf.ed.ac.uk
846691Stjones1@inf.ed.ac.uk    // load object file into target memory
856691Stjones1@inf.ed.ac.uk    objFile->loadSections(initVirtMem);
866691Stjones1@inf.ed.ac.uk
876691Stjones1@inf.ed.ac.uk    typedef AuxVector<IntType> auxv_t;
886691Stjones1@inf.ed.ac.uk    std::vector<auxv_t> auxv;
896691Stjones1@inf.ed.ac.uk
906691Stjones1@inf.ed.ac.uk    ElfObject * elfObject = dynamic_cast<ElfObject *>(objFile);
916691Stjones1@inf.ed.ac.uk    if (elfObject)
926691Stjones1@inf.ed.ac.uk    {
936691Stjones1@inf.ed.ac.uk        // Set the system page size
946691Stjones1@inf.ed.ac.uk        auxv.push_back(auxv_t(M5_AT_PAGESZ, MipsISA::PageBytes));
956691Stjones1@inf.ed.ac.uk        // Set the frequency at which time() increments
966691Stjones1@inf.ed.ac.uk        auxv.push_back(auxv_t(M5_AT_CLKTCK, 100));
976691Stjones1@inf.ed.ac.uk        // For statically linked executables, this is the virtual
986691Stjones1@inf.ed.ac.uk        // address of the program header tables if they appear in the
996691Stjones1@inf.ed.ac.uk        // executable image.
1006691Stjones1@inf.ed.ac.uk        auxv.push_back(auxv_t(M5_AT_PHDR, elfObject->programHeaderTable()));
1016691Stjones1@inf.ed.ac.uk        DPRINTF(Loader, "auxv at PHDR %08p\n", elfObject->programHeaderTable());
1026691Stjones1@inf.ed.ac.uk        // This is the size of a program header entry from the elf file.
1036691Stjones1@inf.ed.ac.uk        auxv.push_back(auxv_t(M5_AT_PHENT, elfObject->programHeaderSize()));
1046691Stjones1@inf.ed.ac.uk        // This is the number of program headers from the original elf file.
1056691Stjones1@inf.ed.ac.uk        auxv.push_back(auxv_t(M5_AT_PHNUM, elfObject->programHeaderCount()));
1066691Stjones1@inf.ed.ac.uk        // This is the base address of the ELF interpreter; it should be
1076691Stjones1@inf.ed.ac.uk        // zero for static executables or contain the base address for
1086691Stjones1@inf.ed.ac.uk        // dynamic executables.
1096691Stjones1@inf.ed.ac.uk        auxv.push_back(auxv_t(M5_AT_BASE, getBias()));
1106691Stjones1@inf.ed.ac.uk        //The entry point to the program
1116691Stjones1@inf.ed.ac.uk        auxv.push_back(auxv_t(M5_AT_ENTRY, objFile->entryPoint()));
1126691Stjones1@inf.ed.ac.uk        //Different user and group IDs
1136691Stjones1@inf.ed.ac.uk        auxv.push_back(auxv_t(M5_AT_UID, uid()));
1146691Stjones1@inf.ed.ac.uk        auxv.push_back(auxv_t(M5_AT_EUID, euid()));
1156691Stjones1@inf.ed.ac.uk        auxv.push_back(auxv_t(M5_AT_GID, gid()));
1166691Stjones1@inf.ed.ac.uk        auxv.push_back(auxv_t(M5_AT_EGID, egid()));
1176691Stjones1@inf.ed.ac.uk    }
1186691Stjones1@inf.ed.ac.uk
1196691Stjones1@inf.ed.ac.uk    // Calculate how much space we need for arg & env & auxv arrays.
1206691Stjones1@inf.ed.ac.uk    int argv_array_size = intSize * (argv.size() + 1);
1216691Stjones1@inf.ed.ac.uk    int envp_array_size = intSize * (envp.size() + 1);
1226691Stjones1@inf.ed.ac.uk    int auxv_array_size = intSize * 2 * (auxv.size() + 1);
1236691Stjones1@inf.ed.ac.uk
1246691Stjones1@inf.ed.ac.uk    int arg_data_size = 0;
1256691Stjones1@inf.ed.ac.uk    for (vector<string>::size_type i = 0; i < argv.size(); ++i) {
1266691Stjones1@inf.ed.ac.uk        arg_data_size += argv[i].size() + 1;
1276691Stjones1@inf.ed.ac.uk    }
1286691Stjones1@inf.ed.ac.uk    int env_data_size = 0;
1296691Stjones1@inf.ed.ac.uk    for (vector<string>::size_type i = 0; i < envp.size(); ++i) {
1306691Stjones1@inf.ed.ac.uk        env_data_size += envp[i].size() + 1;
1316691Stjones1@inf.ed.ac.uk    }
1326691Stjones1@inf.ed.ac.uk
1336691Stjones1@inf.ed.ac.uk    int space_needed =
1346691Stjones1@inf.ed.ac.uk        argv_array_size +
1356691Stjones1@inf.ed.ac.uk        envp_array_size +
13610194SGeoffrey.Blake@arm.com        auxv_array_size +
13710194SGeoffrey.Blake@arm.com        arg_data_size +
1386691Stjones1@inf.ed.ac.uk        env_data_size;
1396691Stjones1@inf.ed.ac.uk
1406691Stjones1@inf.ed.ac.uk    // set bottom of stack
1416691Stjones1@inf.ed.ac.uk    stack_min = stack_base - space_needed;
1426691Stjones1@inf.ed.ac.uk    // align it
1436691Stjones1@inf.ed.ac.uk    stack_min = roundDown(stack_min, pageSize);
1446691Stjones1@inf.ed.ac.uk    stack_size = stack_base - stack_min;
1456691Stjones1@inf.ed.ac.uk    // map memory
1466691Stjones1@inf.ed.ac.uk    allocateMem(stack_min, roundUp(stack_size, pageSize));
1476691Stjones1@inf.ed.ac.uk
1486691Stjones1@inf.ed.ac.uk    // map out initial stack contents
1496691Stjones1@inf.ed.ac.uk    IntType argv_array_base = stack_min + intSize; // room for argc
1506691Stjones1@inf.ed.ac.uk    IntType envp_array_base = argv_array_base + argv_array_size;
1516691Stjones1@inf.ed.ac.uk    IntType auxv_array_base = envp_array_base + envp_array_size;
1526691Stjones1@inf.ed.ac.uk    IntType arg_data_base = auxv_array_base + auxv_array_size;
1536691Stjones1@inf.ed.ac.uk    IntType env_data_base = arg_data_base + arg_data_size;
1546691Stjones1@inf.ed.ac.uk
1556691Stjones1@inf.ed.ac.uk    // write contents to stack
1566691Stjones1@inf.ed.ac.uk    IntType argc = argv.size();
1576691Stjones1@inf.ed.ac.uk
1586691Stjones1@inf.ed.ac.uk    argc = htog((IntType)argc);
1596691Stjones1@inf.ed.ac.uk
1606691Stjones1@inf.ed.ac.uk    initVirtMem.writeBlob(stack_min, (uint8_t*)&argc, intSize);
1616691Stjones1@inf.ed.ac.uk
1626691Stjones1@inf.ed.ac.uk    copyStringArray(argv, argv_array_base, arg_data_base, initVirtMem);
1636972Stjones1@inf.ed.ac.uk
1646972Stjones1@inf.ed.ac.uk    copyStringArray(envp, envp_array_base, env_data_base, initVirtMem);
1656691Stjones1@inf.ed.ac.uk
1666691Stjones1@inf.ed.ac.uk    // Copy the aux vector
1676691Stjones1@inf.ed.ac.uk    for (typename vector<auxv_t>::size_type x = 0; x < auxv.size(); x++) {
1688888Sgeoffrey.blake@arm.com        initVirtMem.writeBlob(auxv_array_base + x * 2 * intSize,
1698888Sgeoffrey.blake@arm.com                (uint8_t*)&(auxv[x].a_type), intSize);
1708888Sgeoffrey.blake@arm.com        initVirtMem.writeBlob(auxv_array_base + (x * 2 + 1) * intSize,
1718888Sgeoffrey.blake@arm.com                (uint8_t*)&(auxv[x].a_val), intSize);
1729738Sandreas@sandberg.pp.se    }
1736691Stjones1@inf.ed.ac.uk
1746691Stjones1@inf.ed.ac.uk    // Write out the terminating zeroed auxilliary vector
1756691Stjones1@inf.ed.ac.uk    for (unsigned i = 0; i < 2; i++) {
1766691Stjones1@inf.ed.ac.uk        const IntType zero = 0;
1776691Stjones1@inf.ed.ac.uk        const Addr addr = auxv_array_base + 2 * intSize * (auxv.size() + i);
1786691Stjones1@inf.ed.ac.uk        initVirtMem.writeBlob(addr, (uint8_t*)&zero, intSize);
1796691Stjones1@inf.ed.ac.uk    }
1807811Ssteve.reinhardt@amd.com
1816691Stjones1@inf.ed.ac.uk    ThreadContext *tc = system->getThreadContext(contextIds[0]);
1826691Stjones1@inf.ed.ac.uk
183    setSyscallArg(tc, 0, argc);
184    setSyscallArg(tc, 1, argv_array_base);
185    tc->setIntReg(StackPointerReg, stack_min);
186
187    tc->pcState(getStartPC());
188}
189
190
191MipsISA::IntReg
192MipsLiveProcess::getSyscallArg(ThreadContext *tc, int &i)
193{
194    assert(i < 6);
195    return tc->readIntReg(FirstArgumentReg + i++);
196}
197
198void
199MipsLiveProcess::setSyscallArg(ThreadContext *tc,
200        int i, MipsISA::IntReg val)
201{
202    assert(i < 6);
203    tc->setIntReg(FirstArgumentReg + i, val);
204}
205
206void
207MipsLiveProcess::setSyscallReturn(ThreadContext *tc, SyscallReturn sysret)
208{
209    if (sysret.successful()) {
210        // no error
211        tc->setIntReg(SyscallSuccessReg, 0);
212        tc->setIntReg(ReturnValueReg, sysret.returnValue());
213    } else {
214        // got an error, return details
215        tc->setIntReg(SyscallSuccessReg, (IntReg) -1);
216        tc->setIntReg(ReturnValueReg, sysret.errnoValue());
217    }
218}
219