includes.isa revision 5222:bb733a878f85 
1// -*- mode:c++ -*-
2
3// Copyright .AN) 2007 MIPS Technologies, Inc.  All Rights Reserved
4
5//  This software is part of the M5 simulator.
6
7//  THIS IS A LEGAL AGREEMENT.  BY DOWNLOADING, USING, COPYING, CREATING
8//  DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
9//  TO THESE TERMS AND CONDITIONS.
10
11//  Permission is granted to use, copy, create derivative works and
12//  distribute this software and such derivative works for any purpose,
13//  so long as (1) the copyright notice above, this grant of permission,
14//  and the disclaimer below appear in all copies and derivative works
15//  made, (2) the copyright notice above is augmented as appropriate to
16//  reflect the addition of any new copyrightable work in a derivative
17//  work (e.g., Copyright .AN) <Publication Year> Copyright Owner), and (3)
18//  the name of MIPS Technologies, Inc. ($B!H(BMIPS$B!I(B) is not used in any
19//  advertising or publicity pertaining to the use or distribution of
20//  this software without specific, written prior authorization.
21
22//  THIS SOFTWARE IS PROVIDED $B!H(BAS IS.$B!I(B  MIPS MAKES NO WARRANTIES AND
23//  DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
24//  OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
25//  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
26//  NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
27//  IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
28//  INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
29//  ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
30//  THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
31//  IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
32//  STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
33//  POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
34
35//Authors: Korey L. Sewell
36
37////////////////////////////////////////////////////////////////////
38//
39// Output include file directives.
40//
41
42output header {{
43#include <sstream>
44#include <iostream>
45#include <iomanip>
46
47#include "arch/mips/isa_traits.hh"
48#include "cpu/static_inst.hh"
49#include "mem/packet.hh"
50}};
51
52output decoder {{
53#include "arch/mips/isa_traits.hh"
54#include "base/cprintf.hh"
55#include "base/loader/symtab.hh"
56#include "cpu/thread_context.hh"
57#include "arch/mips/faults.hh"
58#include "arch/mips/isa_traits.hh"
59#include "arch/mips/pra_constants.hh"
60#include "arch/mips/dt_constants.hh"
61#include "arch/mips/mt_constants.hh"
62#include "arch/mips/utility.hh"
63#include "arch/mips/dsp.hh"
64#include "mem/packet.hh"
65
66#include <math.h>
67#if defined(linux)
68#include <fenv.h>
69#endif
70
71using namespace MipsISA;
72}};
73
74output exec {{
75#include "arch/mips/faults.hh"
76#include "arch/mips/isa_traits.hh"
77#include "arch/mips/utility.hh"
78#include "arch/mips/dsp.hh"
79#include "arch/mips/pra_constants.hh"
80#include "arch/mips/dt_constants.hh"
81#include "arch/mips/mt_constants.hh"
82
83#include <math.h>
84#if defined(linux)
85#include <fenv.h>
86#endif
87
88#include "cpu/base.hh"
89#include "cpu/exetrace.hh"
90
91#include "mem/packet.hh"
92#include "mem/packet_access.hh"
93
94#include "sim/sim_exit.hh"
95#include "sim/eventq.hh"
96#include "sim/sim_events.hh"
97
98using namespace MipsISA;
99}};
100
101