util.isa revision 5268:5bfc53fe60e7 
1// -*- mode:c++ -*-
2
3// Copyright (c) 2003-2005 The Regents of The University of Michigan
4// Copyright (c) 2007 MIPS Technologies, Inc.
5// All rights reserved.
6//
7// Redistribution and use in source and binary forms, with or without
8// modification, are permitted provided that the following conditions are
9// met: redistributions of source code must retain the above copyright
10// notice, this list of conditions and the following disclaimer;
11// redistributions in binary form must reproduce the above copyright
12// notice, this list of conditions and the following disclaimer in the
13// documentation and/or other materials provided with the distribution;
14// neither the name of the copyright holders nor the names of its
15// contributors may be used to endorse or promote products derived from
16// this software without specific prior written permission.
17//
18// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
19// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
20// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
21// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
22// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
23// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
24// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
28// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29//
30// Authors: Steve Reinhardt
31//          Korey Sewell
32
33let {{
34def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
35                  postacc_code = '', base_class = 'Memory',
36                  decode_template = BasicDecode, exec_template_base = ''):
37    # Make sure flags are in lists (convert to lists if not).
38    mem_flags = makeList(mem_flags)
39    inst_flags = makeList(inst_flags)
40
41    # add hook to get effective addresses into execution trace output.
42    ea_code += '\nif (traceData) { traceData->setAddr(EA); }\n'
43
44    # Some CPU models execute the memory operation as an atomic unit,
45    # while others want to separate them into an effective address
46    # computation and a memory access operation.  As a result, we need
47    # to generate three StaticInst objects.  Note that the latter two
48    # are nested inside the larger "atomic" one.
49
50    # Generate InstObjParams for each of the three objects.  Note that
51    # they differ only in the set of code objects contained (which in
52    # turn affects the object's overall operand list).
53    iop = InstObjParams(name, Name, base_class,
54                        { 'ea_code':ea_code, 'memacc_code':memacc_code, 'postacc_code':postacc_code },
55                        inst_flags)
56    ea_iop = InstObjParams(name, Name, base_class,
57                        { 'ea_code':ea_code },
58                        inst_flags)
59    memacc_iop = InstObjParams(name, Name, base_class,
60                        { 'memacc_code':memacc_code, 'postacc_code':postacc_code },
61                        inst_flags)
62
63    if mem_flags:
64        s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
65        iop.constructor += s
66        memacc_iop.constructor += s
67
68    # select templates
69
70    # The InitiateAcc template is the same for StoreCond templates as the
71    # corresponding Store template..
72    StoreCondInitiateAcc = StoreInitiateAcc
73
74    memAccExecTemplate = eval(exec_template_base + 'MemAccExecute')
75    fullExecTemplate = eval(exec_template_base + 'Execute')
76    initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
77    completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
78    eaCompExecuteTemplate = eval('EACompExecute')
79
80    if (exec_template_base == 'Load' or exec_template_base == 'Store'):
81      memAccSizeTemplate = eval('LoadStoreMemAccSize')
82    else:
83      memAccSizeTemplate = eval('MiscMemAccSize')
84
85    # (header_output, decoder_output, decode_block, exec_output)
86    return (LoadStoreDeclare.subst(iop),
87            EACompConstructor.subst(ea_iop)
88            + MemAccConstructor.subst(memacc_iop)
89            + LoadStoreConstructor.subst(iop),
90            decode_template.subst(iop),
91            eaCompExecuteTemplate.subst(ea_iop)
92            + memAccExecTemplate.subst(memacc_iop)
93            + fullExecTemplate.subst(iop)
94            + initiateAccTemplate.subst(iop)
95            + completeAccTemplate.subst(iop)
96            + memAccSizeTemplate.subst(memacc_iop))
97}};
98
99output header {{
100        std::string inst2string(MachInst machInst);
101}};
102
103output decoder {{
104
105std::string inst2string(MachInst machInst)
106{
107    string str = "";
108    uint32_t mask = 0x80000000;
109
110    for(int i=0; i < 32; i++) {
111        if ((machInst & mask) == 0) {
112            str += "0";
113        } else {
114            str += "1";
115        }
116
117        mask = mask >> 1;
118    }
119
120    return str;
121}
122
123}};
124