util.isa revision 2980:eab855f06b79 
1// -*- mode:c++ -*-
2
3// Copyright (c) 2006 The Regents of The University of Michigan
4// All rights reserved.
5//
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7// modification, are permitted provided that the following conditions are
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10// redistributions in binary form must reproduce the above copyright
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15// this software without specific prior written permission.
16//
17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28//
29// Authors: Steve Reinhardt
30//          Korey Sewell
31
32let {{
33def LoadStoreBase(name, Name, ea_code, memacc_code, mem_flags, inst_flags,
34                  postacc_code = '', base_class = 'Memory',
35                  decode_template = BasicDecode, exec_template_base = ''):
36    # Make sure flags are in lists (convert to lists if not).
37    mem_flags = makeList(mem_flags)
38    inst_flags = makeList(inst_flags)
39
40    # add hook to get effective addresses into execution trace output.
41    ea_code += '\nif (traceData) { traceData->setAddr(EA); }\n'
42
43    # generate code block objects
44    ea_cblk = CodeBlock(ea_code)
45    memacc_cblk = CodeBlock(memacc_code)
46    postacc_cblk = CodeBlock(postacc_code)
47
48    # Some CPU models execute the memory operation as an atomic unit,
49    # while others want to separate them into an effective address
50    # computation and a memory access operation.  As a result, we need
51    # to generate three StaticInst objects.  Note that the latter two
52    # are nested inside the larger "atomic" one.
53
54    # generate InstObjParams for EAComp object
55    ea_iop = InstObjParams(name, Name, base_class, ea_cblk, inst_flags)
56
57    # generate InstObjParams for MemAcc object
58    memacc_iop = InstObjParams(name, Name, base_class, memacc_cblk, inst_flags)
59    # in the split execution model, the MemAcc portion is responsible
60    # for the post-access code.
61    memacc_iop.postacc_code = postacc_cblk.code
62
63    # generate InstObjParams for InitiateAcc, CompleteAcc object
64    # The code used depends on the template being used
65    if (exec_template_base == 'Load'):
66        initiateacc_cblk = CodeBlock(ea_code + memacc_code)
67        completeacc_cblk = CodeBlock(memacc_code + postacc_code)
68    elif (exec_template_base.startswith('Store')):
69        initiateacc_cblk = CodeBlock(ea_code + memacc_code)
70        completeacc_cblk = CodeBlock(postacc_code)
71    else:
72        initiateacc_cblk = ''
73        completeacc_cblk = ''
74
75    initiateacc_iop = InstObjParams(name, Name, base_class, initiateacc_cblk,
76                                    inst_flags)
77
78    completeacc_iop = InstObjParams(name, Name, base_class, completeacc_cblk,
79                                    inst_flags)
80
81    if (exec_template_base == 'Load'):
82        initiateacc_iop.ea_code = ea_cblk.code
83        initiateacc_iop.memacc_code = memacc_cblk.code
84        completeacc_iop.memacc_code = memacc_cblk.code
85        completeacc_iop.postacc_code = postacc_cblk.code
86    elif (exec_template_base.startswith('Store')):
87        initiateacc_iop.ea_code = ea_cblk.code
88        initiateacc_iop.memacc_code = memacc_cblk.code
89        completeacc_iop.postacc_code = postacc_cblk.code
90
91    # generate InstObjParams for unified execution
92    cblk = CodeBlock(ea_code + memacc_code + postacc_code)
93    iop = InstObjParams(name, Name, base_class, cblk, inst_flags)
94
95    iop.ea_constructor = ea_cblk.constructor
96    iop.ea_code = ea_cblk.code
97    iop.memacc_constructor = memacc_cblk.constructor
98    iop.memacc_code = memacc_cblk.code
99    iop.postacc_code = postacc_cblk.code
100
101    if mem_flags:
102        s = '\n\tmemAccessFlags = ' + string.join(mem_flags, '|') + ';'
103        iop.constructor += s
104        memacc_iop.constructor += s
105
106    # select templates
107
108    # define aliases... most StoreCond templates are the same as the
109    # corresponding Store templates (only CompleteAcc is different).
110    StoreCondMemAccExecute = StoreMemAccExecute
111    StoreCondExecute = StoreExecute
112    StoreCondInitiateAcc = StoreInitiateAcc
113
114    memAccExecTemplate = eval(exec_template_base + 'MemAccExecute')
115    fullExecTemplate = eval(exec_template_base + 'Execute')
116    initiateAccTemplate = eval(exec_template_base + 'InitiateAcc')
117    completeAccTemplate = eval(exec_template_base + 'CompleteAcc')
118
119    # (header_output, decoder_output, decode_block, exec_output)
120    return (LoadStoreDeclare.subst(iop), LoadStoreConstructor.subst(iop),
121            decode_template.subst(iop),
122            EACompExecute.subst(ea_iop)
123            + memAccExecTemplate.subst(memacc_iop)
124            + fullExecTemplate.subst(iop)
125            + initiateAccTemplate.subst(initiateacc_iop)
126            + completeAccTemplate.subst(completeacc_iop))
127}};
128output header {{
129        std::string inst2string(MachInst machInst);
130}};
131
132output decoder {{
133
134std::string inst2string(MachInst machInst)
135{
136    std::string str = "";
137    uint32_t mask = 0x80000000;
138
139    for(int i=0; i < 32; i++) {
140        if ((machInst & mask) == 0) {
141            str += "0";
142        } else {
143            str += "1";
144        }
145
146        mask = mask >> 1;
147    }
148
149    return str;
150}
151
152}};
153output exec {{
154
155    using namespace MipsISA;
156
157    /// CLEAR ALL CPU INST/EXE HAZARDS
158    inline void
159    clear_exe_inst_hazards()
160    {
161        //CODE HERE
162    }
163
164
165    /// Check "FP enabled" machine status bit.  Called when executing any FP
166    /// instruction in full-system mode.
167    /// @retval Full-system mode: NoFault if FP is enabled, FenFault
168    /// if not.  Non-full-system mode: always returns NoFault.
169#if FULL_SYSTEM
170    inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc)
171    {
172        Fault fault = NoFault;	// dummy... this ipr access should not fault
173        if (!Mips34k::ICSR_FPE(xc->readIpr(MipsISA::IPR_ICSR, fault))) {
174            fault = FloatEnableFault;
175        }
176        return fault;
177    }
178#else
179    inline Fault checkFpEnableFault(%(CPU_exec_context)s *xc)
180    {
181        return NoFault;
182    }
183#endif
184
185
186
187}};
188
189
190