noop.isa revision 5222:bb733a878f85 
1// -*- mode:c++ -*-
2
3// Copyright .AN) 2007 MIPS Technologies, Inc.  All Rights Reserved
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5//  This software is part of the M5 simulator.
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34
35//Authors: Korey L. Sewell
36
37////////////////////////////////////////////////////////////////////
38//
39// Nop
40//
41
42output header {{
43    /**
44     * Static instruction class for no-ops.  This is a leaf class.
45     */
46    class Nop : public MipsStaticInst
47    {
48        /// Disassembly of original instruction.
49        const std::string originalDisassembly;
50
51      public:
52        /// Constructor
53        Nop(const std::string _originalDisassembly, MachInst _machInst)
54            : MipsStaticInst("nop", _machInst, No_OpClass),
55              originalDisassembly(_originalDisassembly)
56        {
57            flags[IsNop] = true;
58        }
59
60        ~Nop() { }
61
62        std::string
63        generateDisassembly(Addr pc, const SymbolTable *symtab) const;
64
65        %(BasicExecDeclare)s
66    };
67}};
68
69output decoder {{
70    std::string Nop::generateDisassembly(Addr pc,
71                                         const SymbolTable *symtab) const
72    {
73        return csprintf("%-10s %s", "nop", originalDisassembly);
74    }
75
76    /// Helper function for decoding nops.  Substitute Nop object
77    /// for original inst passed in as arg (and delete latter).
78    inline
79    MipsStaticInst *
80    makeNop(MipsStaticInst *inst)
81    {
82        std::string nop_str = "(" + inst->disassemble(0) + ")";
83        MipsStaticInst *nop = new Nop(nop_str, inst->machInst);
84        delete inst;
85        return nop;
86    }
87}};
88
89output exec {{
90    Fault
91    Nop::execute(%(CPU_exec_context)s *, Trace::InstRecord *) const
92    {
93        return NoFault;
94    }
95}};
96
97// Int & FP operate instructions use RD as dest, so check for
98// RD == 0 to detect nops
99def template RegNopCheckDecode {{
100 {
101     MipsStaticInst *i = new %(class_name)s(machInst);
102     //if (RD == 0) {
103         //i = makeNop(i);
104         //}
105     return i;
106 }
107}};
108
109def template OperateNopCheckDecode {{
110 {
111     MipsStaticInst *i = new %(class_name)s(machInst);
112     //if (RD == 0) {
113     // i = makeNop(i);
114     //}
115     return i;
116 }
117}};
118
119// IntImm & Memory  instructions use Rt as dest, so check for
120// Rt == 0 to detect nops
121def template ImmNopCheckDecode {{
122 {
123     MipsStaticInst *i = new %(class_name)s(machInst);
124     //if (RT == 0) {
125     // i = makeNop(i);
126     // }
127     return i;
128 }
129}};
130
131
132// Like BasicOperate format, but generates NOP if RC/FC == 31
133def format BasicOperateWithNopCheck(code, *opt_args) {{
134    iop = InstObjParams(name, Name, 'MipsStaticInst', code,
135                        opt_args)
136    header_output = BasicDeclare.subst(iop)
137    decoder_output = BasicConstructor.subst(iop)
138    decode_block = OperateNopCheckDecode.subst(iop)
139    exec_output = BasicExecute.subst(iop)
140}};
141
142def format Nop() {{
143        decode_block = 'return new Nop(\"\",machInst);\n'
144}};
145
146