control.isa revision 2686:f0d591379ac3
1// -*- mode:c++ -*- 2 3//////////////////////////////////////////////////////////////////// 4// 5// Integer operate instructions 6// 7 8//Outputs to decoder.hh 9output header {{ 10 11 class Control : public MipsStaticInst 12 { 13 protected: 14 15 /// Constructor 16 Control(const char *mnem, MachInst _machInst, OpClass __opClass) : 17 MipsStaticInst(mnem, _machInst, __opClass) 18 { 19 } 20 21 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 22 }; 23 24 class CP0Control : public Control 25 { 26 protected: 27 28 /// Constructor 29 CP0Control(const char *mnem, MachInst _machInst, OpClass __opClass) : 30 Control(mnem, _machInst, __opClass) 31 { 32 } 33 34 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 35 }; 36 37 class CP1Control : public Control 38 { 39 protected: 40 41 /// Constructor 42 CP1Control(const char *mnem, MachInst _machInst, OpClass __opClass) : 43 Control(mnem, _machInst, __opClass) 44 { 45 } 46 47 std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 48 }; 49 50}}; 51 52//Outputs to decoder.cc 53output decoder {{ 54 std::string Control::generateDisassembly(Addr pc, const SymbolTable *symtab) const 55 { 56 std::stringstream ss; 57 58 ccprintf(ss, "%-10s ", mnemonic); 59 60 if (mnemonic == "mfc0" || mnemonic == "mtc0") { 61 ccprintf(ss, "%-10s %d,%d,%d", mnemonic,RT,RD,SEL); 62 } else { 63 64 // just print the first dest... if there's a second one, 65 // it's generally implicit 66 if (_numDestRegs > 0) { 67 printReg(ss, _destRegIdx[0]); 68 } 69 70 ss << ", "; 71 72 // just print the first two source regs... if there's 73 // a third one, it's a read-modify-write dest (Rc), 74 // e.g. for CMOVxx 75 if (_numSrcRegs > 0) { 76 printReg(ss, _srcRegIdx[0]); 77 } 78 79 if (_numSrcRegs > 1) { 80 ss << ", "; 81 printReg(ss, _srcRegIdx[1]); 82 } 83 } 84 85 return ss.str(); 86 } 87 88 std::string CP0Control::generateDisassembly(Addr pc, const SymbolTable *symtab) const 89 { 90 std::stringstream ss; 91 ccprintf(ss, "%-10s r%d, r%d, %d", mnemonic, RT, RD, SEL); 92 return ss.str(); 93 } 94 95 std::string CP1Control::generateDisassembly(Addr pc, const SymbolTable *symtab) const 96 { 97 std::stringstream ss; 98 ccprintf(ss, "%-10s r%d, f%d", mnemonic, RT, FS); 99 return ss.str(); 100 } 101 102}}; 103 104def format System(code, *flags) {{ 105 iop = InstObjParams(name, Name, 'Control', CodeBlock(code), flags) 106 header_output = BasicDeclare.subst(iop) 107 decoder_output = BasicConstructor.subst(iop) 108 decode_block = BasicDecode.subst(iop) 109 exec_output = BasicExecute.subst(iop) 110}}; 111 112def format CP0Control(code, *flags) {{ 113 iop = InstObjParams(name, Name, 'CP0Control', CodeBlock(code), flags) 114 header_output = BasicDeclare.subst(iop) 115 decoder_output = BasicConstructor.subst(iop) 116 decode_block = BasicDecode.subst(iop) 117 exec_output = BasicExecute.subst(iop) 118}}; 119 120def format CP1Control(code, *flags) {{ 121 iop = InstObjParams(name, Name, 'CP1Control', CodeBlock(code), flags) 122 header_output = BasicDeclare.subst(iop) 123 decoder_output = BasicConstructor.subst(iop) 124 decode_block = BasicDecode.subst(iop) 125 exec_output = BasicExecute.subst(iop) 126}}; 127 128 129