bitfields.isa revision 2686:f0d591379ac3 
1// -*- mode:c++ -*-
2
3////////////////////////////////////////////////////////////////////
4//
5// Bitfield definitions.
6//
7
8def bitfield OPCODE     <31:26>;
9def bitfield OPCODE_HI  <31:29>;
10def bitfield OPCODE_LO  <28:26>;
11
12def bitfield REGIMM      <20:16>;
13def bitfield REGIMM_HI   <20:19>;
14def bitfield REGIMM_LO   <18:16>;
15
16def bitfield FUNCTION      < 5: 0>;
17def bitfield FUNCTION_HI   < 5: 3>;
18def bitfield FUNCTION_LO   < 2: 0>;
19
20def bitfield RS	      <25:21>;
21def bitfield RS_MSB   <25:25>;
22def bitfield RS_HI    <25:24>;
23def bitfield RS_LO    <23:21>;
24def bitfield RS_SRL   <25:22>;
25def bitfield RS_RT    <25:16>;
26def bitfield RT	      <20:16>;
27def bitfield RT_HI    <20:19>;
28def bitfield RT_LO    <18:16>;
29def bitfield RT_RD    <20:11>;
30def bitfield RD	      <15:11>;
31
32def bitfield INTIMM	  <15: 0>;
33
34// Floating-point operate format
35def bitfield FMT      <25:21>;
36def bitfield FR       <25:21>;
37def bitfield FT	      <20:16>;
38def bitfield FS	      <15:11>;
39def bitfield FD	      <10:6>;
40
41def bitfield ND       <17:17>;
42def bitfield TF       <16:16>;
43def bitfield MOVCI    <16:16>;
44def bitfield MOVCF    <16:16>;
45def bitfield SRL      <21:21>;
46def bitfield SRLV     < 6: 6>;
47def bitfield SA       <10: 6>;
48
49// Floating Point Condition Codes
50def bitfield CC <10:8>;
51def bitfield BRANCH_CC <20:18>;
52
53// CP0 Register Select
54def bitfield SEL       < 2: 0>;
55
56// Interrupts
57def bitfield SC       < 5: 5>;
58
59// Branch format
60def bitfield OFFSET <15: 0>; // displacement
61
62// Jmp format
63def bitfield JMPTARG	<25: 0>;
64def bitfield HINT	<10: 6>;
65
66def bitfield SYSCALLCODE <25: 6>;
67def bitfield TRAPCODE    <15:13>;
68
69// EXT/INS instructions
70def bitfield MSB	<15:11>;
71def bitfield LSB	<10: 6>;
72
73// M5 instructions
74def bitfield M5FUNC <7:0>;
75