base.isa revision 12616:4b463b4dc098
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007 MIPS Technologies, Inc.
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright
9// notice, this list of conditions and the following disclaimer;
10// redistributions in binary form must reproduce the above copyright
11// notice, this list of conditions and the following disclaimer in the
12// documentation and/or other materials provided with the distribution;
13// neither the name of the copyright holders nor the names of its
14// contributors may be used to endorse or promote products derived from
15// this software without specific prior written permission.
16//
17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28//
29// Authors: Korey Sewell
30
31////////////////////////////////////////////////////////////////////
32//
33// Base class for MIPS instructions, and some support functions
34//
35
36//Outputs to decoder.hh
37output header {{
38
39    using namespace MipsISA;
40
41    /**
42     * Base class for all MIPS static instructions.
43     */
44    class MipsStaticInst : public StaticInst
45    {
46      protected:
47
48        // Constructor
49        MipsStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
50            : StaticInst(mnem, _machInst, __opClass)
51        {
52        }
53
54        /// Print a register name for disassembly given the unique
55        /// dependence tag number (FP or int).
56        void printReg(std::ostream &os, RegId reg) const;
57
58        std::string generateDisassembly(
59                Addr pc, const SymbolTable *symtab) const override;
60
61      public:
62        void
63        advancePC(MipsISA::PCState &pc) const override
64        {
65            pc.advance();
66        }
67
68        size_t
69        asBytes(void *buf, size_t max_size) override
70        {
71            return simpleAsBytes(buf, max_size, machInst);
72        }
73    };
74
75}};
76
77//Ouputs to decoder.cc
78output decoder {{
79
80    void MipsStaticInst::printReg(std::ostream &os, RegId reg) const
81    {
82        if (reg.isIntReg()) {
83            ccprintf(os, "r%d", reg.index());
84        }
85        else {
86            ccprintf(os, "f%d", reg.index());
87        }
88    }
89
90    std::string MipsStaticInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const
91    {
92        std::stringstream ss;
93
94        ccprintf(ss, "%-10s ", mnemonic);
95
96        // Need to find standard way to not print
97        // this info. Maybe add bool variable to
98        // class?
99        if (strcmp(mnemonic, "syscall") != 0) {
100            if(_numDestRegs > 0){
101                printReg(ss, _destRegIdx[0]);
102            }
103
104            if(_numSrcRegs > 0) {
105                ss << ", ";
106                printReg(ss, _srcRegIdx[0]);
107            }
108
109            if(_numSrcRegs > 1) {
110                ss << ", ";
111                printReg(ss, _srcRegIdx[1]);
112            }
113        }
114
115        // Should we define a separate inst. class
116        // just for two insts?
117        if (strcmp(mnemonic, "sll") == 0 || strcmp(mnemonic, "sra") == 0) {
118            ccprintf(ss,", %d",SA);
119        }
120
121        return ss.str();
122    }
123
124}};
125
126