base.isa revision 5254
12089SN/A// -*- mode:c++ -*-
22089SN/A
35254Sksewell@umich.edu// Copyright (c) 2007 MIPS Technologies, Inc.
45254Sksewell@umich.edu// All rights reserved.
55254Sksewell@umich.edu//
65254Sksewell@umich.edu// Redistribution and use in source and binary forms, with or without
75254Sksewell@umich.edu// modification, are permitted provided that the following conditions are
85254Sksewell@umich.edu// met: redistributions of source code must retain the above copyright
95254Sksewell@umich.edu// notice, this list of conditions and the following disclaimer;
105254Sksewell@umich.edu// redistributions in binary form must reproduce the above copyright
115254Sksewell@umich.edu// notice, this list of conditions and the following disclaimer in the
125254Sksewell@umich.edu// documentation and/or other materials provided with the distribution;
135254Sksewell@umich.edu// neither the name of the copyright holders nor the names of its
145254Sksewell@umich.edu// contributors may be used to endorse or promote products derived from
155254Sksewell@umich.edu// this software without specific prior written permission.
165254Sksewell@umich.edu//
175254Sksewell@umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
185254Sksewell@umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
195254Sksewell@umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
205254Sksewell@umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
215254Sksewell@umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
225254Sksewell@umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
235254Sksewell@umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
245254Sksewell@umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
255254Sksewell@umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
265254Sksewell@umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
275254Sksewell@umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
285254Sksewell@umich.edu//
295254Sksewell@umich.edu// Authors: Korey Sewell
302706Sksewell@umich.edu
312088SN/A////////////////////////////////////////////////////////////////////
322088SN/A//
332089SN/A// Base class for MIPS instructions, and some support functions
342088SN/A//
352088SN/A
362089SN/A//Outputs to decoder.hh
372088SN/Aoutput header {{
382239SN/A
392239SN/A    using namespace MipsISA;
402239SN/A
412131SN/A    /**
422131SN/A     * Base class for all MIPS static instructions.
432131SN/A     */
442131SN/A    class MipsStaticInst : public StaticInst
452131SN/A    {
462131SN/A      protected:
472131SN/A
482131SN/A        // Constructor
492131SN/A        MipsStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
502131SN/A            : StaticInst(mnem, _machInst, __opClass)
512088SN/A        {
522131SN/A        }
532088SN/A
542131SN/A        /// Print a register name for disassembly given the unique
552131SN/A        /// dependence tag number (FP or int).
562131SN/A        void printReg(std::ostream &os, int reg) const;
572088SN/A
582131SN/A        std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
592131SN/A    };
602088SN/A
612088SN/A}};
622088SN/A
632089SN/A//Ouputs to decoder.cc
642088SN/Aoutput decoder {{
652088SN/A
662131SN/A    void MipsStaticInst::printReg(std::ostream &os, int reg) const
672131SN/A    {
682131SN/A        if (reg < FP_Base_DepTag) {
692131SN/A            ccprintf(os, "r%d", reg);
702131SN/A        }
712131SN/A        else {
722131SN/A            ccprintf(os, "f%d", reg - FP_Base_DepTag);
732131SN/A        }
742131SN/A    }
752131SN/A
762131SN/A    std::string MipsStaticInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const
772131SN/A    {
782131SN/A        std::stringstream ss;
792131SN/A
802131SN/A        ccprintf(ss, "%-10s ", mnemonic);
812131SN/A
822965Sksewell@umich.edu        // Need to find standard way to not print
832965Sksewell@umich.edu        // this info. Maybe add bool variable to
842965Sksewell@umich.edu        // class?
855222Sksewell@umich.edu        if (mnemonic != "syscall") {
862965Sksewell@umich.edu            if(_numDestRegs > 0){
872965Sksewell@umich.edu                printReg(ss, _destRegIdx[0]);
882965Sksewell@umich.edu            }
892965Sksewell@umich.edu
902965Sksewell@umich.edu            if(_numSrcRegs > 0) {
912965Sksewell@umich.edu                ss << ", ";
922965Sksewell@umich.edu                printReg(ss, _srcRegIdx[0]);
932965Sksewell@umich.edu            }
942965Sksewell@umich.edu
952965Sksewell@umich.edu            if(_numSrcRegs > 1) {
962965Sksewell@umich.edu                ss << ", ";
972965Sksewell@umich.edu                printReg(ss, _srcRegIdx[1]);
982965Sksewell@umich.edu            }
992479SN/A        }
1002479SN/A
1012965Sksewell@umich.edu        // Should we define a separate inst. class
1022965Sksewell@umich.edu        // just for two insts?
1035222Sksewell@umich.edu        if(mnemonic == "sll" || mnemonic == "sra"){
1042492SN/A            ccprintf(ss,", %d",SA);
1052131SN/A        }
1062088SN/A
1072131SN/A        return ss.str();
1082131SN/A    }
1092088SN/A
1102088SN/A}};
1112088SN/A
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