base.isa revision 2239
17585SAli.Saidi@arm.com// -*- mode:c++ -*-
27585SAli.Saidi@arm.com
37585SAli.Saidi@arm.com////////////////////////////////////////////////////////////////////
47585SAli.Saidi@arm.com//
57585SAli.Saidi@arm.com// Base class for MIPS instructions, and some support functions
67585SAli.Saidi@arm.com//
77585SAli.Saidi@arm.com
87585SAli.Saidi@arm.com//Outputs to decoder.hh
97585SAli.Saidi@arm.comoutput header {{
107585SAli.Saidi@arm.com
117585SAli.Saidi@arm.com#define R31 31
127585SAli.Saidi@arm.com#include "arch/mips/faults.hh"
137585SAli.Saidi@arm.com#include "arch/mips/isa_traits.hh"
147585SAli.Saidi@arm.com
157585SAli.Saidi@arm.com    using namespace MipsISA;
167585SAli.Saidi@arm.com
177585SAli.Saidi@arm.com
187585SAli.Saidi@arm.com    /**
197585SAli.Saidi@arm.com     * Base class for all MIPS static instructions.
207585SAli.Saidi@arm.com     */
217585SAli.Saidi@arm.com    class MipsStaticInst : public StaticInst
227585SAli.Saidi@arm.com    {
237585SAli.Saidi@arm.com      protected:
247585SAli.Saidi@arm.com
257585SAli.Saidi@arm.com        /// Make MipsISA register dependence tags directly visible in
267585SAli.Saidi@arm.com        /// this class and derived classes.  Maybe these should really
277585SAli.Saidi@arm.com        /// live here and not in the MipsISA namespace.
287585SAli.Saidi@arm.com        /*enum DependenceTags {
297585SAli.Saidi@arm.com            FP_Base_DepTag = MipsISA::FP_Base_DepTag,
307585SAli.Saidi@arm.com            Fpcr_DepTag = MipsISA::Fpcr_DepTag,
317585SAli.Saidi@arm.com            Uniq_DepTag = MipsISA::Uniq_DepTag,
327585SAli.Saidi@arm.com            IPR_Base_DepTag = MipsISA::IPR_Base_DepTag
337585SAli.Saidi@arm.com            };*/
347585SAli.Saidi@arm.com
357585SAli.Saidi@arm.com        // Constructor
367585SAli.Saidi@arm.com        MipsStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass)
377585SAli.Saidi@arm.com            : StaticInst(mnem, _machInst, __opClass)
387585SAli.Saidi@arm.com        {
397585SAli.Saidi@arm.com        }
407585SAli.Saidi@arm.com
417585SAli.Saidi@arm.com        /// Print a register name for disassembly given the unique
427585SAli.Saidi@arm.com        /// dependence tag number (FP or int).
437585SAli.Saidi@arm.com        void printReg(std::ostream &os, int reg) const;
447585SAli.Saidi@arm.com
457585SAli.Saidi@arm.com        std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
467585SAli.Saidi@arm.com    };
477585SAli.Saidi@arm.com
487585SAli.Saidi@arm.com}};
497585SAli.Saidi@arm.com
507585SAli.Saidi@arm.com//Ouputs to decoder.cc
517585SAli.Saidi@arm.comoutput decoder {{
527585SAli.Saidi@arm.com
537585SAli.Saidi@arm.com    void MipsStaticInst::printReg(std::ostream &os, int reg) const
547585SAli.Saidi@arm.com    {
557585SAli.Saidi@arm.com        if (reg < FP_Base_DepTag) {
567585SAli.Saidi@arm.com            ccprintf(os, "r%d", reg);
577585SAli.Saidi@arm.com        }
587585SAli.Saidi@arm.com        else {
597585SAli.Saidi@arm.com            ccprintf(os, "f%d", reg - FP_Base_DepTag);
607585SAli.Saidi@arm.com        }
617585SAli.Saidi@arm.com    }
627585SAli.Saidi@arm.com
637585SAli.Saidi@arm.com    std::string MipsStaticInst::generateDisassembly(Addr pc, const SymbolTable *symtab) const
647585SAli.Saidi@arm.com    {
657585SAli.Saidi@arm.com        std::stringstream ss;
667585SAli.Saidi@arm.com
677585SAli.Saidi@arm.com        ccprintf(ss, "%-10s ", mnemonic);
687585SAli.Saidi@arm.com
697585SAli.Saidi@arm.com        // just print the first two source regs... if there's
707585SAli.Saidi@arm.com        // a third one, it's a read-modify-write dest (Rc),
717585SAli.Saidi@arm.com        // e.g. for CMOVxx
727585SAli.Saidi@arm.com        if(_numSrcRegs > 0)
737585SAli.Saidi@arm.com        {
747585SAli.Saidi@arm.com            printReg(ss, _srcRegIdx[0]);
757585SAli.Saidi@arm.com        }
767585SAli.Saidi@arm.com
777585SAli.Saidi@arm.com        if(_numSrcRegs > 1)
787585SAli.Saidi@arm.com        {
797585SAli.Saidi@arm.com            ss << ",";
807585SAli.Saidi@arm.com            printReg(ss, _srcRegIdx[1]);
817585SAli.Saidi@arm.com        }
827585SAli.Saidi@arm.com
837585SAli.Saidi@arm.com        // just print the first dest... if there's a second one,
847585SAli.Saidi@arm.com        // it's generally implicit
857585SAli.Saidi@arm.com        if(_numDestRegs > 0)
867585SAli.Saidi@arm.com        {
877585SAli.Saidi@arm.com            if(_numSrcRegs > 0)
887585SAli.Saidi@arm.com                ss << ",";
897585SAli.Saidi@arm.com            printReg(ss, _destRegIdx[0]);
907585SAli.Saidi@arm.com        }
917585SAli.Saidi@arm.com
927585SAli.Saidi@arm.com        return ss.str();
937585SAli.Saidi@arm.com    }
947585SAli.Saidi@arm.com
957585SAli.Saidi@arm.com}};
967585SAli.Saidi@arm.com
977585SAli.Saidi@arm.com