dt_constants.hh revision 5222:bb733a878f85
1/*
2 * Copyright .AN) 2007 MIPS Technologies, Inc.  All Rights Reserved
3 *
4 * This software is part of the M5 simulator.
5 *
6 * THIS IS A LEGAL AGREEMENT.  BY DOWNLOADING, USING, COPYING, CREATING
7 * DERIVATIVE WORKS, AND/OR DISTRIBUTING THIS SOFTWARE YOU ARE AGREEING
8 * TO THESE TERMS AND CONDITIONS.
9 *
10 * Permission is granted to use, copy, create derivative works and
11 * distribute this software and such derivative works for any purpose,
12 * so long as (1) the copyright notice above, this grant of permission,
13 * and the disclaimer below appear in all copies and derivative works
14 * made, (2) the copyright notice above is augmented as appropriate to
15 * reflect the addition of any new copyrightable work in a derivative
16 * work (e.g., Copyright .AN) <Publication Year> Copyright Owner), and (3)
17 * the name of MIPS Technologies, Inc. ($B!H(BMIPS$B!I(B) is not used in any
18 * advertising or publicity pertaining to the use or distribution of
19 * this software without specific, written prior authorization.
20 *
21 * THIS SOFTWARE IS PROVIDED $B!H(BAS IS.$B!I(B  MIPS MAKES NO WARRANTIES AND
22 * DISCLAIMS ALL WARRANTIES, WHETHER EXPRESS, STATUTORY, IMPLIED OR
23 * OTHERWISE, INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
24 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND
25 * NON-INFRINGEMENT OF THIRD PARTY RIGHTS, REGARDING THIS SOFTWARE.
26 * IN NO EVENT SHALL MIPS BE LIABLE FOR ANY DAMAGES, INCLUDING DIRECT,
27 * INDIRECT, INCIDENTAL, CONSEQUENTIAL, SPECIAL, OR PUNITIVE DAMAGES OF
28 * ANY KIND OR NATURE, ARISING OUT OF OR IN CONNECTION WITH THIS AGREEMENT,
29 * THIS SOFTWARE AND/OR THE USE OF THIS SOFTWARE, WHETHER SUCH LIABILITY
30 * IS ASSERTED ON THE BASIS OF CONTRACT, TORT (INCLUDING NEGLIGENCE OR
31 * STRICT LIABILITY), OR OTHERWISE, EVEN IF MIPS HAS BEEN WARNED OF THE
32 * POSSIBILITY OF ANY SUCH LOSS OR DAMAGE IN ADVANCE.
33 *
34 * Authors: Jaidev Patwardhan
35 *
36 */
37
38#ifndef __ARCH_MIPS_DT_CONSTANTS_HH__
39#define __ARCH_MIPS_DT_CONSTANTS_HH__
40
41#include "arch/mips/types.hh"
42
43namespace MipsISA
44{
45  // See the EJTAG Specification - Revision 4.10
46  // Also see PDTrace Specification - Revision 4.30
47
48  // Debug Register - CP0 Reg 23, Sel 0
49  const unsigned Debug_DBD = 31;
50  const unsigned Debug_DM_HI = 30;
51  const unsigned Debug_DM_LO = 30;
52  const unsigned Debug_NODCR = 29;
53  const unsigned Debug_LSNM = 28;
54  const unsigned Debug_DOZE = 27;
55  const unsigned Debug_HALT = 26;
56  const unsigned Debug_COUNTDM = 25;
57  const unsigned Debug_IBUSEP = 24;
58  const unsigned Debug_MCHECKEP = 23;
59  const unsigned Debug_CACHEEP = 22;
60  const unsigned Debug_DBUSEP = 21;
61  const unsigned Debug_IEXI_HI = 20;
62  const unsigned Debug_IEXI_LO = 20;
63  const unsigned Debug_DDBS_IMPR = 19;
64  const unsigned Debug_DDBL_IMPR = 18;
65  const unsigned Debug_EJTAGVER_2 =17;
66  const unsigned Debug_EJTAGVER_1 =16;
67  const unsigned Debug_EJTAGVER_0 =15;
68  const unsigned Debug_EJTAGVER_HI = 17;
69  const unsigned Debug_EJTAGVER_LO = 15;
70  const unsigned Debug_DEXC_CODE_HI = 14;
71  const unsigned Debug_DEXC_CODE_LO = 10;
72  const unsigned Debug_NOSST = 9;
73  const unsigned Debug_SST = 8;
74  const unsigned Debug_OFFLINE = 7;
75  const unsigned Debug_DIBIMPR = 6;
76  const unsigned Debug_DINT = 5;
77  const unsigned Debug_DIB = 4;
78  const unsigned Debug_DDBS = 3;
79  const unsigned Debug_DDBL = 2;
80  const unsigned Debug_DBp = 1;
81  const unsigned Debug_DSS = 0;
82
83
84  // TraceControl Register - CP0 Reg 23, Sel 1
85  const unsigned TraceControl_TS = 31;
86  const unsigned TraceControl_UT = 30;
87  const unsigned TraceControl_TB = 27;
88  const unsigned TraceControl_IO = 26;
89  const unsigned TraceControl_D = 25;
90  const unsigned TraceControl_E = 24;
91  const unsigned TraceControl_K = 23;
92  const unsigned TraceControl_S = 22;
93  const unsigned TraceControl_U = 21;
94  const unsigned TraceControl_ASID_M_HI = 20;
95  const unsigned TraceControl_ASID_M_LO = 13;
96  const unsigned TraceControl_ASID_HI = 12;
97  const unsigned TraceControl_ASID_LO = 5;
98  const unsigned TraceControl_G = 4;
99  const unsigned TraceControl_TFCR = 3;
100  const unsigned TraceControl_TLSM = 2;
101  const unsigned TraceControl_TIM = 1;
102  const unsigned TraceControl_ON = 0;
103
104  // TraceControl2 Register - CP0 Reg 23, Sel 2
105  const unsigned TraceControl2_CPUIDV = 29;
106  const unsigned TraceControl2_CPUID_HI = 28;
107  const unsigned TraceControl2_CPUID_LO = 21;
108  const unsigned TraceControl2_TCV = 20;
109  const unsigned TraceControl2_TCNUM_HI = 19;
110  const unsigned TraceControl2_TCNUM_LO = 12;
111  const unsigned TraceControl2_MODE_HI = 11;
112  const unsigned TraceControl2_MODE_LO = 7;
113  const unsigned TraceControl2_VALIDMODES_HI = 6;
114  const unsigned TraceControl2_VALIDMODES_LO = 5;
115  const unsigned TraceControl2_TBI = 4;
116  const unsigned TraceControl2_TBU = 3;
117  const unsigned TraceControl2_SYP_HI = 2;
118  const unsigned TraceControl2_SYP_LO = 0;
119
120  // UserTraceData Register - CP0 Reg 23, Sel 3
121  // Just holds 32-bits (or 64-bits) of data
122
123  // TraceIBPC Register - CP0 Reg 23, Sel 4
124  const unsigned TraceIBPC_MB = 31;
125  const unsigned TraceIBPC_IE = 28;
126  const unsigned TraceIBPC_ATE = 27;
127  const unsigned TraceIBPC_IBPC8_HI = 26;
128  const unsigned TraceIBPC_IBPC8_LO = 24;
129  const unsigned TraceIBPC_IBPC7_HI = 23;
130  const unsigned TraceIBPC_IBPC7_LO = 21;
131  const unsigned TraceIBPC_IBPC6_HI = 20;
132  const unsigned TraceIBPC_IBPC6_LO = 18;
133  const unsigned TraceIBPC_IBPC5_HI = 17;
134  const unsigned TraceIBPC_IBPC5_LO = 15;
135  const unsigned TraceIBPC_IBPC4_HI = 14;
136  const unsigned TraceIBPC_IBPC4_LO = 12;
137  const unsigned TraceIBPC_IBPC3_HI = 11;
138  const unsigned TraceIBPC_IBPC3_LO = 9;
139  const unsigned TraceIBPC_IBPC2_HI = 8;
140  const unsigned TraceIBPC_IBPC2_LO = 6;
141  const unsigned TraceIBPC_IBPC1_HI = 5;
142  const unsigned TraceIBPC_IBPC1_LO = 3;
143  const unsigned TraceIBPC_IBPC0_HI = 2;
144  const unsigned TraceIBPC_IBPC0_LO = 0;
145
146
147  // TraceDBPC Register - CP0 Reg 23, Sel 5
148  const unsigned TRACEDBPC_MB = 31;
149  const unsigned TRACEDBPC_DE = 28;
150  const unsigned TRACEDBPC_ATE = 27;
151  const unsigned TRACEDBPC_DBPC8_HI = 26;
152  const unsigned TRACEDBPC_DBPC8_LO = 24;
153  const unsigned TRACEDBPC_DBPC7_HI = 23;
154  const unsigned TRACEDBPC_DBPC7_LO = 21;
155  const unsigned TRACEDBPC_DBPC6_HI = 20;
156  const unsigned TRACEDBPC_DBPC6_LO = 18;
157  const unsigned TRACEDBPC_DBPC5_HI = 17;
158  const unsigned TRACEDBPC_DBPC5_LO = 15;
159  const unsigned TRACEDBPC_DBPC4_HI = 14;
160  const unsigned TRACEDBPC_DBPC4_LO = 12;
161  const unsigned TRACEDBPC_DBPC3_HI = 11;
162  const unsigned TRACEDBPC_DBPC3_LO = 9;
163  const unsigned TRACEDBPC_DBPC2_HI = 8;
164  const unsigned TRACEDBPC_DBPC2_LO = 6;
165  const unsigned TRACEDBPC_DBPC1_HI = 5;
166  const unsigned TRACEDBPC_DBPC1_LO = 3;
167  const unsigned TRACEDBPC_DBPC0_HI = 2;
168  const unsigned TRACEDBPC_DBPC0_LO = 0;
169
170  // TraceIBPC2 - Not part of CP0, but part of TRACE
171  const unsigned TraceIBPC_IBPC14_HI = 17;
172  const unsigned TraceIBPC_IBPC14_LO = 15;
173  const unsigned TraceIBPC_IBPC13_HI = 14;
174  const unsigned TraceIBPC_IBPC13_LO = 12;
175  const unsigned TraceIBPC_IBPC12_HI = 11;
176  const unsigned TraceIBPC_IBPC12_LO = 9;
177  const unsigned TraceIBPC_IBPC11_HI = 8;
178  const unsigned TraceIBPC_IBPC11_LO = 6;
179  const unsigned TraceIBPC_IBPC10_HI = 5;
180  const unsigned TraceIBPC_IBPC10_LO = 3;
181  const unsigned TraceIBPC_IBPC9_HI = 2;
182  const unsigned TraceIBPC_IBPC9_LO = 0;
183
184
185  // TraceDBPC2 - Not part of CP0, but part of TRACE
186  const unsigned TRACEDBPC_DBPC14_HI = 17;
187  const unsigned TRACEDBPC_DBPC14_LO = 15;
188  const unsigned TRACEDBPC_DBPC13_HI = 14;
189  const unsigned TRACEDBPC_DBPC13_LO = 12;
190  const unsigned TRACEDBPC_DBPC12_HI = 11;
191  const unsigned TRACEDBPC_DBPC12_LO = 9;
192  const unsigned TRACEDBPC_DBPC11_HI = 8;
193  const unsigned TRACEDBPC_DBPC11_LO = 6;
194  const unsigned TRACEDBPC_DBPC10_HI = 5;
195  const unsigned TRACEDBPC_DBPC10_LO = 3;
196  const unsigned TRACEDBPC_DBPC9_HI = 2;
197  const unsigned TRACEDBPC_DBPC9_LO = 0;
198
199
200  // Debug Register 2 - CP0 Reg 23, Sel 6
201  const unsigned DEBUG2_PRM = 3;
202  const unsigned DEBUG2_DQ = 2;
203  const unsigned DEBUG2_TUP = 1;
204  const unsigned DEBUG2_PACO = 0;
205
206  // DEPC Register - CP0 Reg 24, Sel 0
207  // Debug Exception Program Counter
208  const unsigned DEPC_HI = 31;
209  const unsigned DEPC_LO = 0;
210
211
212
213  // DESAVE - CP0 Reg 31, Sel 0
214  // Debug Exception Save Register
215  const unsigned DESAVE_HI = 31;
216  const unsigned DESAVE_LO = 0;
217
218
219
220} // namespace MipsISA
221
222#endif
223