14997SN/A/*
24997SN/A * Copyright (c) 2001-2005 The Regents of The University of Michigan
34997SN/A * All rights reserved.
44997SN/A *
54997SN/A * Redistribution and use in source and binary forms, with or without
64997SN/A * modification, are permitted provided that the following conditions are
74997SN/A * met: redistributions of source code must retain the above copyright
84997SN/A * notice, this list of conditions and the following disclaimer;
94997SN/A * redistributions in binary form must reproduce the above copyright
104997SN/A * notice, this list of conditions and the following disclaimer in the
114997SN/A * documentation and/or other materials provided with the distribution;
124997SN/A * neither the name of the copyright holders nor the names of its
134997SN/A * contributors may be used to endorse or promote products derived from
144997SN/A * this software without specific prior written permission.
154997SN/A *
164997SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
174997SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
184997SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
194997SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
204997SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
214997SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
224997SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
234997SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
244997SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
254997SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
264997SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
274997SN/A *
284997SN/A * Authors: Gabe Black
294997SN/A */
304997SN/A
3110687SAndreas.Sandberg@ARM.com#include "arch/generic/tlb.hh"
3210687SAndreas.Sandberg@ARM.com
334997SN/A#include "cpu/thread_context.hh"
344997SN/A#include "mem/page_table.hh"
358229SN/A#include "sim/faults.hh"
368784SN/A#include "sim/full_system.hh"
374997SN/A#include "sim/process.hh"
384997SN/A
394997SN/AFault
4012749Sgiacomo.travaglini@arm.comGenericTLB::translateAtomic(const RequestPtr &req, ThreadContext *tc, Mode)
414997SN/A{
428784SN/A    if (FullSystem)
435004SN/A        panic("Generic translation shouldn't be used in full system mode.\n");
445004SN/A
458784SN/A    Process * p = tc->getProcessPtr();
465004SN/A
478784SN/A    Fault fault = p->pTable->translate(req);
4811321Ssteve.reinhardt@amd.com    if (fault != NoFault)
498784SN/A        return fault;
508784SN/A
518784SN/A    return NoFault;
524997SN/A}
535358SN/A
545358SN/Avoid
5512749Sgiacomo.travaglini@arm.comGenericTLB::translateTiming(const RequestPtr &req, ThreadContext *tc,
566023SN/A        Translation *translation, Mode mode)
575894SN/A{
585894SN/A    assert(translation);
596023SN/A    translation->finish(translateAtomic(req, tc, mode), req, tc, mode);
605894SN/A}
615894SN/A
629738SN/AFault
6312749Sgiacomo.travaglini@arm.comGenericTLB::finalizePhysical(const RequestPtr &req, ThreadContext *tc,
6412749Sgiacomo.travaglini@arm.com                             Mode mode) const
659738SN/A{
669738SN/A    return NoFault;
679738SN/A}
689738SN/A
695894SN/Avoid
705358SN/AGenericTLB::demapPage(Addr vaddr, uint64_t asn)
715358SN/A{
725358SN/A    warn("Demapping pages in the generic TLB is unnecessary.\n");
735358SN/A}
74