memhelpers.hh revision 10026
1/* 2 * Copyright (c) 2013 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2011 Google 15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the 23 * documentation and/or other materials provided with the distribution; 24 * neither the name of the copyright holders nor the names of its 25 * contributors may be used to endorse or promote products derived from 26 * this software without specific prior written permission. 27 * 28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 * 40 * Authors: Gabe Black 41 */ 42 43#ifndef __ARCH_GENERIC_MEMHELPERS_HH__ 44#define __ARCH_GENERIC_MEMHELPERS_HH__ 45 46#include "base/types.hh" 47#include "mem/request.hh" 48#include "sim/byteswap.hh" 49#include "sim/fault_fwd.hh" 50#include "sim/insttracer.hh" 51 52/// Read from memory in timing mode. 53template <class XC, class MemT> 54Fault 55readMemTiming(XC *xc, Trace::InstRecord *traceData, Addr addr, 56 MemT &mem, unsigned flags) 57{ 58 return xc->readMem(addr, (uint8_t *)&mem, sizeof(MemT), flags); 59} 60 61/// Extract the data returned from a timing mode read. 62template <class MemT> 63void 64getMem(PacketPtr pkt, MemT &mem, Trace::InstRecord *traceData) 65{ 66 mem = pkt->get<MemT>(); 67 if (traceData) 68 traceData->setData(mem); 69} 70 71/// Read from memory in atomic mode. 72template <class XC, class MemT> 73Fault 74readMemAtomic(XC *xc, Trace::InstRecord *traceData, Addr addr, MemT &mem, 75 unsigned flags) 76{ 77 memset(&mem, 0, sizeof(mem)); 78 Fault fault = readMemTiming(xc, traceData, addr, mem, flags); 79 if (fault == NoFault) { 80 mem = TheISA::gtoh(mem); 81 if (traceData) 82 traceData->setData(mem); 83 } 84 return fault; 85} 86 87/// Write to memory in timing mode. 88template <class XC, class MemT> 89Fault 90writeMemTiming(XC *xc, Trace::InstRecord *traceData, MemT mem, Addr addr, 91 unsigned flags, uint64_t *res) 92{ 93 if (traceData) { 94 traceData->setData(mem); 95 } 96 mem = TheISA::htog(mem); 97 return xc->writeMem((uint8_t *)&mem, sizeof(MemT), addr, flags, res); 98} 99 100/// Write to memory in atomic mode. 101template <class XC, class MemT> 102Fault 103writeMemAtomic(XC *xc, Trace::InstRecord *traceData, const MemT &mem, 104 Addr addr, unsigned flags, uint64_t *res) 105{ 106 Fault fault = writeMemTiming(xc, traceData, mem, addr, flags, res); 107 if (fault == NoFault && res != NULL) { 108 if (flags & Request::MEM_SWAP || flags & Request::MEM_SWAP_COND) 109 *res = TheISA::gtoh((MemT)*res); 110 else 111 *res = TheISA::gtoh(*res); 112 } 113 return fault; 114} 115 116#endif 117