utility.cc revision 7693 
1/*
2 * Copyright (c) 2009-2010 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Ali Saidi
38 */
39
40
41#include "arch/arm/faults.hh"
42#include "arch/arm/utility.hh"
43#include "cpu/thread_context.hh"
44
45#if FULL_SYSTEM
46#include "arch/arm/vtophys.hh"
47#include "mem/vport.hh"
48#endif
49
50namespace ArmISA {
51
52void
53initCPU(ThreadContext *tc, int cpuId)
54{
55    // Reset CP15?? What does that mean -- ali
56
57    // FPEXC.EN = 0
58
59    static Fault reset = new Reset;
60    if (cpuId == 0)
61        reset->invoke(tc);
62}
63
64uint64_t getArgument(ThreadContext *tc, int &number, uint8_t size, bool fp) {
65#if FULL_SYSTEM
66    if (fp)
67        panic("getArgument(): Floating point arguments not implemented\n");
68
69    if (number < NumArgumentRegs) {
70        // If the argument is 64 bits, it must be in an even regiser number
71        // Increment the number here if it isn't even
72        if (size == sizeof(uint64_t)) {
73            if ((number % 2) != 0)
74                number++;
75            // Read the two halves of the data
76            // number is inc here to get the second half of the 64 bit reg
77            uint64_t tmp;
78            tmp = tc->readIntReg(number++);
79            tmp |= tc->readIntReg(number) << 32;
80            return tmp;
81        } else {
82           return tc->readIntReg(number);
83        }
84    } else {
85        Addr sp = tc->readIntReg(StackPointerReg);
86        VirtualPort *vp = tc->getVirtPort();
87        uint64_t arg;
88        if (size == sizeof(uint64_t)) {
89            // If the argument is even it must be aligned
90            if ((number % 2) != 0)
91                number++;
92            arg = vp->read<uint64_t>(sp +
93                    (number-NumArgumentRegs) * sizeof(uint32_t));
94            // since two 32 bit args == 1 64 bit arg, increment number
95            number++;
96        } else {
97            arg = vp->read<uint32_t>(sp +
98                           (number-NumArgumentRegs) * sizeof(uint32_t));
99        }
100        return arg;
101    }
102#else
103    panic("getArgument() only implemented for FULL_SYSTEM\n");
104    M5_DUMMY_RETURN
105#endif
106}
107
108Fault
109setCp15Register(uint32_t &Rd, int CRn, int opc1, int CRm, int opc2)
110{
111   return new UnimpFault(csprintf("MCR CP15: CRn: %d opc1: %d CRm: %d opc1: %d\n",
112               CRn, opc1, CRm, opc2));
113}
114
115Fault
116readCp15Register(uint32_t &Rd, int CRn, int opc1, int CRm, int opc2)
117{
118   return new UnimpFault(csprintf("MRC CP15: CRn: %d opc1: %d CRm: %d opc1: %d\n",
119           CRn, opc1, CRm, opc2));
120
121}
122
123void
124skipFunction(ThreadContext *tc)
125{
126    Addr newpc = tc->readIntReg(ReturnAddressReg);
127    newpc &= ~ULL(1);
128    if (isThumb(tc->readPC()))
129        tc->setPC(newpc | PcTBit);
130    else
131        tc->setPC(newpc);
132    tc->setNextPC(tc->readPC() + sizeof(TheISA::MachInst));
133}
134
135
136}
137