types.hh revision 6741
16145Snate@binkert.org/* 26145Snate@binkert.org * Copyright (c) 2007-2008 The Florida State University 36145Snate@binkert.org * All rights reserved. 46145Snate@binkert.org * 56145Snate@binkert.org * Redistribution and use in source and binary forms, with or without 66145Snate@binkert.org * modification, are permitted provided that the following conditions are 76145Snate@binkert.org * met: redistributions of source code must retain the above copyright 86145Snate@binkert.org * notice, this list of conditions and the following disclaimer; 96145Snate@binkert.org * redistributions in binary form must reproduce the above copyright 106145Snate@binkert.org * notice, this list of conditions and the following disclaimer in the 116145Snate@binkert.org * documentation and/or other materials provided with the distribution; 126145Snate@binkert.org * neither the name of the copyright holders nor the names of its 136145Snate@binkert.org * contributors may be used to endorse or promote products derived from 146145Snate@binkert.org * this software without specific prior written permission. 156145Snate@binkert.org * 166145Snate@binkert.org * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 176145Snate@binkert.org * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 186145Snate@binkert.org * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 196145Snate@binkert.org * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 206145Snate@binkert.org * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 216145Snate@binkert.org * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 226145Snate@binkert.org * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 236145Snate@binkert.org * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 246145Snate@binkert.org * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 256145Snate@binkert.org * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 266145Snate@binkert.org * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 276145Snate@binkert.org * 286145Snate@binkert.org * Authors: Stephen Hines 297039Snate@binkert.org */ 307039Snate@binkert.org 316145Snate@binkert.org#ifndef __ARCH_ARM_TYPES_HH__ 329208Snilay@cs.wisc.edu#define __ARCH_ARM_TYPES_HH__ 339208Snilay@cs.wisc.edu 349181Spower.jg@gmail.com#include "base/bitunion.hh" 357002Snate@binkert.org#include "base/types.hh" 367002Snate@binkert.org 377002Snate@binkert.orgnamespace ArmISA 3811307Santhony.gutierrez@amd.com{ 3911307Santhony.gutierrez@amd.com typedef uint32_t MachInst; 407039Snate@binkert.org 417039Snate@binkert.org BitUnion64(ExtMachInst) 427039Snate@binkert.org // Made up bitfields that make life easier. 437039Snate@binkert.org Bitfield<33> sevenAndFour; 447039Snate@binkert.org Bitfield<32> isMisc; 457039Snate@binkert.org 467039Snate@binkert.org // All the different types of opcode fields. 476145Snate@binkert.org Bitfield<27, 25> encoding; 488090Snilay@cs.wisc.edu Bitfield<24, 21> opcode; 496285Snate@binkert.org Bitfield<24, 20> mediaOpcode; 507039Snate@binkert.org Bitfield<24> opcode24; 517039Snate@binkert.org Bitfield<23, 20> opcode23_20; 527039Snate@binkert.org Bitfield<23, 21> opcode23_21; 537039Snate@binkert.org Bitfield<22> opcode22; 547039Snate@binkert.org Bitfield<19> opcode19; 556145Snate@binkert.org Bitfield<18> opcode18; 567039Snate@binkert.org Bitfield<15, 12> opcode15_12; 576285Snate@binkert.org Bitfield<15> opcode15; 589208Snilay@cs.wisc.edu Bitfield<7, 4> miscOpcode; 596145Snate@binkert.org Bitfield<7> opcode7; 607039Snate@binkert.org Bitfield<4> opcode4; 619208Snilay@cs.wisc.edu 629208Snilay@cs.wisc.edu Bitfield<31, 28> condCode; 6311307Santhony.gutierrez@amd.com Bitfield<20> sField; 649208Snilay@cs.wisc.edu Bitfield<19, 16> rn; 6510563Sandreas.hansson@arm.com Bitfield<15, 12> rd; 6611307Santhony.gutierrez@amd.com Bitfield<11, 7> shiftSize; 6711307Santhony.gutierrez@amd.com Bitfield<6, 5> shift; 6811307Santhony.gutierrez@amd.com Bitfield<3, 0> rm; 697039Snate@binkert.org 707039Snate@binkert.org Bitfield<11, 8> rs; 717039Snate@binkert.org 727039Snate@binkert.org SubBitUnion(puswl, 24, 20) 737039Snate@binkert.org Bitfield<24> prepost; 749208Snilay@cs.wisc.edu Bitfield<23> up; 757039Snate@binkert.org Bitfield<22> psruser; 766145Snate@binkert.org Bitfield<21> writeback; 776145Snate@binkert.org Bitfield<20> loadOp; 787039Snate@binkert.org EndSubBitUnion(puswl) 799208Snilay@cs.wisc.edu 806285Snate@binkert.org Bitfield<24, 20> pubwl; 819181Spower.jg@gmail.com 827039Snate@binkert.org Bitfield<7, 0> imm; 837039Snate@binkert.org 847039Snate@binkert.org Bitfield<11, 8> rotate; 857039Snate@binkert.org 867039Snate@binkert.org Bitfield<11, 0> immed11_0; 876285Snate@binkert.org Bitfield<7, 0> immed7_0; 886285Snate@binkert.org 899208Snilay@cs.wisc.edu Bitfield<11, 8> immedHi11_8; 907039Snate@binkert.org Bitfield<3, 0> immedLo3_0; 916285Snate@binkert.org 927039Snate@binkert.org Bitfield<15, 0> regList; 936285Snate@binkert.org 946285Snate@binkert.org Bitfield<23, 0> offset; 957039Snate@binkert.org 969208Snilay@cs.wisc.edu Bitfield<23, 0> immed23_0; 976285Snate@binkert.org 986285Snate@binkert.org Bitfield<11, 8> cpNum; 996285Snate@binkert.org Bitfield<18, 16> fn; 1006285Snate@binkert.org Bitfield<14, 12> fd; 1017039Snate@binkert.org Bitfield<3> fpRegImm; 1027039Snate@binkert.org Bitfield<3, 0> fm; 1036285Snate@binkert.org Bitfield<2, 0> fpImm; 1047039Snate@binkert.org Bitfield<24, 20> punwl; 1056285Snate@binkert.org 1066145Snate@binkert.org Bitfield<7, 0> m5Func; 1077039Snate@binkert.org EndBitUnion(ExtMachInst) 1087039Snate@binkert.org 1096145Snate@binkert.org // Shift types for ARM instructions 1107039Snate@binkert.org enum ArmShiftType { 1117039Snate@binkert.org LSL = 0, 1127039Snate@binkert.org LSR, 1136145Snate@binkert.org ASR, 1146145Snate@binkert.org ROR 1157039Snate@binkert.org }; 1167039Snate@binkert.org 1176145Snate@binkert.org typedef uint64_t LargestRead; 1187039Snate@binkert.org // Need to use 64 bits to make sure that read requests get handled properly 1196145Snate@binkert.org 1206145Snate@binkert.org typedef int RegContextParam; 1217039Snate@binkert.org typedef int RegContextVal; 122 123 //used in FP convert & round function 124 enum ConvertType{ 125 SINGLE_TO_DOUBLE, 126 SINGLE_TO_WORD, 127 SINGLE_TO_LONG, 128 129 DOUBLE_TO_SINGLE, 130 DOUBLE_TO_WORD, 131 DOUBLE_TO_LONG, 132 133 LONG_TO_SINGLE, 134 LONG_TO_DOUBLE, 135 LONG_TO_WORD, 136 LONG_TO_PS, 137 138 WORD_TO_SINGLE, 139 WORD_TO_DOUBLE, 140 WORD_TO_LONG, 141 WORD_TO_PS, 142 143 PL_TO_SINGLE, 144 PU_TO_SINGLE 145 }; 146 147 //used in FP convert & round function 148 enum RoundMode{ 149 RND_ZERO, 150 RND_DOWN, 151 RND_UP, 152 RND_NEAREST 153 }; 154 155 enum OperatingMode { 156 MODE_USER = 16, 157 MODE_FIQ = 17, 158 MODE_IRQ = 18, 159 MODE_SVC = 19, 160 MODE_MON = 22, 161 MODE_ABORT = 23, 162 MODE_UNDEFINED = 27, 163 MODE_SYSTEM = 31 164 }; 165 166 struct CoreSpecific { 167 // Empty for now on the ARM 168 }; 169 170} // namespace ArmISA 171 172#endif 173