tlbi_op.hh revision 13882 
1/*
2 * Copyright (c) 2018-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Giacomo Travaglini
38 */
39
40#ifndef __ARCH_ARM_TLBI_HH__
41#define __ARCH_ARM_TLBI_HH__
42
43#include "arch/arm/system.hh"
44#include "arch/arm/tlb.hh"
45#include "cpu/thread_context.hh"
46
47/**
48 * @file
49 * The file contains the definition of a set of TLB Invalidate
50 * Instructions. Those are the ISA interface for TLB flushing
51 * operations.
52 */
53namespace ArmISA {
54
55class TLBIOp
56{
57  public:
58    TLBIOp(ExceptionLevel _targetEL, bool _secure)
59      : secureLookup(_secure), targetEL(_targetEL)
60    {}
61
62    virtual ~TLBIOp() {}
63    virtual void operator()(ThreadContext* tc) {}
64
65    /**
66     * Broadcast the TLB Invalidate operation to all
67     * TLBs in the Arm system.
68     * @param tc Thread Context
69     */
70    void
71    broadcast(ThreadContext *tc)
72    {
73        System *sys = tc->getSystemPtr();
74        for (int x = 0; x < sys->numContexts(); x++) {
75            ThreadContext *oc = sys->getThreadContext(x);
76            (*this)(oc);
77        }
78    }
79
80  protected:
81    bool secureLookup;
82    ExceptionLevel targetEL;
83};
84
85/** TLB Invalidate All */
86class TLBIALL : public TLBIOp
87{
88  public:
89    TLBIALL(ExceptionLevel _targetEL, bool _secure)
90      : TLBIOp(_targetEL, _secure)
91    {}
92
93    void operator()(ThreadContext* tc) override;
94};
95
96/** Instruction TLB Invalidate All */
97class ITLBIALL : public TLBIOp
98{
99  public:
100    ITLBIALL(ExceptionLevel _targetEL, bool _secure)
101      : TLBIOp(_targetEL, _secure)
102    {}
103
104    void broadcast(ThreadContext *tc) = delete;
105
106    void operator()(ThreadContext* tc) override;
107};
108
109/** Data TLB Invalidate All */
110class DTLBIALL : public TLBIOp
111{
112  public:
113    DTLBIALL(ExceptionLevel _targetEL, bool _secure)
114      : TLBIOp(_targetEL, _secure)
115    {}
116
117    void broadcast(ThreadContext *tc) = delete;
118
119    void operator()(ThreadContext* tc) override;
120};
121
122/** TLB Invalidate by ASID match */
123class TLBIASID : public TLBIOp
124{
125  public:
126    TLBIASID(ExceptionLevel _targetEL, bool _secure, uint16_t _asid)
127      : TLBIOp(_targetEL, _secure), asid(_asid)
128    {}
129
130    void operator()(ThreadContext* tc) override;
131
132  protected:
133    uint16_t asid;
134};
135
136/** Instruction TLB Invalidate by ASID match */
137class ITLBIASID : public TLBIOp
138{
139  public:
140    ITLBIASID(ExceptionLevel _targetEL, bool _secure, uint16_t _asid)
141      : TLBIOp(_targetEL, _secure), asid(_asid)
142    {}
143
144    void broadcast(ThreadContext *tc) = delete;
145
146    void operator()(ThreadContext* tc) override;
147
148  protected:
149    uint16_t asid;
150};
151
152/** Data TLB Invalidate by ASID match */
153class DTLBIASID : public TLBIOp
154{
155  public:
156    DTLBIASID(ExceptionLevel _targetEL, bool _secure, uint16_t _asid)
157      : TLBIOp(_targetEL, _secure), asid(_asid)
158    {}
159
160    void broadcast(ThreadContext *tc) = delete;
161
162    void operator()(ThreadContext* tc) override;
163
164  protected:
165    uint16_t asid;
166};
167
168/** TLB Invalidate All, Non-Secure */
169class TLBIALLN : public TLBIOp
170{
171  public:
172    TLBIALLN(ExceptionLevel _targetEL)
173      : TLBIOp(_targetEL, false)
174    {}
175
176    void operator()(ThreadContext* tc) override;
177};
178
179/** TLB Invalidate by VA, All ASID */
180class TLBIMVAA : public TLBIOp
181{
182  public:
183    TLBIMVAA(ExceptionLevel _targetEL, bool _secure,
184             Addr _addr)
185      : TLBIOp(_targetEL, _secure), addr(_addr)
186    {}
187
188    void operator()(ThreadContext* tc) override;
189
190  protected:
191    Addr addr;
192};
193
194/** TLB Invalidate by VA */
195class TLBIMVA : public TLBIOp
196{
197  public:
198    TLBIMVA(ExceptionLevel _targetEL, bool _secure,
199            Addr _addr, uint16_t _asid)
200      : TLBIOp(_targetEL, _secure), addr(_addr), asid(_asid)
201    {}
202
203    void operator()(ThreadContext* tc) override;
204
205  protected:
206    Addr addr;
207    uint16_t asid;
208};
209
210/** Instruction TLB Invalidate by VA */
211class ITLBIMVA : public TLBIOp
212{
213  public:
214    ITLBIMVA(ExceptionLevel _targetEL, bool _secure,
215             Addr _addr, uint16_t _asid)
216      : TLBIOp(_targetEL, _secure), addr(_addr), asid(_asid)
217    {}
218
219    void broadcast(ThreadContext *tc) = delete;
220
221    void operator()(ThreadContext* tc) override;
222
223  protected:
224    Addr addr;
225    uint16_t asid;
226};
227
228/** Data TLB Invalidate by VA */
229class DTLBIMVA : public TLBIOp
230{
231  public:
232    DTLBIMVA(ExceptionLevel _targetEL, bool _secure,
233             Addr _addr, uint16_t _asid)
234      : TLBIOp(_targetEL, _secure), addr(_addr), asid(_asid)
235    {}
236
237    void broadcast(ThreadContext *tc) = delete;
238
239    void operator()(ThreadContext* tc) override;
240
241  protected:
242    Addr addr;
243    uint16_t asid;
244};
245
246/** TLB Invalidate by Intermediate Physical Address */
247class TLBIIPA : public TLBIOp
248{
249  public:
250    TLBIIPA(ExceptionLevel _targetEL, bool _secure, Addr _addr)
251      : TLBIOp(_targetEL, _secure), addr(_addr)
252    {}
253
254    void operator()(ThreadContext* tc) override;
255
256  protected:
257    Addr addr;
258};
259
260} // namespace ArmISA
261
262#endif //__ARCH_ARM_TLBI_HH__
263