system.cc revision 14128:6ed23d07d0d1 
1/*
2 * Copyright (c) 2010, 2012-2013, 2015,2017-2019 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 */
42
43#include "arch/arm/system.hh"
44
45#include <iostream>
46
47#include "arch/arm/semihosting.hh"
48#include "base/loader/object_file.hh"
49#include "base/loader/symtab.hh"
50#include "cpu/thread_context.hh"
51#include "dev/arm/gic_v3.hh"
52#include "mem/fs_translating_port_proxy.hh"
53#include "mem/physical.hh"
54#include "sim/full_system.hh"
55
56using namespace std;
57using namespace Linux;
58
59ArmSystem::ArmSystem(Params *p)
60    : System(p),
61      bootLoaders(), bootldr(nullptr),
62      _haveSecurity(p->have_security),
63      _haveLPAE(p->have_lpae),
64      _haveVirtualization(p->have_virtualization),
65      _haveCrypto(p->have_crypto),
66      _genericTimer(nullptr),
67      _gic(nullptr),
68      _resetAddr(p->auto_reset_addr ?
69                 (kernelEntry & loadAddrMask) + loadAddrOffset :
70                 p->reset_addr),
71      _highestELIs64(p->highest_el_is_64),
72      _physAddrRange64(p->phys_addr_range_64),
73      _haveLargeAsid64(p->have_large_asid_64),
74      _haveSVE(p->have_sve),
75      _sveVL(p->sve_vl),
76      _havePAN(p->have_pan),
77      _m5opRange(p->m5ops_base ?
78                 RangeSize(p->m5ops_base, 0x10000) :
79                 AddrRange(1, 0)), // Create an empty range if disabled
80      semihosting(p->semihosting),
81      multiProc(p->multi_proc)
82{
83    // Check if the physical address range is valid
84    if (_highestELIs64 && (
85            _physAddrRange64 < 32 ||
86            _physAddrRange64 > 48 ||
87            (_physAddrRange64 % 4 != 0 && _physAddrRange64 != 42))) {
88        fatal("Invalid physical address range (%d)\n", _physAddrRange64);
89    }
90
91    bootLoaders.reserve(p->boot_loader.size());
92    for (const auto &bl : p->boot_loader) {
93        std::unique_ptr<ObjectFile> obj;
94        obj.reset(createObjectFile(bl));
95
96        fatal_if(!obj, "Could not read bootloader: %s\n", bl);
97        bootLoaders.emplace_back(std::move(obj));
98    }
99
100    if (kernel) {
101        bootldr = getBootLoader(kernel);
102    } else if (!bootLoaders.empty()) {
103        // No kernel specified, default to the first boot loader
104        bootldr = bootLoaders[0].get();
105    }
106
107    if (!bootLoaders.empty() && !bootldr)
108        fatal("Can't find a matching boot loader / kernel combination!");
109
110    if (bootldr) {
111        bootldr->loadGlobalSymbols(debugSymbolTable);
112
113        warn_if(bootldr->entryPoint() != _resetAddr,
114                "Bootloader entry point %#x overriding reset address %#x",
115                bootldr->entryPoint(), _resetAddr);
116        const_cast<Addr&>(_resetAddr) = bootldr->entryPoint();
117
118        if ((bootldr->getArch() == ObjectFile::Arm64) && !_highestELIs64) {
119            warn("Highest ARM exception-level set to AArch32 but bootloader "
120                  "is for AArch64. Assuming you wanted these to match.\n");
121            _highestELIs64 = true;
122        } else if ((bootldr->getArch() == ObjectFile::Arm) && _highestELIs64) {
123            warn("Highest ARM exception-level set to AArch64 but bootloader "
124                  "is for AArch32. Assuming you wanted these to match.\n");
125            _highestELIs64 = false;
126        }
127    }
128
129    debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk");
130}
131
132void
133ArmSystem::initState()
134{
135    // Moved from the constructor to here since it relies on the
136    // address map being resolved in the interconnect
137
138    // Call the initialisation of the super class
139    System::initState();
140
141    const Params* p = params();
142
143    if (bootldr) {
144        bool isGICv3System = dynamic_cast<Gicv3 *>(getGIC()) != nullptr;
145        bootldr->loadSections(physProxy);
146
147        inform("Using bootloader at address %#x\n", bootldr->entryPoint());
148
149        // Put the address of the boot loader into r7 so we know
150        // where to branch to after the reset fault
151        // All other values needed by the boot loader to know what to do
152        if (!p->flags_addr)
153           fatal("flags_addr must be set with bootloader\n");
154
155        if (!p->gic_cpu_addr && !isGICv3System)
156            fatal("gic_cpu_addr must be set with bootloader\n");
157
158        for (int i = 0; i < threadContexts.size(); i++) {
159            if (!_highestELIs64)
160                threadContexts[i]->setIntReg(3, (kernelEntry & loadAddrMask) +
161                        loadAddrOffset);
162            if (!isGICv3System)
163                threadContexts[i]->setIntReg(4, params()->gic_cpu_addr);
164            threadContexts[i]->setIntReg(5, params()->flags_addr);
165        }
166        inform("Using kernel entry physical address at %#x\n",
167               (kernelEntry & loadAddrMask) + loadAddrOffset);
168    } else {
169        // Set the initial PC to be at start of the kernel code
170        if (!_highestELIs64)
171            threadContexts[0]->pcState((kernelEntry & loadAddrMask) +
172                    loadAddrOffset);
173    }
174}
175
176ArmSystem*
177ArmSystem::getArmSystem(ThreadContext *tc)
178{
179    ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr());
180    assert(a_sys);
181    return a_sys;
182}
183
184bool
185ArmSystem::haveSecurity(ThreadContext *tc)
186{
187    return FullSystem? getArmSystem(tc)->haveSecurity() : false;
188}
189
190
191ArmSystem::~ArmSystem()
192{
193    if (debugPrintkEvent)
194        delete debugPrintkEvent;
195}
196
197ObjectFile *
198ArmSystem::getBootLoader(ObjectFile *const obj)
199{
200    for (auto &bl : bootLoaders) {
201        if (bl->getArch() == obj->getArch())
202            return bl.get();
203    }
204
205    return nullptr;
206}
207
208bool
209ArmSystem::haveLPAE(ThreadContext *tc)
210{
211    return FullSystem? getArmSystem(tc)->haveLPAE() : false;
212}
213
214bool
215ArmSystem::haveVirtualization(ThreadContext *tc)
216{
217    return FullSystem? getArmSystem(tc)->haveVirtualization() : false;
218}
219
220bool
221ArmSystem::highestELIs64(ThreadContext *tc)
222{
223    return FullSystem? getArmSystem(tc)->highestELIs64() : true;
224}
225
226ExceptionLevel
227ArmSystem::highestEL(ThreadContext *tc)
228{
229    return FullSystem? getArmSystem(tc)->highestEL() : EL1;
230}
231
232bool
233ArmSystem::haveEL(ThreadContext *tc, ExceptionLevel el)
234{
235    switch (el) {
236      case EL0:
237      case EL1:
238        return true;
239      case EL2:
240        return haveVirtualization(tc);
241      case EL3:
242        return haveSecurity(tc);
243      default:
244        warn("Unimplemented Exception Level\n");
245        return false;
246    }
247}
248
249Addr
250ArmSystem::resetAddr(ThreadContext *tc)
251{
252    return getArmSystem(tc)->resetAddr();
253}
254
255uint8_t
256ArmSystem::physAddrRange(ThreadContext *tc)
257{
258    return getArmSystem(tc)->physAddrRange();
259}
260
261Addr
262ArmSystem::physAddrMask(ThreadContext *tc)
263{
264    return getArmSystem(tc)->physAddrMask();
265}
266
267bool
268ArmSystem::haveLargeAsid64(ThreadContext *tc)
269{
270    return getArmSystem(tc)->haveLargeAsid64();
271}
272
273bool
274ArmSystem::haveSemihosting(ThreadContext *tc)
275{
276    return FullSystem && getArmSystem(tc)->haveSemihosting();
277}
278
279uint64_t
280ArmSystem::callSemihosting64(ThreadContext *tc,
281                             uint32_t op, uint64_t param)
282{
283    ArmSystem *sys = getArmSystem(tc);
284    return sys->semihosting->call64(tc, op, param);
285}
286
287uint32_t
288ArmSystem::callSemihosting32(ThreadContext *tc,
289                             uint32_t op, uint32_t param)
290{
291    ArmSystem *sys = getArmSystem(tc);
292    return sys->semihosting->call32(tc, op, param);
293}
294
295ArmSystem *
296ArmSystemParams::create()
297{
298    return new ArmSystem(this);
299}
300
301void
302GenericArmSystem::initState()
303{
304    // Moved from the constructor to here since it relies on the
305    // address map being resolved in the interconnect
306
307    // Call the initialisation of the super class
308    ArmSystem::initState();
309}
310
311GenericArmSystem *
312GenericArmSystemParams::create()
313{
314
315    return new GenericArmSystem(this);
316}
317