system.cc revision 13531:e6f1bf55d038 
1/*
2 * Copyright (c) 2010, 2012-2013, 2015,2017-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 */
42
43#include "arch/arm/system.hh"
44
45#include <iostream>
46
47#include "arch/arm/semihosting.hh"
48#include "base/loader/object_file.hh"
49#include "base/loader/symtab.hh"
50#include "cpu/thread_context.hh"
51#include "dev/arm/gic_v3.hh"
52#include "mem/fs_translating_port_proxy.hh"
53#include "mem/physical.hh"
54#include "sim/full_system.hh"
55
56using namespace std;
57using namespace Linux;
58
59ArmSystem::ArmSystem(Params *p)
60    : System(p),
61      bootLoaders(), bootldr(nullptr),
62      _haveSecurity(p->have_security),
63      _haveLPAE(p->have_lpae),
64      _haveVirtualization(p->have_virtualization),
65      _haveCrypto(p->have_crypto),
66      _genericTimer(nullptr),
67      _gic(nullptr),
68      _resetAddr(p->auto_reset_addr ?
69                 (kernelEntry & loadAddrMask) + loadAddrOffset :
70                 p->reset_addr),
71      _highestELIs64(p->highest_el_is_64),
72      _physAddrRange64(p->phys_addr_range_64),
73      _haveLargeAsid64(p->have_large_asid_64),
74      _m5opRange(p->m5ops_base ?
75                 RangeSize(p->m5ops_base, 0x10000) :
76                 AddrRange(1, 0)), // Create an empty range if disabled
77      semihosting(p->semihosting),
78      multiProc(p->multi_proc)
79{
80    // Check if the physical address range is valid
81    if (_highestELIs64 && (
82            _physAddrRange64 < 32 ||
83            _physAddrRange64 > 48 ||
84            (_physAddrRange64 % 4 != 0 && _physAddrRange64 != 42))) {
85        fatal("Invalid physical address range (%d)\n", _physAddrRange64);
86    }
87
88    bootLoaders.reserve(p->boot_loader.size());
89    for (const auto &bl : p->boot_loader) {
90        std::unique_ptr<ObjectFile> obj;
91        obj.reset(createObjectFile(bl));
92
93        fatal_if(!obj, "Could not read bootloader: %s\n", bl);
94        bootLoaders.emplace_back(std::move(obj));
95    }
96
97    if (kernel) {
98        bootldr = getBootLoader(kernel);
99    } else if (!bootLoaders.empty()) {
100        // No kernel specified, default to the first boot loader
101        bootldr = bootLoaders[0].get();
102    }
103
104    if (!bootLoaders.empty() && !bootldr)
105        fatal("Can't find a matching boot loader / kernel combination!");
106
107    if (bootldr) {
108        bootldr->loadGlobalSymbols(debugSymbolTable);
109
110        warn_if(bootldr->entryPoint() != _resetAddr,
111                "Bootloader entry point %#x overriding reset address %#x",
112                bootldr->entryPoint(), _resetAddr);
113        const_cast<Addr&>(_resetAddr) = bootldr->entryPoint();
114
115        if ((bootldr->getArch() == ObjectFile::Arm64) && !_highestELIs64) {
116            warn("Highest ARM exception-level set to AArch32 but bootloader "
117                  "is for AArch64. Assuming you wanted these to match.\n");
118            _highestELIs64 = true;
119        } else if ((bootldr->getArch() == ObjectFile::Arm) && _highestELIs64) {
120            warn("Highest ARM exception-level set to AArch64 but bootloader "
121                  "is for AArch32. Assuming you wanted these to match.\n");
122            _highestELIs64 = false;
123        }
124    }
125
126    debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk");
127}
128
129void
130ArmSystem::initState()
131{
132    // Moved from the constructor to here since it relies on the
133    // address map being resolved in the interconnect
134
135    // Call the initialisation of the super class
136    System::initState();
137
138    const Params* p = params();
139
140    if (bootldr) {
141        bool isGICv3System = dynamic_cast<Gicv3 *>(getGIC()) != nullptr;
142        bootldr->loadSections(physProxy);
143
144        inform("Using bootloader at address %#x\n", bootldr->entryPoint());
145
146        // Put the address of the boot loader into r7 so we know
147        // where to branch to after the reset fault
148        // All other values needed by the boot loader to know what to do
149        if (!p->flags_addr)
150           fatal("flags_addr must be set with bootloader\n");
151
152        if (!p->gic_cpu_addr && !isGICv3System)
153            fatal("gic_cpu_addr must be set with bootloader\n");
154
155        for (int i = 0; i < threadContexts.size(); i++) {
156            if (!_highestELIs64)
157                threadContexts[i]->setIntReg(3, (kernelEntry & loadAddrMask) +
158                        loadAddrOffset);
159            if (!isGICv3System)
160                threadContexts[i]->setIntReg(4, params()->gic_cpu_addr);
161            threadContexts[i]->setIntReg(5, params()->flags_addr);
162        }
163        inform("Using kernel entry physical address at %#x\n",
164               (kernelEntry & loadAddrMask) + loadAddrOffset);
165    } else {
166        // Set the initial PC to be at start of the kernel code
167        if (!_highestELIs64)
168            threadContexts[0]->pcState((kernelEntry & loadAddrMask) +
169                    loadAddrOffset);
170    }
171}
172
173ArmSystem*
174ArmSystem::getArmSystem(ThreadContext *tc)
175{
176    ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr());
177    assert(a_sys);
178    return a_sys;
179}
180
181bool
182ArmSystem::haveSecurity(ThreadContext *tc)
183{
184    return FullSystem? getArmSystem(tc)->haveSecurity() : false;
185}
186
187
188ArmSystem::~ArmSystem()
189{
190    if (debugPrintkEvent)
191        delete debugPrintkEvent;
192}
193
194ObjectFile *
195ArmSystem::getBootLoader(ObjectFile *const obj)
196{
197    for (auto &bl : bootLoaders) {
198        if (bl->getArch() == obj->getArch())
199            return bl.get();
200    }
201
202    return nullptr;
203}
204
205bool
206ArmSystem::haveLPAE(ThreadContext *tc)
207{
208    return FullSystem? getArmSystem(tc)->haveLPAE() : false;
209}
210
211bool
212ArmSystem::haveVirtualization(ThreadContext *tc)
213{
214    return FullSystem? getArmSystem(tc)->haveVirtualization() : false;
215}
216
217bool
218ArmSystem::highestELIs64(ThreadContext *tc)
219{
220    return FullSystem? getArmSystem(tc)->highestELIs64() : true;
221}
222
223ExceptionLevel
224ArmSystem::highestEL(ThreadContext *tc)
225{
226    return FullSystem? getArmSystem(tc)->highestEL() : EL1;
227}
228
229bool
230ArmSystem::haveEL(ThreadContext *tc, ExceptionLevel el)
231{
232    switch (el) {
233      case EL0:
234      case EL1:
235        return true;
236      case EL2:
237        return haveVirtualization(tc);
238      case EL3:
239        return haveSecurity(tc);
240      default:
241        warn("Unimplemented Exception Level\n");
242        return false;
243    }
244}
245
246Addr
247ArmSystem::resetAddr(ThreadContext *tc)
248{
249    return getArmSystem(tc)->resetAddr();
250}
251
252uint8_t
253ArmSystem::physAddrRange(ThreadContext *tc)
254{
255    return getArmSystem(tc)->physAddrRange();
256}
257
258Addr
259ArmSystem::physAddrMask(ThreadContext *tc)
260{
261    return getArmSystem(tc)->physAddrMask();
262}
263
264bool
265ArmSystem::haveLargeAsid64(ThreadContext *tc)
266{
267    return getArmSystem(tc)->haveLargeAsid64();
268}
269
270bool
271ArmSystem::haveSemihosting(ThreadContext *tc)
272{
273    return FullSystem && getArmSystem(tc)->haveSemihosting();
274}
275
276uint64_t
277ArmSystem::callSemihosting64(ThreadContext *tc,
278                             uint32_t op, uint64_t param)
279{
280    ArmSystem *sys = getArmSystem(tc);
281    return sys->semihosting->call64(tc, op, param);
282}
283
284uint32_t
285ArmSystem::callSemihosting32(ThreadContext *tc,
286                             uint32_t op, uint32_t param)
287{
288    ArmSystem *sys = getArmSystem(tc);
289    return sys->semihosting->call32(tc, op, param);
290}
291
292ArmSystem *
293ArmSystemParams::create()
294{
295    return new ArmSystem(this);
296}
297
298void
299GenericArmSystem::initState()
300{
301    // Moved from the constructor to here since it relies on the
302    // address map being resolved in the interconnect
303
304    // Call the initialisation of the super class
305    ArmSystem::initState();
306}
307
308GenericArmSystem *
309GenericArmSystemParams::create()
310{
311
312    return new GenericArmSystem(this);
313}
314