system.cc revision 12525:2959af162048 
1/*
2 * Copyright (c) 2010, 2012-2013, 2015,2017-2018 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 */
42
43#include "arch/arm/system.hh"
44
45#include <iostream>
46
47#include "base/loader/object_file.hh"
48#include "base/loader/symtab.hh"
49#include "cpu/thread_context.hh"
50#include "mem/fs_translating_port_proxy.hh"
51#include "mem/physical.hh"
52#include "sim/full_system.hh"
53
54using namespace std;
55using namespace Linux;
56
57ArmSystem::ArmSystem(Params *p)
58    : System(p),
59      bootLoaders(), bootldr(nullptr),
60      _haveSecurity(p->have_security),
61      _haveLPAE(p->have_lpae),
62      _haveVirtualization(p->have_virtualization),
63      _genericTimer(nullptr),
64      _highestELIs64(p->highest_el_is_64),
65      _resetAddr64(p->auto_reset_addr_64 ?
66                   (kernelEntry & loadAddrMask) + loadAddrOffset :
67                   p->reset_addr_64),
68      _physAddrRange64(p->phys_addr_range_64),
69      _haveLargeAsid64(p->have_large_asid_64),
70      _m5opRange(p->m5ops_base ?
71                 RangeSize(p->m5ops_base, 0x10000) :
72                 AddrRange(1, 0)), // Create an empty range if disabled
73      multiProc(p->multi_proc)
74{
75    // Check if the physical address range is valid
76    if (_highestELIs64 && (
77            _physAddrRange64 < 32 ||
78            _physAddrRange64 > 48 ||
79            (_physAddrRange64 % 4 != 0 && _physAddrRange64 != 42))) {
80        fatal("Invalid physical address range (%d)\n", _physAddrRange64);
81    }
82
83    bootLoaders.reserve(p->boot_loader.size());
84    for (const auto &bl : p->boot_loader) {
85        std::unique_ptr<ObjectFile> obj;
86        obj.reset(createObjectFile(bl));
87
88        fatal_if(!obj, "Could not read bootloader: %s\n", bl);
89        bootLoaders.emplace_back(std::move(obj));
90    }
91
92    if (kernel) {
93        bootldr = getBootLoader(kernel);
94    } else if (!bootLoaders.empty()) {
95        // No kernel specified, default to the first boot loader
96        bootldr = bootLoaders[0].get();
97    }
98
99    if (!bootLoaders.empty() && !bootldr)
100        fatal("Can't find a matching boot loader / kernel combination!");
101
102    if (bootldr) {
103        bootldr->loadGlobalSymbols(debugSymbolTable);
104        if ((bootldr->getArch() == ObjectFile::Arm64) && !_highestELIs64) {
105            warn("Highest ARM exception-level set to AArch32 but bootloader "
106                  "is for AArch64. Assuming you wanted these to match.\n");
107            _highestELIs64 = true;
108        } else if ((bootldr->getArch() == ObjectFile::Arm) && _highestELIs64) {
109            warn("Highest ARM exception-level set to AArch64 but bootloader "
110                  "is for AArch32. Assuming you wanted these to match.\n");
111            _highestELIs64 = false;
112        }
113    }
114
115    debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk");
116}
117
118void
119ArmSystem::initState()
120{
121    // Moved from the constructor to here since it relies on the
122    // address map being resolved in the interconnect
123
124    // Call the initialisation of the super class
125    System::initState();
126
127    const Params* p = params();
128
129    if (bootldr) {
130        bootldr->loadSections(physProxy);
131
132        uint8_t jump_to_bl_32[] =
133        {
134            0x07, 0xf0, 0xa0, 0xe1  // branch to r7 in aarch32
135        };
136
137        uint8_t jump_to_bl_64[] =
138        {
139            0xe0, 0x00, 0x1f, 0xd6  // instruction "br x7" in aarch64
140        };
141
142        // write the jump to branch table into address 0
143        if (!_highestELIs64)
144            physProxy.writeBlob(0x0, jump_to_bl_32, sizeof(jump_to_bl_32));
145        else
146            physProxy.writeBlob(0x0, jump_to_bl_64, sizeof(jump_to_bl_64));
147
148        inform("Using bootloader at address %#x\n", bootldr->entryPoint());
149
150        // Put the address of the boot loader into r7 so we know
151        // where to branch to after the reset fault
152        // All other values needed by the boot loader to know what to do
153        if (!p->gic_cpu_addr || !p->flags_addr)
154            fatal("gic_cpu_addr && flags_addr must be set with bootloader\n");
155
156        for (int i = 0; i < threadContexts.size(); i++) {
157            if (!_highestELIs64)
158                threadContexts[i]->setIntReg(3, (kernelEntry & loadAddrMask) +
159                        loadAddrOffset);
160            threadContexts[i]->setIntReg(4, params()->gic_cpu_addr);
161            threadContexts[i]->setIntReg(5, params()->flags_addr);
162            threadContexts[i]->setIntReg(7, bootldr->entryPoint());
163        }
164        inform("Using kernel entry physical address at %#x\n",
165               (kernelEntry & loadAddrMask) + loadAddrOffset);
166    } else {
167        // Set the initial PC to be at start of the kernel code
168        if (!_highestELIs64)
169            threadContexts[0]->pcState((kernelEntry & loadAddrMask) +
170                    loadAddrOffset);
171    }
172}
173
174ArmSystem*
175ArmSystem::getArmSystem(ThreadContext *tc)
176{
177    ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr());
178    assert(a_sys);
179    return a_sys;
180}
181
182bool
183ArmSystem::haveSecurity(ThreadContext *tc)
184{
185    return FullSystem? getArmSystem(tc)->haveSecurity() : false;
186}
187
188
189ArmSystem::~ArmSystem()
190{
191    if (debugPrintkEvent)
192        delete debugPrintkEvent;
193}
194
195ObjectFile *
196ArmSystem::getBootLoader(ObjectFile *const obj)
197{
198    for (auto &bl : bootLoaders) {
199        if (bl->getArch() == obj->getArch())
200            return bl.get();
201    }
202
203    return nullptr;
204}
205
206bool
207ArmSystem::haveLPAE(ThreadContext *tc)
208{
209    return FullSystem? getArmSystem(tc)->haveLPAE() : false;
210}
211
212bool
213ArmSystem::haveVirtualization(ThreadContext *tc)
214{
215    return FullSystem? getArmSystem(tc)->haveVirtualization() : false;
216}
217
218bool
219ArmSystem::highestELIs64(ThreadContext *tc)
220{
221    return FullSystem? getArmSystem(tc)->highestELIs64() : true;
222}
223
224ExceptionLevel
225ArmSystem::highestEL(ThreadContext *tc)
226{
227    return FullSystem? getArmSystem(tc)->highestEL() : EL1;
228}
229
230bool
231ArmSystem::haveEL(ThreadContext *tc, ExceptionLevel el)
232{
233    switch (el) {
234      case EL0:
235      case EL1:
236        return true;
237      case EL2:
238        return haveVirtualization(tc);
239      case EL3:
240        return haveSecurity(tc);
241      default:
242        warn("Unimplemented Exception Level\n");
243        return false;
244    }
245}
246
247Addr
248ArmSystem::resetAddr64(ThreadContext *tc)
249{
250    return getArmSystem(tc)->resetAddr64();
251}
252
253uint8_t
254ArmSystem::physAddrRange(ThreadContext *tc)
255{
256    return getArmSystem(tc)->physAddrRange();
257}
258
259Addr
260ArmSystem::physAddrMask(ThreadContext *tc)
261{
262    return getArmSystem(tc)->physAddrMask();
263}
264
265bool
266ArmSystem::haveLargeAsid64(ThreadContext *tc)
267{
268    return getArmSystem(tc)->haveLargeAsid64();
269}
270
271ArmSystem *
272ArmSystemParams::create()
273{
274    return new ArmSystem(this);
275}
276
277void
278GenericArmSystem::initState()
279{
280    // Moved from the constructor to here since it relies on the
281    // address map being resolved in the interconnect
282
283    // Call the initialisation of the super class
284    ArmSystem::initState();
285}
286
287GenericArmSystem *
288GenericArmSystemParams::create()
289{
290
291    return new GenericArmSystem(this);
292}
293