system.cc revision 11234:c273990ed9bf 
1/*
2 * Copyright (c) 2010, 2012-2013, 2015 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2002-2006 The Regents of The University of Michigan
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Ali Saidi
41 */
42
43#include <iostream>
44
45#include "arch/arm/system.hh"
46#include "base/loader/object_file.hh"
47#include "base/loader/symtab.hh"
48#include "cpu/thread_context.hh"
49#include "mem/physical.hh"
50#include "mem/fs_translating_port_proxy.hh"
51#include "sim/full_system.hh"
52
53using namespace std;
54using namespace Linux;
55
56ArmSystem::ArmSystem(Params *p)
57    : System(p),
58      bootLoaders(), bootldr(nullptr),
59      _haveSecurity(p->have_security),
60      _haveLPAE(p->have_lpae),
61      _haveVirtualization(p->have_virtualization),
62      _genericTimer(nullptr),
63      _highestELIs64(p->highest_el_is_64),
64      _resetAddr64(p->reset_addr_64),
65      _physAddrRange64(p->phys_addr_range_64),
66      _haveLargeAsid64(p->have_large_asid_64),
67      multiProc(p->multi_proc)
68{
69    // Check if the physical address range is valid
70    if (_highestELIs64 && (
71            _physAddrRange64 < 32 ||
72            _physAddrRange64 > 48 ||
73            (_physAddrRange64 % 4 != 0 && _physAddrRange64 != 42))) {
74        fatal("Invalid physical address range (%d)\n", _physAddrRange64);
75    }
76
77    bootLoaders.reserve(p->boot_loader.size());
78    for (const auto &bl : p->boot_loader) {
79        std::unique_ptr<ObjectFile> obj;
80        obj.reset(createObjectFile(bl));
81
82        fatal_if(!obj, "Could not read bootloader: %s\n", bl);
83        bootLoaders.emplace_back(std::move(obj));
84    }
85
86    if (kernel) {
87        bootldr = getBootLoader(kernel);
88    } else if (!bootLoaders.empty()) {
89        // No kernel specified, default to the first boot loader
90        bootldr = bootLoaders[0].get();
91    }
92
93    if (!bootLoaders.empty() && !bootldr)
94        fatal("Can't find a matching boot loader / kernel combination!");
95
96    if (bootldr) {
97        bootldr->loadGlobalSymbols(debugSymbolTable);
98        if ((bootldr->getArch() == ObjectFile::Arm64) && !_highestELIs64) {
99            warn("Highest ARM exception-level set to AArch32 but bootloader "
100                  "is for AArch64. Assuming you wanted these to match.\n");
101            _highestELIs64 = true;
102        } else if ((bootldr->getArch() == ObjectFile::Arm) && _highestELIs64) {
103            warn("Highest ARM exception-level set to AArch64 but bootloader "
104                  "is for AArch32. Assuming you wanted these to match.\n");
105            _highestELIs64 = false;
106        }
107    }
108
109    debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk");
110}
111
112void
113ArmSystem::initState()
114{
115    // Moved from the constructor to here since it relies on the
116    // address map being resolved in the interconnect
117
118    // Call the initialisation of the super class
119    System::initState();
120
121    const Params* p = params();
122
123    if (bootldr) {
124        bootldr->loadSections(physProxy);
125
126        uint8_t jump_to_bl_32[] =
127        {
128            0x07, 0xf0, 0xa0, 0xe1  // branch to r7 in aarch32
129        };
130
131        uint8_t jump_to_bl_64[] =
132        {
133            0xe0, 0x00, 0x1f, 0xd6  // instruction "br x7" in aarch64
134        };
135
136        // write the jump to branch table into address 0
137        if (!_highestELIs64)
138            physProxy.writeBlob(0x0, jump_to_bl_32, sizeof(jump_to_bl_32));
139        else
140            physProxy.writeBlob(0x0, jump_to_bl_64, sizeof(jump_to_bl_64));
141
142        inform("Using bootloader at address %#x\n", bootldr->entryPoint());
143
144        // Put the address of the boot loader into r7 so we know
145        // where to branch to after the reset fault
146        // All other values needed by the boot loader to know what to do
147        if (!p->gic_cpu_addr || !p->flags_addr)
148            fatal("gic_cpu_addr && flags_addr must be set with bootloader\n");
149
150        for (int i = 0; i < threadContexts.size(); i++) {
151            if (!_highestELIs64)
152                threadContexts[i]->setIntReg(3, (kernelEntry & loadAddrMask) +
153                        loadAddrOffset);
154            threadContexts[i]->setIntReg(4, params()->gic_cpu_addr);
155            threadContexts[i]->setIntReg(5, params()->flags_addr);
156            threadContexts[i]->setIntReg(7, bootldr->entryPoint());
157        }
158        inform("Using kernel entry physical address at %#x\n",
159               (kernelEntry & loadAddrMask) + loadAddrOffset);
160    } else {
161        // Set the initial PC to be at start of the kernel code
162        if (!_highestELIs64)
163            threadContexts[0]->pcState((kernelEntry & loadAddrMask) +
164                    loadAddrOffset);
165    }
166}
167
168bool
169ArmSystem::haveSecurity(ThreadContext *tc)
170{
171    if (!FullSystem)
172        return false;
173
174    ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr());
175    assert(a_sys);
176    return a_sys->haveSecurity();
177}
178
179
180ArmSystem::~ArmSystem()
181{
182    if (debugPrintkEvent)
183        delete debugPrintkEvent;
184}
185
186ObjectFile *
187ArmSystem::getBootLoader(ObjectFile *const obj)
188{
189    for (auto &bl : bootLoaders) {
190        if (bl->getArch() == obj->getArch())
191            return bl.get();
192    }
193
194    return nullptr;
195}
196
197bool
198ArmSystem::haveLPAE(ThreadContext *tc)
199{
200    if (!FullSystem)
201        return false;
202
203    ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr());
204    assert(a_sys);
205    return a_sys->haveLPAE();
206}
207
208bool
209ArmSystem::haveVirtualization(ThreadContext *tc)
210{
211    if (!FullSystem)
212        return false;
213
214    ArmSystem *a_sys = dynamic_cast<ArmSystem *>(tc->getSystemPtr());
215    assert(a_sys);
216    return a_sys->haveVirtualization();
217}
218
219bool
220ArmSystem::highestELIs64(ThreadContext *tc)
221{
222    return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->highestELIs64();
223}
224
225ExceptionLevel
226ArmSystem::highestEL(ThreadContext *tc)
227{
228    return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->highestEL();
229}
230
231Addr
232ArmSystem::resetAddr64(ThreadContext *tc)
233{
234    return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->resetAddr64();
235}
236
237uint8_t
238ArmSystem::physAddrRange(ThreadContext *tc)
239{
240    return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->physAddrRange();
241}
242
243Addr
244ArmSystem::physAddrMask(ThreadContext *tc)
245{
246    return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->physAddrMask();
247}
248
249bool
250ArmSystem::haveLargeAsid64(ThreadContext *tc)
251{
252    return dynamic_cast<ArmSystem *>(tc->getSystemPtr())->haveLargeAsid64();
253}
254
255ArmSystem *
256ArmSystemParams::create()
257{
258    return new ArmSystem(this);
259}
260
261void
262GenericArmSystem::initState()
263{
264    // Moved from the constructor to here since it relies on the
265    // address map being resolved in the interconnect
266
267    // Call the initialisation of the super class
268    ArmSystem::initState();
269}
270
271GenericArmSystem *
272GenericArmSystemParams::create()
273{
274
275    return new GenericArmSystem(this);
276}
277