system.cc revision 8885
12567SN/A/* 27585SAli.Saidi@arm.com * Copyright (c) 2010 ARM Limited 37585SAli.Saidi@arm.com * All rights reserved 47585SAli.Saidi@arm.com * 57585SAli.Saidi@arm.com * The license below extends only to copyright in the software and shall 67585SAli.Saidi@arm.com * not be construed as granting a license to any other intellectual 77585SAli.Saidi@arm.com * property including but not limited to intellectual property relating 87585SAli.Saidi@arm.com * to a hardware implementation of the functionality of the software 97585SAli.Saidi@arm.com * licensed hereunder. You may use the software subject to the license 107585SAli.Saidi@arm.com * terms below provided that you ensure that this notice is replicated 117585SAli.Saidi@arm.com * unmodified and in its entirety in all distributions of the software, 127585SAli.Saidi@arm.com * modified or unmodified, in source code or in binary form. 137585SAli.Saidi@arm.com * 142567SN/A * Copyright (c) 2002-2006 The Regents of The University of Michigan 152567SN/A * All rights reserved. 162567SN/A * 172567SN/A * Redistribution and use in source and binary forms, with or without 182567SN/A * modification, are permitted provided that the following conditions are 192567SN/A * met: redistributions of source code must retain the above copyright 202567SN/A * notice, this list of conditions and the following disclaimer; 212567SN/A * redistributions in binary form must reproduce the above copyright 222567SN/A * notice, this list of conditions and the following disclaimer in the 232567SN/A * documentation and/or other materials provided with the distribution; 242567SN/A * neither the name of the copyright holders nor the names of its 252567SN/A * contributors may be used to endorse or promote products derived from 262567SN/A * this software without specific prior written permission. 272567SN/A * 282567SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292567SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 302567SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312567SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322567SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332567SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342567SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352567SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362567SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372567SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382567SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392665SN/A * 402665SN/A * Authors: Ali Saidi 412567SN/A */ 422567SN/A 438229Snate@binkert.org#include <iostream> 448229Snate@binkert.org 456757SAli.Saidi@ARM.com#include "arch/arm/system.hh" 468286SAli.Saidi@ARM.com#include "base/loader/object_file.hh" 478286SAli.Saidi@ARM.com#include "base/loader/symtab.hh" 488286SAli.Saidi@ARM.com#include "cpu/thread_context.hh" 498286SAli.Saidi@ARM.com#include "mem/physical.hh" 508706Sandreas.hansson@arm.com#include "mem/fs_translating_port_proxy.hh" 512567SN/A 527650SAli.Saidi@ARM.comusing namespace std; 537650SAli.Saidi@ARM.comusing namespace Linux; 542567SN/A 556757SAli.Saidi@ARM.comArmSystem::ArmSystem(Params *p) 568286SAli.Saidi@ARM.com : System(p), bootldr(NULL) 572567SN/A{ 588885SAli.Saidi@ARM.com if ((p->boot_loader == "") != (p->boot_loader_mem == NULL)) 598885SAli.Saidi@ARM.com fatal("If boot_loader is specifed, memory to load it must be also.\n"); 608885SAli.Saidi@ARM.com 618885SAli.Saidi@ARM.com if (p->boot_loader != "") { 628885SAli.Saidi@ARM.com bootldr = createObjectFile(p->boot_loader); 638885SAli.Saidi@ARM.com 648885SAli.Saidi@ARM.com if (!bootldr) 658885SAli.Saidi@ARM.com fatal("Could not read bootloader: %s\n", p->boot_loader); 668885SAli.Saidi@ARM.com 678885SAli.Saidi@ARM.com bootldr->loadGlobalSymbols(debugSymbolTable); 688885SAli.Saidi@ARM.com 698885SAli.Saidi@ARM.com } 708885SAli.Saidi@ARM.com debugPrintkEvent = addKernelFuncEvent<DebugPrintkEvent>("dprintk"); 718706Sandreas.hansson@arm.com} 728706Sandreas.hansson@arm.com 738706Sandreas.hansson@arm.comvoid 748706Sandreas.hansson@arm.comArmSystem::initState() 758706Sandreas.hansson@arm.com{ 768706Sandreas.hansson@arm.com // Moved from the constructor to here since it relies on the 778706Sandreas.hansson@arm.com // address map being resolved in the interconnect 788706Sandreas.hansson@arm.com 798706Sandreas.hansson@arm.com // Call the initialisation of the super class 808706Sandreas.hansson@arm.com System::initState(); 818706Sandreas.hansson@arm.com 828706Sandreas.hansson@arm.com const Params* p = params(); 832567SN/A 848885SAli.Saidi@ARM.com if (bootldr) { 858706Sandreas.hansson@arm.com bootldr->loadSections(physProxy); 868286SAli.Saidi@ARM.com 878286SAli.Saidi@ARM.com uint8_t jump_to_bl[] = 888286SAli.Saidi@ARM.com { 898286SAli.Saidi@ARM.com 0x07, 0xf0, 0xa0, 0xe1 // branch to r7 908286SAli.Saidi@ARM.com }; 918852Sandreas.hansson@arm.com physProxy.writeBlob(0x0, jump_to_bl, sizeof(jump_to_bl)); 928286SAli.Saidi@ARM.com 938286SAli.Saidi@ARM.com inform("Using bootloader at address %#x\n", bootldr->entryPoint()); 948286SAli.Saidi@ARM.com 958286SAli.Saidi@ARM.com // Put the address of the boot loader into r7 so we know 968286SAli.Saidi@ARM.com // where to branch to after the reset fault 978286SAli.Saidi@ARM.com // All other values needed by the boot loader to know what to do 988885SAli.Saidi@ARM.com if (!p->gic_cpu_addr || !p->flags_addr) 998885SAli.Saidi@ARM.com fatal("gic_cpu_addr && flags_addr must be set with bootloader\n"); 1008885SAli.Saidi@ARM.com 1018286SAli.Saidi@ARM.com for (int i = 0; i < threadContexts.size(); i++) { 1028286SAli.Saidi@ARM.com threadContexts[i]->setIntReg(3, kernelEntry & loadAddrMask); 1038286SAli.Saidi@ARM.com threadContexts[i]->setIntReg(4, params()->gic_cpu_addr); 1048286SAli.Saidi@ARM.com threadContexts[i]->setIntReg(5, params()->flags_addr); 1058286SAli.Saidi@ARM.com threadContexts[i]->setIntReg(7, bootldr->entryPoint()); 1068286SAli.Saidi@ARM.com } 1078286SAli.Saidi@ARM.com } else { 1088286SAli.Saidi@ARM.com // Set the initial PC to be at start of the kernel code 1098286SAli.Saidi@ARM.com threadContexts[0]->pcState(kernelEntry & loadAddrMask); 1108286SAli.Saidi@ARM.com } 1118885SAli.Saidi@ARM.com 1128299Schander.sudanthi@arm.com for (int i = 0; i < threadContexts.size(); i++) { 1138706Sandreas.hansson@arm.com if (p->midr_regval) { 1148299Schander.sudanthi@arm.com threadContexts[i]->setMiscReg(ArmISA::MISCREG_MIDR, 1158706Sandreas.hansson@arm.com p->midr_regval); 1168299Schander.sudanthi@arm.com } 1178299Schander.sudanthi@arm.com } 1182567SN/A} 1192567SN/A 1206757SAli.Saidi@ARM.comArmSystem::~ArmSystem() 1212567SN/A{ 1228286SAli.Saidi@ARM.com if (debugPrintkEvent) 1238286SAli.Saidi@ARM.com delete debugPrintkEvent; 1242567SN/A} 1252567SN/A 1266757SAli.Saidi@ARM.com 1276757SAli.Saidi@ARM.comArmSystem * 1286757SAli.Saidi@ARM.comArmSystemParams::create() 1292567SN/A{ 1306757SAli.Saidi@ARM.com return new ArmSystem(this); 1312567SN/A} 132