stacktrace.cc revision 6757
13558SN/A/* 23558SN/A * Copyright (c) 2005 The Regents of The University of Michigan 33558SN/A * All rights reserved. 43558SN/A * 53558SN/A * Redistribution and use in source and binary forms, with or without 63558SN/A * modification, are permitted provided that the following conditions are 73558SN/A * met: redistributions of source code must retain the above copyright 83558SN/A * notice, this list of conditions and the following disclaimer; 93558SN/A * redistributions in binary form must reproduce the above copyright 103558SN/A * notice, this list of conditions and the following disclaimer in the 113558SN/A * documentation and/or other materials provided with the distribution; 123558SN/A * neither the name of the copyright holders nor the names of its 133558SN/A * contributors may be used to endorse or promote products derived from 143558SN/A * this software without specific prior written permission. 153558SN/A * 163558SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 173558SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 183558SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 193558SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 203558SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 213558SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 223558SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 233558SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 243558SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 253558SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 263558SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 273558SN/A * 283558SN/A * Authors: Nathan Binkert 293558SN/A */ 303558SN/A 313558SN/A#include <string> 323558SN/A 336757SAli.Saidi@ARM.com#include "arch/arm/isa_traits.hh" 346757SAli.Saidi@ARM.com#include "arch/arm/stacktrace.hh" 356757SAli.Saidi@ARM.com#include "arch/arm/vtophys.hh" 363558SN/A#include "base/bitfield.hh" 373558SN/A#include "base/trace.hh" 383558SN/A#include "cpu/base.hh" 393558SN/A#include "cpu/thread_context.hh" 403558SN/A#include "sim/system.hh" 413558SN/A 423558SN/Ausing namespace std; 436757SAli.Saidi@ARM.comnamespace ArmISA 443570SN/A{ 453570SN/A ProcessInfo::ProcessInfo(ThreadContext *_tc) 463570SN/A : tc(_tc) 473570SN/A { 483570SN/A Addr addr = 0; 493558SN/A 503570SN/A VirtualPort *vp; 513558SN/A 523570SN/A vp = tc->getVirtPort(); 533558SN/A 543570SN/A if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_size", addr)) 553570SN/A panic("thread info not compiled into kernel\n"); 563570SN/A thread_info_size = vp->readGtoH<int32_t>(addr); 573558SN/A 583570SN/A if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_size", addr)) 593570SN/A panic("thread info not compiled into kernel\n"); 603570SN/A task_struct_size = vp->readGtoH<int32_t>(addr); 613558SN/A 623570SN/A if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_task", addr)) 633570SN/A panic("thread info not compiled into kernel\n"); 643570SN/A task_off = vp->readGtoH<int32_t>(addr); 653558SN/A 663570SN/A if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_pid", addr)) 673570SN/A panic("thread info not compiled into kernel\n"); 683570SN/A pid_off = vp->readGtoH<int32_t>(addr); 693558SN/A 703570SN/A if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_comm", addr)) 713570SN/A panic("thread info not compiled into kernel\n"); 723570SN/A name_off = vp->readGtoH<int32_t>(addr); 733558SN/A } 743558SN/A 753570SN/A Addr 763570SN/A ProcessInfo::task(Addr ksp) const 773570SN/A { 786757SAli.Saidi@ARM.com return 0; 793558SN/A } 803558SN/A 813570SN/A int 823570SN/A ProcessInfo::pid(Addr ksp) const 833570SN/A { 846757SAli.Saidi@ARM.com return -1; 853558SN/A } 863558SN/A 873570SN/A string 883570SN/A ProcessInfo::name(Addr ksp) const 893570SN/A { 906757SAli.Saidi@ARM.com return "Implement me"; 913570SN/A } 923558SN/A 933570SN/A StackTrace::StackTrace() 943570SN/A : tc(0), stack(64) 953570SN/A { 963570SN/A } 973570SN/A 983570SN/A StackTrace::StackTrace(ThreadContext *_tc, StaticInstPtr inst) 993570SN/A : tc(0), stack(64) 1003570SN/A { 1013570SN/A trace(_tc, inst); 1023570SN/A } 1033570SN/A 1043570SN/A StackTrace::~StackTrace() 1053570SN/A { 1063570SN/A } 1073570SN/A 1083570SN/A void 1093570SN/A StackTrace::trace(ThreadContext *_tc, bool is_call) 1103570SN/A { 1113558SN/A } 1123558SN/A 1133570SN/A bool 1143570SN/A StackTrace::isEntry(Addr addr) 1153570SN/A { 1163558SN/A return false; 1173558SN/A } 1183558SN/A 1193570SN/A bool 1203570SN/A StackTrace::decodeStack(MachInst inst, int &disp) 1213570SN/A { 1226757SAli.Saidi@ARM.com return false; 1233570SN/A } 1243570SN/A 1253570SN/A bool 1263570SN/A StackTrace::decodeSave(MachInst inst, int ®, int &disp) 1273570SN/A { 1286757SAli.Saidi@ARM.com return false; 1293570SN/A } 1303570SN/A 1313570SN/A /* 1323570SN/A * Decode the function prologue for the function we're in, and note 1333570SN/A * which registers are stored where, and how large the stack frame is. 1343570SN/A */ 1353570SN/A bool 1363570SN/A StackTrace::decodePrologue(Addr sp, Addr callpc, Addr func, 1373570SN/A int &size, Addr &ra) 1383570SN/A { 1396757SAli.Saidi@ARM.com return false; 1403558SN/A } 1413558SN/A 1423570SN/A#if TRACING_ON 1433570SN/A void 1443570SN/A StackTrace::dump() 1453570SN/A { 1463570SN/A DPRINTFN("------ Stack ------\n"); 1476757SAli.Saidi@ARM.com 1486757SAli.Saidi@ARM.com DPRINTFN(" Not implemented\n"); 1493570SN/A } 1503570SN/A#endif 1513558SN/A} 152