remote_gdb.cc revision 8541
13536SN/A/*
27752SWilliam.Wang@arm.com * Copyright (c) 2010 ARM Limited
37752SWilliam.Wang@arm.com * All rights reserved
47752SWilliam.Wang@arm.com *
57752SWilliam.Wang@arm.com * The license below extends only to copyright in the software and shall
67752SWilliam.Wang@arm.com * not be construed as granting a license to any other intellectual
77752SWilliam.Wang@arm.com * property including but not limited to intellectual property relating
87752SWilliam.Wang@arm.com * to a hardware implementation of the functionality of the software
97752SWilliam.Wang@arm.com * licensed hereunder.  You may use the software subject to the license
107752SWilliam.Wang@arm.com * terms below provided that you ensure that this notice is replicated
117752SWilliam.Wang@arm.com * unmodified and in its entirety in all distributions of the software,
127752SWilliam.Wang@arm.com * modified or unmodified, in source code or in binary form.
137752SWilliam.Wang@arm.com *
143536SN/A * Copyright (c) 2002-2005 The Regents of The University of Michigan
153536SN/A * All rights reserved.
163536SN/A *
173536SN/A * Redistribution and use in source and binary forms, with or without
183536SN/A * modification, are permitted provided that the following conditions are
193536SN/A * met: redistributions of source code must retain the above copyright
203536SN/A * notice, this list of conditions and the following disclaimer;
213536SN/A * redistributions in binary form must reproduce the above copyright
223536SN/A * notice, this list of conditions and the following disclaimer in the
233536SN/A * documentation and/or other materials provided with the distribution;
243536SN/A * neither the name of the copyright holders nor the names of its
253536SN/A * contributors may be used to endorse or promote products derived from
263536SN/A * this software without specific prior written permission.
273536SN/A *
283536SN/A * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
293536SN/A * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
303536SN/A * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
313536SN/A * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
323536SN/A * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
333536SN/A * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
343536SN/A * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
353536SN/A * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
363536SN/A * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
373536SN/A * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
383536SN/A * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
393536SN/A *
403536SN/A * Authors: Nathan Binkert
417752SWilliam.Wang@arm.com *          William Wang
423536SN/A */
433536SN/A
443536SN/A/*
458332Snate@binkert.org * Copyright (c) 1990, 1993 The Regents of the University of California
468332Snate@binkert.org * All rights reserved
473536SN/A *
483536SN/A * This software was developed by the Computer Systems Engineering group
493536SN/A * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
503536SN/A * contributed to Berkeley.
513536SN/A *
523536SN/A * All advertising materials mentioning features or use of this software
533536SN/A * must display the following acknowledgement:
545543SN/A *      This product includes software developed by the University of
555543SN/A *      California, Lawrence Berkeley Laboratories.
563536SN/A *
573536SN/A * Redistribution and use in source and binary forms, with or without
583536SN/A * modification, are permitted provided that the following conditions
593536SN/A * are met:
603536SN/A * 1. Redistributions of source code must retain the above copyright
613536SN/A *    notice, this list of conditions and the following disclaimer.
623536SN/A * 2. Redistributions in binary form must reproduce the above copyright
633536SN/A *    notice, this list of conditions and the following disclaimer in the
643536SN/A *    documentation and/or other materials provided with the distribution.
653536SN/A * 3. All advertising materials mentioning features or use of this software
663536SN/A *    must display the following acknowledgement:
675543SN/A *      This product includes software developed by the University of
685543SN/A *      California, Berkeley and its contributors.
693536SN/A * 4. Neither the name of the University nor the names of its contributors
703536SN/A *    may be used to endorse or promote products derived from this software
713536SN/A *    without specific prior written permission.
723536SN/A *
733536SN/A * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
743536SN/A * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
753536SN/A * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
763536SN/A * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
773536SN/A * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
783536SN/A * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
793536SN/A * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
803536SN/A * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
813536SN/A * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
823536SN/A * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
833536SN/A * SUCH DAMAGE.
843536SN/A *
855543SN/A *      @(#)kgdb_stub.c 8.4 (Berkeley) 1/12/94
863536SN/A */
873536SN/A
883536SN/A/*-
893536SN/A * Copyright (c) 2001 The NetBSD Foundation, Inc.
903536SN/A * All rights reserved.
913536SN/A *
923536SN/A * This code is derived from software contributed to The NetBSD Foundation
933536SN/A * by Jason R. Thorpe.
943536SN/A *
953536SN/A * Redistribution and use in source and binary forms, with or without
963536SN/A * modification, are permitted provided that the following conditions
973536SN/A * are met:
983536SN/A * 1. Redistributions of source code must retain the above copyright
993536SN/A *    notice, this list of conditions and the following disclaimer.
1003536SN/A * 2. Redistributions in binary form must reproduce the above copyright
1013536SN/A *    notice, this list of conditions and the following disclaimer in the
1023536SN/A *    documentation and/or other materials provided with the distribution.
1033536SN/A * 3. All advertising materials mentioning features or use of this software
1043536SN/A *    must display the following acknowledgement:
1055543SN/A *      This product includes software developed by the NetBSD
1065543SN/A *      Foundation, Inc. and its contributors.
1073536SN/A * 4. Neither the name of The NetBSD Foundation nor the names of its
1083536SN/A *    contributors may be used to endorse or promote products derived
1093536SN/A *    from this software without specific prior written permission.
1103536SN/A *
1113536SN/A * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
1123536SN/A * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
1133536SN/A * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
1143536SN/A * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
1153536SN/A * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
1163536SN/A * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
1173536SN/A * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
1183536SN/A * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
1193536SN/A * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
1203536SN/A * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
1213536SN/A * POSSIBILITY OF SUCH DAMAGE.
1223536SN/A */
1233536SN/A
1243536SN/A/*
1253536SN/A * $NetBSD: kgdb_stub.c,v 1.8 2001/07/07 22:58:00 wdk Exp $
1263536SN/A *
1273536SN/A * Taken from NetBSD
1283536SN/A *
1293536SN/A * "Stub" to allow remote cpu to debug over a serial line using gdb.
1303536SN/A */
1313536SN/A
1323536SN/A#include <sys/signal.h>
1335569SN/A#include <unistd.h>
1343536SN/A
1353536SN/A#include <string>
1363536SN/A
1373961SN/A#include "config/full_system.hh"
1383961SN/A#if FULL_SYSTEM
1397752SWilliam.Wang@arm.com#include "arch/arm/vtophys.hh"
1403961SN/A#endif
1413961SN/A
1428229Snate@binkert.org#include "arch/arm/pagetable.hh"
1438229Snate@binkert.org#include "arch/arm/registers.hh"
1448229Snate@binkert.org#include "arch/arm/remote_gdb.hh"
1457752SWilliam.Wang@arm.com#include "arch/arm/utility.hh"
1467752SWilliam.Wang@arm.com#include "arch/arm/vtophys.hh"
1473536SN/A#include "base/intmath.hh"
1483536SN/A#include "base/remote_gdb.hh"
1493536SN/A#include "base/socket.hh"
1503536SN/A#include "base/trace.hh"
1518541Sgblack@eecs.umich.edu#include "cpu/decode.hh"
1528229Snate@binkert.org#include "cpu/static_inst.hh"
1533536SN/A#include "cpu/thread_context.hh"
1547752SWilliam.Wang@arm.com#include "cpu/thread_state.hh"
1558232Snate@binkert.org#include "debug/GDBAcc.hh"
1568232Snate@binkert.org#include "debug/GDBMisc.hh"
1578229Snate@binkert.org#include "mem/page_table.hh"
1583536SN/A#include "mem/physical.hh"
1593536SN/A#include "mem/port.hh"
1603536SN/A#include "sim/system.hh"
1613536SN/A
1623536SN/Ausing namespace std;
1637752SWilliam.Wang@arm.comusing namespace ArmISA;
1643536SN/A
1655569SN/ARemoteGDB::RemoteGDB(System *_system, ThreadContext *tc)
1667752SWilliam.Wang@arm.com    : BaseRemoteGDB(_system, tc, NUMREGS)
1673536SN/A{
1683536SN/A}
1693536SN/A
1705569SN/A/*
1715569SN/A * Determine if the mapping at va..(va+len) is valid.
1725569SN/A */
1733536SN/Abool
1743536SN/ARemoteGDB::acc(Addr va, size_t len)
1753536SN/A{
1767752SWilliam.Wang@arm.com#if FULL_SYSTEM
1773536SN/A    Addr last_va;
1787752SWilliam.Wang@arm.com    va       = truncPage(va);
1797752SWilliam.Wang@arm.com    last_va  = roundPage(va + len);
1803536SN/A
1813536SN/A    do  {
1827752SWilliam.Wang@arm.com        if (virtvalid(context, va)) {
1833536SN/A            return true;
1843536SN/A        }
1855568SN/A        va += PageBytes;
1863536SN/A    } while (va < last_va);
1873536SN/A
1883536SN/A    DPRINTF(GDBAcc, "acc:   %#x mapping is valid\n", va);
1893536SN/A    return true;
1907752SWilliam.Wang@arm.com#else
1917752SWilliam.Wang@arm.com    TlbEntry entry;
1927752SWilliam.Wang@arm.com    //Check to make sure the first byte is mapped into the processes address
1937752SWilliam.Wang@arm.com    //space.
1947752SWilliam.Wang@arm.com    if (context->getProcessPtr()->pTable->lookup(va, entry))
1957752SWilliam.Wang@arm.com        return true;
1967752SWilliam.Wang@arm.com    return false;
1973961SN/A#endif
1983536SN/A}
1993536SN/A
2005569SN/A/*
2015569SN/A * Translate the kernel debugger register format into the GDB register
2025569SN/A * format.
2035569SN/A */
2043536SN/Avoid
2053536SN/ARemoteGDB::getregs()
2063536SN/A{
2077752SWilliam.Wang@arm.com    DPRINTF(GDBAcc, "getregs in remotegdb \n");
2087752SWilliam.Wang@arm.com
2093579SN/A    memset(gdbregs.regs, 0, gdbregs.bytes());
2103536SN/A
2117752SWilliam.Wang@arm.com    // R0-R15 supervisor mode
2127752SWilliam.Wang@arm.com    // arm registers are 32 bits wide, gdb registers are 64 bits wide
2137752SWilliam.Wang@arm.com    // two arm registers are packed into one gdb register (little endian)
2147752SWilliam.Wang@arm.com    gdbregs.regs[REG_R0 + 0] = context->readIntReg(INTREG_R1) << 32 |
2157752SWilliam.Wang@arm.com                                       context->readIntReg(INTREG_R0);
2167752SWilliam.Wang@arm.com    gdbregs.regs[REG_R0 + 1] = context->readIntReg(INTREG_R3) << 32 |
2177752SWilliam.Wang@arm.com                                       context->readIntReg(INTREG_R2);
2187752SWilliam.Wang@arm.com    gdbregs.regs[REG_R0 + 2] = context->readIntReg(INTREG_R5) << 32 |
2197752SWilliam.Wang@arm.com                                       context->readIntReg(INTREG_R4);
2207752SWilliam.Wang@arm.com    gdbregs.regs[REG_R0 + 3] = context->readIntReg(INTREG_R7) << 32 |
2217752SWilliam.Wang@arm.com                                       context->readIntReg(INTREG_R6);
2227752SWilliam.Wang@arm.com    gdbregs.regs[REG_R0 + 4] = context->readIntReg(INTREG_R9) << 32 |
2237752SWilliam.Wang@arm.com                                       context->readIntReg(INTREG_R8);
2247752SWilliam.Wang@arm.com    gdbregs.regs[REG_R0 + 5] = context->readIntReg(INTREG_R11) << 32|
2257752SWilliam.Wang@arm.com                                       context->readIntReg(INTREG_R10);
2267752SWilliam.Wang@arm.com    gdbregs.regs[REG_R0 + 6] = context->readIntReg(INTREG_SP) << 32 |
2277752SWilliam.Wang@arm.com                                       context->readIntReg(INTREG_R12);
2287752SWilliam.Wang@arm.com    gdbregs.regs[REG_R0 + 7] = context->pcState().pc() << 32        |
2297752SWilliam.Wang@arm.com                                       context->readIntReg(INTREG_LR);
2303536SN/A
2317752SWilliam.Wang@arm.com    // CPSR
2327752SWilliam.Wang@arm.com    gdbregs.regs[REG_CPSR]  = context->readMiscRegNoEffect(MISCREG_CPSR);
2337752SWilliam.Wang@arm.com
2347752SWilliam.Wang@arm.com    // vfpv3/neon floating point registers (32 double or 64 float)
2357752SWilliam.Wang@arm.com
2367752SWilliam.Wang@arm.com    gdbregs.regs[REG_F0] =
2377752SWilliam.Wang@arm.com        static_cast<uint64_t>(context->readFloatRegBits(0)) << 32 |
2387752SWilliam.Wang@arm.com        gdbregs.regs[REG_CPSR];
2397752SWilliam.Wang@arm.com
2407752SWilliam.Wang@arm.com    for (int i = 1; i < (NumFloatArchRegs>>1); ++i) {
2417752SWilliam.Wang@arm.com      gdbregs.regs[i + REG_F0] =
2427752SWilliam.Wang@arm.com          static_cast<uint64_t>(context->readFloatRegBits(2*i)) << 32 |
2437752SWilliam.Wang@arm.com          context->readFloatRegBits(2*i-1);
2443536SN/A    }
2453536SN/A
2467752SWilliam.Wang@arm.com  // FPSCR
2477752SWilliam.Wang@arm.com    gdbregs.regs[REG_FPSCR] =
2487752SWilliam.Wang@arm.com        static_cast<uint64_t>(context->readMiscRegNoEffect(MISCREG_FPSCR)) << 32 |
2497752SWilliam.Wang@arm.com        context->readFloatRegBits(NumFloatArchRegs - 1);
2503536SN/A}
2513536SN/A
2525569SN/A/*
2535569SN/A * Translate the GDB register format into the kernel debugger register
2545569SN/A * format.
2555569SN/A */
2563536SN/Avoid
2573536SN/ARemoteGDB::setregs()
2583536SN/A{
2597752SWilliam.Wang@arm.com
2607752SWilliam.Wang@arm.com    DPRINTF(GDBAcc, "setregs in remotegdb \n");
2617752SWilliam.Wang@arm.com
2627752SWilliam.Wang@arm.com    // R0-R15 supervisor mode
2637752SWilliam.Wang@arm.com    // arm registers are 32 bits wide, gdb registers are 64 bits wide
2647752SWilliam.Wang@arm.com    // two arm registers are packed into one gdb register (little endian)
2657752SWilliam.Wang@arm.com    context->setIntReg(INTREG_R0 , bits(gdbregs.regs[REG_R0 + 0], 31, 0));
2667752SWilliam.Wang@arm.com    context->setIntReg(INTREG_R1 , bits(gdbregs.regs[REG_R0 + 0], 63, 32));
2677752SWilliam.Wang@arm.com    context->setIntReg(INTREG_R2 , bits(gdbregs.regs[REG_R0 + 1], 31, 0));
2687752SWilliam.Wang@arm.com    context->setIntReg(INTREG_R3 , bits(gdbregs.regs[REG_R0 + 1], 63, 32));
2697752SWilliam.Wang@arm.com    context->setIntReg(INTREG_R4 , bits(gdbregs.regs[REG_R0 + 2], 31, 0));
2707752SWilliam.Wang@arm.com    context->setIntReg(INTREG_R5 , bits(gdbregs.regs[REG_R0 + 2], 63, 32));
2717752SWilliam.Wang@arm.com    context->setIntReg(INTREG_R6 , bits(gdbregs.regs[REG_R0 + 3], 31, 0));
2727752SWilliam.Wang@arm.com    context->setIntReg(INTREG_R7 , bits(gdbregs.regs[REG_R0 + 3], 63, 32));
2737752SWilliam.Wang@arm.com    context->setIntReg(INTREG_R8 , bits(gdbregs.regs[REG_R0 + 4], 31, 0));
2747752SWilliam.Wang@arm.com    context->setIntReg(INTREG_R9 , bits(gdbregs.regs[REG_R0 + 4], 63, 32));
2757752SWilliam.Wang@arm.com    context->setIntReg(INTREG_R10, bits(gdbregs.regs[REG_R0 + 5], 31, 0));
2767752SWilliam.Wang@arm.com    context->setIntReg(INTREG_R11, bits(gdbregs.regs[REG_R0 + 5], 63, 32));
2777752SWilliam.Wang@arm.com    context->setIntReg(INTREG_R12, bits(gdbregs.regs[REG_R0 + 6], 31, 0));
2787752SWilliam.Wang@arm.com    context->setIntReg(INTREG_SP , bits(gdbregs.regs[REG_R0 + 6], 63, 32));
2797752SWilliam.Wang@arm.com    context->setIntReg(INTREG_LR , bits(gdbregs.regs[REG_R0 + 7], 31, 0));
2807752SWilliam.Wang@arm.com    context->pcState(bits(gdbregs.regs[REG_R0 + 7], 63, 32));
2817752SWilliam.Wang@arm.com
2827752SWilliam.Wang@arm.com    //CPSR
2837752SWilliam.Wang@arm.com    context->setMiscRegNoEffect(MISCREG_CPSR, gdbregs.regs[REG_CPSR]);
2847752SWilliam.Wang@arm.com
2857752SWilliam.Wang@arm.com    //vfpv3/neon floating point registers (32 double or 64 float)
2867752SWilliam.Wang@arm.com    context->setFloatRegBits(0, gdbregs.regs[REG_F0]>>32);
2877752SWilliam.Wang@arm.com
2887752SWilliam.Wang@arm.com    for (int i = 1; i < NumFloatArchRegs; ++i) {
2897752SWilliam.Wang@arm.com      if(i%2){
2907752SWilliam.Wang@arm.com        int j = (i+1)/2;
2917752SWilliam.Wang@arm.com        context->setFloatRegBits(i, bits(gdbregs.regs[j + REG_F0], 31, 0));
2927752SWilliam.Wang@arm.com      }
2937752SWilliam.Wang@arm.com      else{
2947752SWilliam.Wang@arm.com        int j = i/2;
2957752SWilliam.Wang@arm.com        context->setFloatRegBits(i, gdbregs.regs[j + REG_F0]>>32);
2967752SWilliam.Wang@arm.com      }
2973536SN/A    }
2983536SN/A
2997752SWilliam.Wang@arm.com    //FPSCR
3007752SWilliam.Wang@arm.com    context->setMiscRegNoEffect(MISCREG_FPSCR, gdbregs.regs[REG_FPSCR]>>32);
3013536SN/A}
3023536SN/A
3033536SN/Avoid
3043536SN/ARemoteGDB::clearSingleStep()
3053536SN/A{
3063536SN/A    DPRINTF(GDBMisc, "clearSingleStep bt_addr=%#x nt_addr=%#x\n",
3073550SN/A            takenBkpt, notTakenBkpt);
3083536SN/A
3093550SN/A    if (takenBkpt != 0)
3103536SN/A        clearTempBreakpoint(takenBkpt);
3113536SN/A
3123550SN/A    if (notTakenBkpt != 0)
3133536SN/A        clearTempBreakpoint(notTakenBkpt);
3143536SN/A}
3153536SN/A
3163536SN/Avoid
3173536SN/ARemoteGDB::setSingleStep()
3183536SN/A{
3197720SN/A    PCState pc = context->pcState();
3207720SN/A    PCState bpc;
3213536SN/A    bool set_bt = false;
3223536SN/A
3233536SN/A    // User was stopped at pc, e.g. the instruction at pc was not
3243536SN/A    // executed.
3257720SN/A    MachInst inst = read<MachInst>(pc.pc());
3268541Sgblack@eecs.umich.edu    StaticInstPtr si = context->getDecoderPtr()->decode(inst, pc.pc());
3273536SN/A    if (si->hasBranchTarget(pc, context, bpc)) {
3283536SN/A        // Don't bother setting a breakpoint on the taken branch if it
3293536SN/A        // is the same as the next pc
3307720SN/A        if (bpc.pc() != pc.npc())
3313536SN/A            set_bt = true;
3323536SN/A    }
3333536SN/A
3343536SN/A    DPRINTF(GDBMisc, "setSingleStep bt_addr=%#x nt_addr=%#x\n",
3353550SN/A            takenBkpt, notTakenBkpt);
3363536SN/A
3377720SN/A    setTempBreakpoint(notTakenBkpt = pc.npc());
3383536SN/A
3393536SN/A    if (set_bt)
3407720SN/A        setTempBreakpoint(takenBkpt = bpc.pc());
3413536SN/A}
3423536SN/A
3433536SN/A// Write bytes to kernel address space for debugger.
3443536SN/Abool
3453536SN/ARemoteGDB::write(Addr vaddr, size_t size, const char *data)
3463536SN/A{
3477752SWilliam.Wang@arm.com    return BaseRemoteGDB::write(vaddr, size, data);
3483536SN/A}
3493536SN/A
350