process.hh revision 11800
16019Shines@cs.fsu.edu/* 210037SARM gem5 Developers* Copyright (c) 2012 ARM Limited 310037SARM gem5 Developers * All rights reserved 410037SARM gem5 Developers * 510037SARM gem5 Developers * The license below extends only to copyright in the software and shall 610037SARM gem5 Developers * not be construed as granting a license to any other intellectual 710037SARM gem5 Developers * property including but not limited to intellectual property relating 810037SARM gem5 Developers * to a hardware implementation of the functionality of the software 910037SARM gem5 Developers * licensed hereunder. You may use the software subject to the license 1010037SARM gem5 Developers * terms below provided that you ensure that this notice is replicated 1110037SARM gem5 Developers * unmodified and in its entirety in all distributions of the software, 1210037SARM gem5 Developers * modified or unmodified, in source code or in binary form. 1310037SARM gem5 Developers * 146019Shines@cs.fsu.edu * Copyright (c) 2007-2008 The Florida State University 156019Shines@cs.fsu.edu * All rights reserved. 166019Shines@cs.fsu.edu * 176019Shines@cs.fsu.edu * Redistribution and use in source and binary forms, with or without 186019Shines@cs.fsu.edu * modification, are permitted provided that the following conditions are 196019Shines@cs.fsu.edu * met: redistributions of source code must retain the above copyright 206019Shines@cs.fsu.edu * notice, this list of conditions and the following disclaimer; 216019Shines@cs.fsu.edu * redistributions in binary form must reproduce the above copyright 226019Shines@cs.fsu.edu * notice, this list of conditions and the following disclaimer in the 236019Shines@cs.fsu.edu * documentation and/or other materials provided with the distribution; 246019Shines@cs.fsu.edu * neither the name of the copyright holders nor the names of its 256019Shines@cs.fsu.edu * contributors may be used to endorse or promote products derived from 266019Shines@cs.fsu.edu * this software without specific prior written permission. 276019Shines@cs.fsu.edu * 286019Shines@cs.fsu.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 296019Shines@cs.fsu.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 306019Shines@cs.fsu.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 316019Shines@cs.fsu.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 326019Shines@cs.fsu.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 336019Shines@cs.fsu.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 346019Shines@cs.fsu.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 356019Shines@cs.fsu.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 366019Shines@cs.fsu.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 376019Shines@cs.fsu.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 386019Shines@cs.fsu.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 396019Shines@cs.fsu.edu * 406019Shines@cs.fsu.edu * Authors: Stephen Hines 416019Shines@cs.fsu.edu */ 426019Shines@cs.fsu.edu 436019Shines@cs.fsu.edu#ifndef __ARM_PROCESS_HH__ 446019Shines@cs.fsu.edu#define __ARM_PROCESS_HH__ 456019Shines@cs.fsu.edu 466019Shines@cs.fsu.edu#include <string> 476019Shines@cs.fsu.edu#include <vector> 488229Snate@binkert.org 4910037SARM gem5 Developers#include "arch/arm/intregs.hh" 507096Sgblack@eecs.umich.edu#include "base/loader/object_file.hh" 5111800Sbrandon.potter@amd.com#include "mem/page_table.hh" 526019Shines@cs.fsu.edu#include "sim/process.hh" 536019Shines@cs.fsu.edu 546019Shines@cs.fsu.educlass LiveProcess; 556019Shines@cs.fsu.educlass ObjectFile; 566019Shines@cs.fsu.educlass System; 576019Shines@cs.fsu.edu 586019Shines@cs.fsu.educlass ArmLiveProcess : public LiveProcess 596019Shines@cs.fsu.edu{ 606019Shines@cs.fsu.edu protected: 617096Sgblack@eecs.umich.edu ObjectFile::Arch arch; 627096Sgblack@eecs.umich.edu ArmLiveProcess(LiveProcessParams * params, ObjectFile *objFile, 637096Sgblack@eecs.umich.edu ObjectFile::Arch _arch); 6410037SARM gem5 Developers template<class IntType> 6510037SARM gem5 Developers void argsInit(int pageSize, ArmISA::IntRegIndex spIndex); 6610037SARM gem5 Developers}; 6710037SARM gem5 Developers 6810037SARM gem5 Developersclass ArmLiveProcess32 : public ArmLiveProcess 6910037SARM gem5 Developers{ 7010037SARM gem5 Developers protected: 7110037SARM gem5 Developers ArmLiveProcess32(LiveProcessParams * params, ObjectFile *objFile, 7210037SARM gem5 Developers ObjectFile::Arch _arch); 736019Shines@cs.fsu.edu 748216Ssaidi@eecs.umich.edu void initState(); 756019Shines@cs.fsu.edu 766019Shines@cs.fsu.edu public: 7710037SARM gem5 Developers 7810037SARM gem5 Developers ArmISA::IntReg getSyscallArg(ThreadContext *tc, int &i, int width); 7910037SARM gem5 Developers ArmISA::IntReg getSyscallArg(ThreadContext *tc, int &i); 8010037SARM gem5 Developers void setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val); 8110037SARM gem5 Developers void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value); 8210037SARM gem5 Developers}; 8310037SARM gem5 Developers 8410037SARM gem5 Developersclass ArmLiveProcess64 : public ArmLiveProcess 8510037SARM gem5 Developers{ 8610037SARM gem5 Developers protected: 8710037SARM gem5 Developers ArmLiveProcess64(LiveProcessParams * params, ObjectFile *objFile, 8810037SARM gem5 Developers ObjectFile::Arch _arch); 8910037SARM gem5 Developers 9010037SARM gem5 Developers void initState(); 9110037SARM gem5 Developers 9210037SARM gem5 Developers public: 936019Shines@cs.fsu.edu 949552Sandreas.hansson@arm.com ArmISA::IntReg getSyscallArg(ThreadContext *tc, int &i, int width); 956701Sgblack@eecs.umich.edu ArmISA::IntReg getSyscallArg(ThreadContext *tc, int &i); 966020Sgblack@eecs.umich.edu void setSyscallArg(ThreadContext *tc, int i, ArmISA::IntReg val); 976020Sgblack@eecs.umich.edu void setSyscallReturn(ThreadContext *tc, SyscallReturn return_value); 986019Shines@cs.fsu.edu}; 996019Shines@cs.fsu.edu 10010299Salexandru.dutu@amd.com/* No architectural page table defined for this ISA */ 10110299Salexandru.dutu@amd.comtypedef NoArchPageTable ArchPageTable; 10210299Salexandru.dutu@amd.com 1036019Shines@cs.fsu.edu#endif // __ARM_PROCESS_HH__ 1046019Shines@cs.fsu.edu 105