nativetrace.cc revision 6397
1/* 2 * Copyright (c) 2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Gabe Black 29 */ 30 31#include "arch/arm/isa_traits.hh" 32#include "arch/arm/miscregs.hh" 33#include "arch/arm/nativetrace.hh" 34#include "cpu/thread_context.hh" 35#include "params/ArmNativeTrace.hh" 36 37namespace Trace { 38 39static const char *regNames[] = { 40 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", 41 "r8", "r9", "r10", "fp", "r12", "sp", "lr", "pc", 42 "cpsr" 43}; 44 45void 46Trace::ArmNativeTrace::check(NativeTraceRecord *record) 47{ 48 ThreadContext *tc = record->getThread(); 49 50 uint32_t regVal, realRegVal; 51 52 const char **regName = regNames; 53 // Regular int regs 54 for (int i = 0; i < 15; i++) { 55 regVal = tc->readIntReg(i); 56 read(&realRegVal, sizeof(realRegVal)); 57 realRegVal = ArmISA::gtoh(realRegVal); 58 checkReg(*(regName++), regVal, realRegVal); 59 } 60 61 //R15, aliased with the PC 62 regVal = tc->readNextPC(); 63 read(&realRegVal, sizeof(realRegVal)); 64 realRegVal = ArmISA::gtoh(realRegVal); 65 checkReg(*(regName++), regVal, realRegVal); 66 67 //CPSR 68 regVal = tc->readMiscReg(MISCREG_CPSR); 69 read(&realRegVal, sizeof(realRegVal)); 70 realRegVal = ArmISA::gtoh(realRegVal); 71 checkReg(*(regName++), regVal, realRegVal); 72} 73 74} /* namespace Trace */ 75 76//////////////////////////////////////////////////////////////////////// 77// 78// ExeTracer Simulation Object 79// 80Trace::ArmNativeTrace * 81ArmNativeTraceParams::create() 82{ 83 return new Trace::ArmNativeTrace(this); 84}; 85