miscregs.hh revision 13531
16242Sgblack@eecs.umich.edu/* 212529Sgiacomo.travaglini@arm.com * Copyright (c) 2010-2018 ARM Limited 37093Sgblack@eecs.umich.edu * All rights reserved 47093Sgblack@eecs.umich.edu * 57093Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 67093Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 77093Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 87093Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 97093Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 107093Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 117093Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 127093Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 137093Sgblack@eecs.umich.edu * 146242Sgblack@eecs.umich.edu * Copyright (c) 2009 The Regents of The University of Michigan 156242Sgblack@eecs.umich.edu * All rights reserved. 166242Sgblack@eecs.umich.edu * 176242Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 186242Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 196242Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 206242Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 216242Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 226242Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 236242Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 246242Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 256242Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 266242Sgblack@eecs.umich.edu * this software without specific prior written permission. 276242Sgblack@eecs.umich.edu * 286242Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 296242Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 306242Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 316242Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 326242Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 336242Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 346242Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 356242Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 366242Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 376242Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 386242Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 396242Sgblack@eecs.umich.edu * 406242Sgblack@eecs.umich.edu * Authors: Gabe Black 4110037SARM gem5 Developers * Giacomo Gabrielli 426242Sgblack@eecs.umich.edu */ 436242Sgblack@eecs.umich.edu#ifndef __ARCH_ARM_MISCREGS_HH__ 446242Sgblack@eecs.umich.edu#define __ARCH_ARM_MISCREGS_HH__ 456242Sgblack@eecs.umich.edu 4610037SARM gem5 Developers#include <bitset> 4711939Snikos.nikoleris@arm.com#include <tuple> 4810037SARM gem5 Developers 4913115Sgiacomo.travaglini@arm.com#include "arch/arm/miscregs_types.hh" 509256SAndreas.Sandberg@arm.com#include "base/compiler.hh" 516242Sgblack@eecs.umich.edu 5210037SARM gem5 Developersclass ThreadContext; 5310037SARM gem5 Developers 5410037SARM gem5 Developers 556242Sgblack@eecs.umich.edunamespace ArmISA 566242Sgblack@eecs.umich.edu{ 576242Sgblack@eecs.umich.edu enum MiscRegIndex { 5813392Sgiacomo.travaglini@arm.com MISCREG_CPSR = 0, 5913392Sgiacomo.travaglini@arm.com MISCREG_SPSR, 6013392Sgiacomo.travaglini@arm.com MISCREG_SPSR_FIQ, 6113392Sgiacomo.travaglini@arm.com MISCREG_SPSR_IRQ, 6213392Sgiacomo.travaglini@arm.com MISCREG_SPSR_SVC, 6313392Sgiacomo.travaglini@arm.com MISCREG_SPSR_MON, 6413392Sgiacomo.travaglini@arm.com MISCREG_SPSR_ABT, 6513392Sgiacomo.travaglini@arm.com MISCREG_SPSR_HYP, 6613392Sgiacomo.travaglini@arm.com MISCREG_SPSR_UND, 6713392Sgiacomo.travaglini@arm.com MISCREG_ELR_HYP, 6813392Sgiacomo.travaglini@arm.com MISCREG_FPSID, 6913392Sgiacomo.travaglini@arm.com MISCREG_FPSCR, 7013392Sgiacomo.travaglini@arm.com MISCREG_MVFR1, 7113392Sgiacomo.travaglini@arm.com MISCREG_MVFR0, 7213392Sgiacomo.travaglini@arm.com MISCREG_FPEXC, 737259Sgblack@eecs.umich.edu 7410037SARM gem5 Developers // Helper registers 7513392Sgiacomo.travaglini@arm.com MISCREG_CPSR_MODE, 7613392Sgiacomo.travaglini@arm.com MISCREG_CPSR_Q, 7713392Sgiacomo.travaglini@arm.com MISCREG_FPSCR_EXC, 7813392Sgiacomo.travaglini@arm.com MISCREG_FPSCR_QC, 7913392Sgiacomo.travaglini@arm.com MISCREG_LOCKADDR, 8013392Sgiacomo.travaglini@arm.com MISCREG_LOCKFLAG, 8113392Sgiacomo.travaglini@arm.com MISCREG_PRRR_MAIR0, 8213392Sgiacomo.travaglini@arm.com MISCREG_PRRR_MAIR0_NS, 8313392Sgiacomo.travaglini@arm.com MISCREG_PRRR_MAIR0_S, 8413392Sgiacomo.travaglini@arm.com MISCREG_NMRR_MAIR1, 8513392Sgiacomo.travaglini@arm.com MISCREG_NMRR_MAIR1_NS, 8613392Sgiacomo.travaglini@arm.com MISCREG_NMRR_MAIR1_S, 8713392Sgiacomo.travaglini@arm.com MISCREG_PMXEVTYPER_PMCCFILTR, 8813392Sgiacomo.travaglini@arm.com MISCREG_SCTLR_RST, 8913392Sgiacomo.travaglini@arm.com MISCREG_SEV_MAILBOX, 908868SMatt.Horsnell@arm.com 9110037SARM gem5 Developers // AArch32 CP14 registers (debug/trace/ThumbEE/Jazelle control) 9213392Sgiacomo.travaglini@arm.com MISCREG_DBGDIDR, 9313392Sgiacomo.travaglini@arm.com MISCREG_DBGDSCRint, 9413392Sgiacomo.travaglini@arm.com MISCREG_DBGDCCINT, 9513392Sgiacomo.travaglini@arm.com MISCREG_DBGDTRTXint, 9613392Sgiacomo.travaglini@arm.com MISCREG_DBGDTRRXint, 9713392Sgiacomo.travaglini@arm.com MISCREG_DBGWFAR, 9813392Sgiacomo.travaglini@arm.com MISCREG_DBGVCR, 9913392Sgiacomo.travaglini@arm.com MISCREG_DBGDTRRXext, 10013392Sgiacomo.travaglini@arm.com MISCREG_DBGDSCRext, 10113392Sgiacomo.travaglini@arm.com MISCREG_DBGDTRTXext, 10213392Sgiacomo.travaglini@arm.com MISCREG_DBGOSECCR, 10313392Sgiacomo.travaglini@arm.com MISCREG_DBGBVR0, 10413392Sgiacomo.travaglini@arm.com MISCREG_DBGBVR1, 10513392Sgiacomo.travaglini@arm.com MISCREG_DBGBVR2, 10613392Sgiacomo.travaglini@arm.com MISCREG_DBGBVR3, 10713392Sgiacomo.travaglini@arm.com MISCREG_DBGBVR4, 10813392Sgiacomo.travaglini@arm.com MISCREG_DBGBVR5, 10913392Sgiacomo.travaglini@arm.com MISCREG_DBGBCR0, 11013392Sgiacomo.travaglini@arm.com MISCREG_DBGBCR1, 11113392Sgiacomo.travaglini@arm.com MISCREG_DBGBCR2, 11213392Sgiacomo.travaglini@arm.com MISCREG_DBGBCR3, 11313392Sgiacomo.travaglini@arm.com MISCREG_DBGBCR4, 11413392Sgiacomo.travaglini@arm.com MISCREG_DBGBCR5, 11513392Sgiacomo.travaglini@arm.com MISCREG_DBGWVR0, 11613392Sgiacomo.travaglini@arm.com MISCREG_DBGWVR1, 11713392Sgiacomo.travaglini@arm.com MISCREG_DBGWVR2, 11813392Sgiacomo.travaglini@arm.com MISCREG_DBGWVR3, 11913392Sgiacomo.travaglini@arm.com MISCREG_DBGWCR0, 12013392Sgiacomo.travaglini@arm.com MISCREG_DBGWCR1, 12113392Sgiacomo.travaglini@arm.com MISCREG_DBGWCR2, 12213392Sgiacomo.travaglini@arm.com MISCREG_DBGWCR3, 12313392Sgiacomo.travaglini@arm.com MISCREG_DBGDRAR, 12413392Sgiacomo.travaglini@arm.com MISCREG_DBGBXVR4, 12513392Sgiacomo.travaglini@arm.com MISCREG_DBGBXVR5, 12613392Sgiacomo.travaglini@arm.com MISCREG_DBGOSLAR, 12713392Sgiacomo.travaglini@arm.com MISCREG_DBGOSLSR, 12813392Sgiacomo.travaglini@arm.com MISCREG_DBGOSDLR, 12913392Sgiacomo.travaglini@arm.com MISCREG_DBGPRCR, 13013392Sgiacomo.travaglini@arm.com MISCREG_DBGDSAR, 13113392Sgiacomo.travaglini@arm.com MISCREG_DBGCLAIMSET, 13213392Sgiacomo.travaglini@arm.com MISCREG_DBGCLAIMCLR, 13313392Sgiacomo.travaglini@arm.com MISCREG_DBGAUTHSTATUS, 13413392Sgiacomo.travaglini@arm.com MISCREG_DBGDEVID2, 13513392Sgiacomo.travaglini@arm.com MISCREG_DBGDEVID1, 13613392Sgiacomo.travaglini@arm.com MISCREG_DBGDEVID0, 13713392Sgiacomo.travaglini@arm.com MISCREG_TEECR, // not in ARM DDI 0487A.b+ 13813392Sgiacomo.travaglini@arm.com MISCREG_JIDR, 13913392Sgiacomo.travaglini@arm.com MISCREG_TEEHBR, // not in ARM DDI 0487A.b+ 14013392Sgiacomo.travaglini@arm.com MISCREG_JOSCR, 14113392Sgiacomo.travaglini@arm.com MISCREG_JMCR, 1427351Sgblack@eecs.umich.edu 14310037SARM gem5 Developers // AArch32 CP15 registers (system control) 14413392Sgiacomo.travaglini@arm.com MISCREG_MIDR, 14513392Sgiacomo.travaglini@arm.com MISCREG_CTR, 14613392Sgiacomo.travaglini@arm.com MISCREG_TCMTR, 14713392Sgiacomo.travaglini@arm.com MISCREG_TLBTR, 14813392Sgiacomo.travaglini@arm.com MISCREG_MPIDR, 14913392Sgiacomo.travaglini@arm.com MISCREG_REVIDR, 15013392Sgiacomo.travaglini@arm.com MISCREG_ID_PFR0, 15113392Sgiacomo.travaglini@arm.com MISCREG_ID_PFR1, 15213392Sgiacomo.travaglini@arm.com MISCREG_ID_DFR0, 15313392Sgiacomo.travaglini@arm.com MISCREG_ID_AFR0, 15413392Sgiacomo.travaglini@arm.com MISCREG_ID_MMFR0, 15513392Sgiacomo.travaglini@arm.com MISCREG_ID_MMFR1, 15613392Sgiacomo.travaglini@arm.com MISCREG_ID_MMFR2, 15713392Sgiacomo.travaglini@arm.com MISCREG_ID_MMFR3, 15813392Sgiacomo.travaglini@arm.com MISCREG_ID_ISAR0, 15913392Sgiacomo.travaglini@arm.com MISCREG_ID_ISAR1, 16013392Sgiacomo.travaglini@arm.com MISCREG_ID_ISAR2, 16113392Sgiacomo.travaglini@arm.com MISCREG_ID_ISAR3, 16213392Sgiacomo.travaglini@arm.com MISCREG_ID_ISAR4, 16313392Sgiacomo.travaglini@arm.com MISCREG_ID_ISAR5, 16413392Sgiacomo.travaglini@arm.com MISCREG_CCSIDR, 16513392Sgiacomo.travaglini@arm.com MISCREG_CLIDR, 16613392Sgiacomo.travaglini@arm.com MISCREG_AIDR, 16713392Sgiacomo.travaglini@arm.com MISCREG_CSSELR, 16813392Sgiacomo.travaglini@arm.com MISCREG_CSSELR_NS, 16913392Sgiacomo.travaglini@arm.com MISCREG_CSSELR_S, 17013392Sgiacomo.travaglini@arm.com MISCREG_VPIDR, 17113392Sgiacomo.travaglini@arm.com MISCREG_VMPIDR, 17213392Sgiacomo.travaglini@arm.com MISCREG_SCTLR, 17313392Sgiacomo.travaglini@arm.com MISCREG_SCTLR_NS, 17413392Sgiacomo.travaglini@arm.com MISCREG_SCTLR_S, 17513392Sgiacomo.travaglini@arm.com MISCREG_ACTLR, 17613392Sgiacomo.travaglini@arm.com MISCREG_ACTLR_NS, 17713392Sgiacomo.travaglini@arm.com MISCREG_ACTLR_S, 17813392Sgiacomo.travaglini@arm.com MISCREG_CPACR, 17913392Sgiacomo.travaglini@arm.com MISCREG_SCR, 18013392Sgiacomo.travaglini@arm.com MISCREG_SDER, 18113392Sgiacomo.travaglini@arm.com MISCREG_NSACR, 18213392Sgiacomo.travaglini@arm.com MISCREG_HSCTLR, 18313392Sgiacomo.travaglini@arm.com MISCREG_HACTLR, 18413392Sgiacomo.travaglini@arm.com MISCREG_HCR, 18513392Sgiacomo.travaglini@arm.com MISCREG_HDCR, 18613392Sgiacomo.travaglini@arm.com MISCREG_HCPTR, 18713392Sgiacomo.travaglini@arm.com MISCREG_HSTR, 18813392Sgiacomo.travaglini@arm.com MISCREG_HACR, 18913392Sgiacomo.travaglini@arm.com MISCREG_TTBR0, 19013392Sgiacomo.travaglini@arm.com MISCREG_TTBR0_NS, 19113392Sgiacomo.travaglini@arm.com MISCREG_TTBR0_S, 19213392Sgiacomo.travaglini@arm.com MISCREG_TTBR1, 19313392Sgiacomo.travaglini@arm.com MISCREG_TTBR1_NS, 19413392Sgiacomo.travaglini@arm.com MISCREG_TTBR1_S, 19513392Sgiacomo.travaglini@arm.com MISCREG_TTBCR, 19613392Sgiacomo.travaglini@arm.com MISCREG_TTBCR_NS, 19713392Sgiacomo.travaglini@arm.com MISCREG_TTBCR_S, 19813392Sgiacomo.travaglini@arm.com MISCREG_HTCR, 19913392Sgiacomo.travaglini@arm.com MISCREG_VTCR, 20013392Sgiacomo.travaglini@arm.com MISCREG_DACR, 20113392Sgiacomo.travaglini@arm.com MISCREG_DACR_NS, 20213392Sgiacomo.travaglini@arm.com MISCREG_DACR_S, 20313392Sgiacomo.travaglini@arm.com MISCREG_DFSR, 20413392Sgiacomo.travaglini@arm.com MISCREG_DFSR_NS, 20513392Sgiacomo.travaglini@arm.com MISCREG_DFSR_S, 20613392Sgiacomo.travaglini@arm.com MISCREG_IFSR, 20713392Sgiacomo.travaglini@arm.com MISCREG_IFSR_NS, 20813392Sgiacomo.travaglini@arm.com MISCREG_IFSR_S, 20913392Sgiacomo.travaglini@arm.com MISCREG_ADFSR, 21013392Sgiacomo.travaglini@arm.com MISCREG_ADFSR_NS, 21113392Sgiacomo.travaglini@arm.com MISCREG_ADFSR_S, 21213392Sgiacomo.travaglini@arm.com MISCREG_AIFSR, 21313392Sgiacomo.travaglini@arm.com MISCREG_AIFSR_NS, 21413392Sgiacomo.travaglini@arm.com MISCREG_AIFSR_S, 21513392Sgiacomo.travaglini@arm.com MISCREG_HADFSR, 21613392Sgiacomo.travaglini@arm.com MISCREG_HAIFSR, 21713392Sgiacomo.travaglini@arm.com MISCREG_HSR, 21813392Sgiacomo.travaglini@arm.com MISCREG_DFAR, 21913392Sgiacomo.travaglini@arm.com MISCREG_DFAR_NS, 22013392Sgiacomo.travaglini@arm.com MISCREG_DFAR_S, 22113392Sgiacomo.travaglini@arm.com MISCREG_IFAR, 22213392Sgiacomo.travaglini@arm.com MISCREG_IFAR_NS, 22313392Sgiacomo.travaglini@arm.com MISCREG_IFAR_S, 22413392Sgiacomo.travaglini@arm.com MISCREG_HDFAR, 22513392Sgiacomo.travaglini@arm.com MISCREG_HIFAR, 22613392Sgiacomo.travaglini@arm.com MISCREG_HPFAR, 22713392Sgiacomo.travaglini@arm.com MISCREG_ICIALLUIS, 22813392Sgiacomo.travaglini@arm.com MISCREG_BPIALLIS, 22913392Sgiacomo.travaglini@arm.com MISCREG_PAR, 23013392Sgiacomo.travaglini@arm.com MISCREG_PAR_NS, 23113392Sgiacomo.travaglini@arm.com MISCREG_PAR_S, 23213392Sgiacomo.travaglini@arm.com MISCREG_ICIALLU, 23313392Sgiacomo.travaglini@arm.com MISCREG_ICIMVAU, 23413392Sgiacomo.travaglini@arm.com MISCREG_CP15ISB, 23513392Sgiacomo.travaglini@arm.com MISCREG_BPIALL, 23613392Sgiacomo.travaglini@arm.com MISCREG_BPIMVA, 23713392Sgiacomo.travaglini@arm.com MISCREG_DCIMVAC, 23813392Sgiacomo.travaglini@arm.com MISCREG_DCISW, 23913392Sgiacomo.travaglini@arm.com MISCREG_ATS1CPR, 24013392Sgiacomo.travaglini@arm.com MISCREG_ATS1CPW, 24113392Sgiacomo.travaglini@arm.com MISCREG_ATS1CUR, 24213392Sgiacomo.travaglini@arm.com MISCREG_ATS1CUW, 24313392Sgiacomo.travaglini@arm.com MISCREG_ATS12NSOPR, 24413392Sgiacomo.travaglini@arm.com MISCREG_ATS12NSOPW, 24513392Sgiacomo.travaglini@arm.com MISCREG_ATS12NSOUR, 24613392Sgiacomo.travaglini@arm.com MISCREG_ATS12NSOUW, 24713392Sgiacomo.travaglini@arm.com MISCREG_DCCMVAC, 24813392Sgiacomo.travaglini@arm.com MISCREG_DCCSW, 24913392Sgiacomo.travaglini@arm.com MISCREG_CP15DSB, 25013392Sgiacomo.travaglini@arm.com MISCREG_CP15DMB, 25113392Sgiacomo.travaglini@arm.com MISCREG_DCCMVAU, 25213392Sgiacomo.travaglini@arm.com MISCREG_DCCIMVAC, 25313392Sgiacomo.travaglini@arm.com MISCREG_DCCISW, 25413392Sgiacomo.travaglini@arm.com MISCREG_ATS1HR, 25513392Sgiacomo.travaglini@arm.com MISCREG_ATS1HW, 25613392Sgiacomo.travaglini@arm.com MISCREG_TLBIALLIS, 25713392Sgiacomo.travaglini@arm.com MISCREG_TLBIMVAIS, 25813392Sgiacomo.travaglini@arm.com MISCREG_TLBIASIDIS, 25913392Sgiacomo.travaglini@arm.com MISCREG_TLBIMVAAIS, 26013392Sgiacomo.travaglini@arm.com MISCREG_TLBIMVALIS, 26113392Sgiacomo.travaglini@arm.com MISCREG_TLBIMVAALIS, 26213392Sgiacomo.travaglini@arm.com MISCREG_ITLBIALL, 26313392Sgiacomo.travaglini@arm.com MISCREG_ITLBIMVA, 26413392Sgiacomo.travaglini@arm.com MISCREG_ITLBIASID, 26513392Sgiacomo.travaglini@arm.com MISCREG_DTLBIALL, 26613392Sgiacomo.travaglini@arm.com MISCREG_DTLBIMVA, 26713392Sgiacomo.travaglini@arm.com MISCREG_DTLBIASID, 26813392Sgiacomo.travaglini@arm.com MISCREG_TLBIALL, 26913392Sgiacomo.travaglini@arm.com MISCREG_TLBIMVA, 27013392Sgiacomo.travaglini@arm.com MISCREG_TLBIASID, 27113392Sgiacomo.travaglini@arm.com MISCREG_TLBIMVAA, 27213392Sgiacomo.travaglini@arm.com MISCREG_TLBIMVAL, 27313392Sgiacomo.travaglini@arm.com MISCREG_TLBIMVAAL, 27413392Sgiacomo.travaglini@arm.com MISCREG_TLBIIPAS2IS, 27513392Sgiacomo.travaglini@arm.com MISCREG_TLBIIPAS2LIS, 27613392Sgiacomo.travaglini@arm.com MISCREG_TLBIALLHIS, 27713392Sgiacomo.travaglini@arm.com MISCREG_TLBIMVAHIS, 27813392Sgiacomo.travaglini@arm.com MISCREG_TLBIALLNSNHIS, 27913392Sgiacomo.travaglini@arm.com MISCREG_TLBIMVALHIS, 28013392Sgiacomo.travaglini@arm.com MISCREG_TLBIIPAS2, 28113392Sgiacomo.travaglini@arm.com MISCREG_TLBIIPAS2L, 28213392Sgiacomo.travaglini@arm.com MISCREG_TLBIALLH, 28313392Sgiacomo.travaglini@arm.com MISCREG_TLBIMVAH, 28413392Sgiacomo.travaglini@arm.com MISCREG_TLBIALLNSNH, 28513392Sgiacomo.travaglini@arm.com MISCREG_TLBIMVALH, 28613392Sgiacomo.travaglini@arm.com MISCREG_PMCR, 28713392Sgiacomo.travaglini@arm.com MISCREG_PMCNTENSET, 28813392Sgiacomo.travaglini@arm.com MISCREG_PMCNTENCLR, 28913392Sgiacomo.travaglini@arm.com MISCREG_PMOVSR, 29013392Sgiacomo.travaglini@arm.com MISCREG_PMSWINC, 29113392Sgiacomo.travaglini@arm.com MISCREG_PMSELR, 29213392Sgiacomo.travaglini@arm.com MISCREG_PMCEID0, 29313392Sgiacomo.travaglini@arm.com MISCREG_PMCEID1, 29413392Sgiacomo.travaglini@arm.com MISCREG_PMCCNTR, 29513392Sgiacomo.travaglini@arm.com MISCREG_PMXEVTYPER, 29613392Sgiacomo.travaglini@arm.com MISCREG_PMCCFILTR, 29713392Sgiacomo.travaglini@arm.com MISCREG_PMXEVCNTR, 29813392Sgiacomo.travaglini@arm.com MISCREG_PMUSERENR, 29913392Sgiacomo.travaglini@arm.com MISCREG_PMINTENSET, 30013392Sgiacomo.travaglini@arm.com MISCREG_PMINTENCLR, 30113392Sgiacomo.travaglini@arm.com MISCREG_PMOVSSET, 30213392Sgiacomo.travaglini@arm.com MISCREG_L2CTLR, 30313392Sgiacomo.travaglini@arm.com MISCREG_L2ECTLR, 30413392Sgiacomo.travaglini@arm.com MISCREG_PRRR, 30513392Sgiacomo.travaglini@arm.com MISCREG_PRRR_NS, 30613392Sgiacomo.travaglini@arm.com MISCREG_PRRR_S, 30713392Sgiacomo.travaglini@arm.com MISCREG_MAIR0, 30813392Sgiacomo.travaglini@arm.com MISCREG_MAIR0_NS, 30913392Sgiacomo.travaglini@arm.com MISCREG_MAIR0_S, 31013392Sgiacomo.travaglini@arm.com MISCREG_NMRR, 31113392Sgiacomo.travaglini@arm.com MISCREG_NMRR_NS, 31213392Sgiacomo.travaglini@arm.com MISCREG_NMRR_S, 31313392Sgiacomo.travaglini@arm.com MISCREG_MAIR1, 31413392Sgiacomo.travaglini@arm.com MISCREG_MAIR1_NS, 31513392Sgiacomo.travaglini@arm.com MISCREG_MAIR1_S, 31613392Sgiacomo.travaglini@arm.com MISCREG_AMAIR0, 31713392Sgiacomo.travaglini@arm.com MISCREG_AMAIR0_NS, 31813392Sgiacomo.travaglini@arm.com MISCREG_AMAIR0_S, 31913392Sgiacomo.travaglini@arm.com MISCREG_AMAIR1, 32013392Sgiacomo.travaglini@arm.com MISCREG_AMAIR1_NS, 32113392Sgiacomo.travaglini@arm.com MISCREG_AMAIR1_S, 32213392Sgiacomo.travaglini@arm.com MISCREG_HMAIR0, 32313392Sgiacomo.travaglini@arm.com MISCREG_HMAIR1, 32413392Sgiacomo.travaglini@arm.com MISCREG_HAMAIR0, 32513392Sgiacomo.travaglini@arm.com MISCREG_HAMAIR1, 32613392Sgiacomo.travaglini@arm.com MISCREG_VBAR, 32713392Sgiacomo.travaglini@arm.com MISCREG_VBAR_NS, 32813392Sgiacomo.travaglini@arm.com MISCREG_VBAR_S, 32913392Sgiacomo.travaglini@arm.com MISCREG_MVBAR, 33013392Sgiacomo.travaglini@arm.com MISCREG_RMR, 33113392Sgiacomo.travaglini@arm.com MISCREG_ISR, 33213392Sgiacomo.travaglini@arm.com MISCREG_HVBAR, 33313392Sgiacomo.travaglini@arm.com MISCREG_FCSEIDR, 33413392Sgiacomo.travaglini@arm.com MISCREG_CONTEXTIDR, 33513392Sgiacomo.travaglini@arm.com MISCREG_CONTEXTIDR_NS, 33613392Sgiacomo.travaglini@arm.com MISCREG_CONTEXTIDR_S, 33713392Sgiacomo.travaglini@arm.com MISCREG_TPIDRURW, 33813392Sgiacomo.travaglini@arm.com MISCREG_TPIDRURW_NS, 33913392Sgiacomo.travaglini@arm.com MISCREG_TPIDRURW_S, 34013392Sgiacomo.travaglini@arm.com MISCREG_TPIDRURO, 34113392Sgiacomo.travaglini@arm.com MISCREG_TPIDRURO_NS, 34213392Sgiacomo.travaglini@arm.com MISCREG_TPIDRURO_S, 34313392Sgiacomo.travaglini@arm.com MISCREG_TPIDRPRW, 34413392Sgiacomo.travaglini@arm.com MISCREG_TPIDRPRW_NS, 34513392Sgiacomo.travaglini@arm.com MISCREG_TPIDRPRW_S, 34613392Sgiacomo.travaglini@arm.com MISCREG_HTPIDR, 34713392Sgiacomo.travaglini@arm.com MISCREG_CNTFRQ, 34813392Sgiacomo.travaglini@arm.com MISCREG_CNTKCTL, 34913392Sgiacomo.travaglini@arm.com MISCREG_CNTP_TVAL, 35013392Sgiacomo.travaglini@arm.com MISCREG_CNTP_TVAL_NS, 35113392Sgiacomo.travaglini@arm.com MISCREG_CNTP_TVAL_S, 35213392Sgiacomo.travaglini@arm.com MISCREG_CNTP_CTL, 35313392Sgiacomo.travaglini@arm.com MISCREG_CNTP_CTL_NS, 35413392Sgiacomo.travaglini@arm.com MISCREG_CNTP_CTL_S, 35513392Sgiacomo.travaglini@arm.com MISCREG_CNTV_TVAL, 35613392Sgiacomo.travaglini@arm.com MISCREG_CNTV_CTL, 35713392Sgiacomo.travaglini@arm.com MISCREG_CNTHCTL, 35813392Sgiacomo.travaglini@arm.com MISCREG_CNTHP_TVAL, 35913392Sgiacomo.travaglini@arm.com MISCREG_CNTHP_CTL, 36013392Sgiacomo.travaglini@arm.com MISCREG_IL1DATA0, 36113392Sgiacomo.travaglini@arm.com MISCREG_IL1DATA1, 36213392Sgiacomo.travaglini@arm.com MISCREG_IL1DATA2, 36313392Sgiacomo.travaglini@arm.com MISCREG_IL1DATA3, 36413392Sgiacomo.travaglini@arm.com MISCREG_DL1DATA0, 36513392Sgiacomo.travaglini@arm.com MISCREG_DL1DATA1, 36613392Sgiacomo.travaglini@arm.com MISCREG_DL1DATA2, 36713392Sgiacomo.travaglini@arm.com MISCREG_DL1DATA3, 36813392Sgiacomo.travaglini@arm.com MISCREG_DL1DATA4, 36913392Sgiacomo.travaglini@arm.com MISCREG_RAMINDEX, 37013392Sgiacomo.travaglini@arm.com MISCREG_L2ACTLR, 37113392Sgiacomo.travaglini@arm.com MISCREG_CBAR, 37213392Sgiacomo.travaglini@arm.com MISCREG_HTTBR, 37313392Sgiacomo.travaglini@arm.com MISCREG_VTTBR, 37413392Sgiacomo.travaglini@arm.com MISCREG_CNTPCT, 37513392Sgiacomo.travaglini@arm.com MISCREG_CNTVCT, 37613392Sgiacomo.travaglini@arm.com MISCREG_CNTP_CVAL, 37713392Sgiacomo.travaglini@arm.com MISCREG_CNTP_CVAL_NS, 37813392Sgiacomo.travaglini@arm.com MISCREG_CNTP_CVAL_S, 37913392Sgiacomo.travaglini@arm.com MISCREG_CNTV_CVAL, 38013392Sgiacomo.travaglini@arm.com MISCREG_CNTVOFF, 38113392Sgiacomo.travaglini@arm.com MISCREG_CNTHP_CVAL, 38213392Sgiacomo.travaglini@arm.com MISCREG_CPUMERRSR, 38313392Sgiacomo.travaglini@arm.com MISCREG_L2MERRSR, 3847259Sgblack@eecs.umich.edu 38510037SARM gem5 Developers // AArch64 registers (Op0=2) 38613392Sgiacomo.travaglini@arm.com MISCREG_MDCCINT_EL1, 38713392Sgiacomo.travaglini@arm.com MISCREG_OSDTRRX_EL1, 38813392Sgiacomo.travaglini@arm.com MISCREG_MDSCR_EL1, 38913392Sgiacomo.travaglini@arm.com MISCREG_OSDTRTX_EL1, 39013392Sgiacomo.travaglini@arm.com MISCREG_OSECCR_EL1, 39113392Sgiacomo.travaglini@arm.com MISCREG_DBGBVR0_EL1, 39213392Sgiacomo.travaglini@arm.com MISCREG_DBGBVR1_EL1, 39313392Sgiacomo.travaglini@arm.com MISCREG_DBGBVR2_EL1, 39413392Sgiacomo.travaglini@arm.com MISCREG_DBGBVR3_EL1, 39513392Sgiacomo.travaglini@arm.com MISCREG_DBGBVR4_EL1, 39613392Sgiacomo.travaglini@arm.com MISCREG_DBGBVR5_EL1, 39713392Sgiacomo.travaglini@arm.com MISCREG_DBGBCR0_EL1, 39813392Sgiacomo.travaglini@arm.com MISCREG_DBGBCR1_EL1, 39913392Sgiacomo.travaglini@arm.com MISCREG_DBGBCR2_EL1, 40013392Sgiacomo.travaglini@arm.com MISCREG_DBGBCR3_EL1, 40113392Sgiacomo.travaglini@arm.com MISCREG_DBGBCR4_EL1, 40213392Sgiacomo.travaglini@arm.com MISCREG_DBGBCR5_EL1, 40313392Sgiacomo.travaglini@arm.com MISCREG_DBGWVR0_EL1, 40413392Sgiacomo.travaglini@arm.com MISCREG_DBGWVR1_EL1, 40513392Sgiacomo.travaglini@arm.com MISCREG_DBGWVR2_EL1, 40613392Sgiacomo.travaglini@arm.com MISCREG_DBGWVR3_EL1, 40713392Sgiacomo.travaglini@arm.com MISCREG_DBGWCR0_EL1, 40813392Sgiacomo.travaglini@arm.com MISCREG_DBGWCR1_EL1, 40913392Sgiacomo.travaglini@arm.com MISCREG_DBGWCR2_EL1, 41013392Sgiacomo.travaglini@arm.com MISCREG_DBGWCR3_EL1, 41113392Sgiacomo.travaglini@arm.com MISCREG_MDCCSR_EL0, 41213392Sgiacomo.travaglini@arm.com MISCREG_MDDTR_EL0, 41313392Sgiacomo.travaglini@arm.com MISCREG_MDDTRTX_EL0, 41413392Sgiacomo.travaglini@arm.com MISCREG_MDDTRRX_EL0, 41513392Sgiacomo.travaglini@arm.com MISCREG_DBGVCR32_EL2, 41613392Sgiacomo.travaglini@arm.com MISCREG_MDRAR_EL1, 41713392Sgiacomo.travaglini@arm.com MISCREG_OSLAR_EL1, 41813392Sgiacomo.travaglini@arm.com MISCREG_OSLSR_EL1, 41913392Sgiacomo.travaglini@arm.com MISCREG_OSDLR_EL1, 42013392Sgiacomo.travaglini@arm.com MISCREG_DBGPRCR_EL1, 42113392Sgiacomo.travaglini@arm.com MISCREG_DBGCLAIMSET_EL1, 42213392Sgiacomo.travaglini@arm.com MISCREG_DBGCLAIMCLR_EL1, 42313392Sgiacomo.travaglini@arm.com MISCREG_DBGAUTHSTATUS_EL1, 42413392Sgiacomo.travaglini@arm.com MISCREG_TEECR32_EL1, // not in ARM DDI 0487A.b+ 42513392Sgiacomo.travaglini@arm.com MISCREG_TEEHBR32_EL1, // not in ARM DDI 0487A.b+ 4267259Sgblack@eecs.umich.edu 42710037SARM gem5 Developers // AArch64 registers (Op0=1,3) 42813392Sgiacomo.travaglini@arm.com MISCREG_MIDR_EL1, 42913392Sgiacomo.travaglini@arm.com MISCREG_MPIDR_EL1, 43013392Sgiacomo.travaglini@arm.com MISCREG_REVIDR_EL1, 43113392Sgiacomo.travaglini@arm.com MISCREG_ID_PFR0_EL1, 43213392Sgiacomo.travaglini@arm.com MISCREG_ID_PFR1_EL1, 43313392Sgiacomo.travaglini@arm.com MISCREG_ID_DFR0_EL1, 43413392Sgiacomo.travaglini@arm.com MISCREG_ID_AFR0_EL1, 43513392Sgiacomo.travaglini@arm.com MISCREG_ID_MMFR0_EL1, 43613392Sgiacomo.travaglini@arm.com MISCREG_ID_MMFR1_EL1, 43713392Sgiacomo.travaglini@arm.com MISCREG_ID_MMFR2_EL1, 43813392Sgiacomo.travaglini@arm.com MISCREG_ID_MMFR3_EL1, 43913392Sgiacomo.travaglini@arm.com MISCREG_ID_ISAR0_EL1, 44013392Sgiacomo.travaglini@arm.com MISCREG_ID_ISAR1_EL1, 44113392Sgiacomo.travaglini@arm.com MISCREG_ID_ISAR2_EL1, 44213392Sgiacomo.travaglini@arm.com MISCREG_ID_ISAR3_EL1, 44313392Sgiacomo.travaglini@arm.com MISCREG_ID_ISAR4_EL1, 44413392Sgiacomo.travaglini@arm.com MISCREG_ID_ISAR5_EL1, 44513392Sgiacomo.travaglini@arm.com MISCREG_MVFR0_EL1, 44613392Sgiacomo.travaglini@arm.com MISCREG_MVFR1_EL1, 44713392Sgiacomo.travaglini@arm.com MISCREG_MVFR2_EL1, 44813392Sgiacomo.travaglini@arm.com MISCREG_ID_AA64PFR0_EL1, 44913392Sgiacomo.travaglini@arm.com MISCREG_ID_AA64PFR1_EL1, 45013392Sgiacomo.travaglini@arm.com MISCREG_ID_AA64DFR0_EL1, 45113392Sgiacomo.travaglini@arm.com MISCREG_ID_AA64DFR1_EL1, 45213392Sgiacomo.travaglini@arm.com MISCREG_ID_AA64AFR0_EL1, 45313392Sgiacomo.travaglini@arm.com MISCREG_ID_AA64AFR1_EL1, 45413392Sgiacomo.travaglini@arm.com MISCREG_ID_AA64ISAR0_EL1, 45513392Sgiacomo.travaglini@arm.com MISCREG_ID_AA64ISAR1_EL1, 45613392Sgiacomo.travaglini@arm.com MISCREG_ID_AA64MMFR0_EL1, 45713392Sgiacomo.travaglini@arm.com MISCREG_ID_AA64MMFR1_EL1, 45813392Sgiacomo.travaglini@arm.com MISCREG_CCSIDR_EL1, 45913392Sgiacomo.travaglini@arm.com MISCREG_CLIDR_EL1, 46013392Sgiacomo.travaglini@arm.com MISCREG_AIDR_EL1, 46113392Sgiacomo.travaglini@arm.com MISCREG_CSSELR_EL1, 46213392Sgiacomo.travaglini@arm.com MISCREG_CTR_EL0, 46313392Sgiacomo.travaglini@arm.com MISCREG_DCZID_EL0, 46413392Sgiacomo.travaglini@arm.com MISCREG_VPIDR_EL2, 46513392Sgiacomo.travaglini@arm.com MISCREG_VMPIDR_EL2, 46613392Sgiacomo.travaglini@arm.com MISCREG_SCTLR_EL1, 46713392Sgiacomo.travaglini@arm.com MISCREG_ACTLR_EL1, 46813392Sgiacomo.travaglini@arm.com MISCREG_CPACR_EL1, 46913392Sgiacomo.travaglini@arm.com MISCREG_SCTLR_EL2, 47013392Sgiacomo.travaglini@arm.com MISCREG_ACTLR_EL2, 47113392Sgiacomo.travaglini@arm.com MISCREG_HCR_EL2, 47213392Sgiacomo.travaglini@arm.com MISCREG_MDCR_EL2, 47313392Sgiacomo.travaglini@arm.com MISCREG_CPTR_EL2, 47413392Sgiacomo.travaglini@arm.com MISCREG_HSTR_EL2, 47513392Sgiacomo.travaglini@arm.com MISCREG_HACR_EL2, 47613392Sgiacomo.travaglini@arm.com MISCREG_SCTLR_EL3, 47713392Sgiacomo.travaglini@arm.com MISCREG_ACTLR_EL3, 47813392Sgiacomo.travaglini@arm.com MISCREG_SCR_EL3, 47913392Sgiacomo.travaglini@arm.com MISCREG_SDER32_EL3, 48013392Sgiacomo.travaglini@arm.com MISCREG_CPTR_EL3, 48113392Sgiacomo.travaglini@arm.com MISCREG_MDCR_EL3, 48213392Sgiacomo.travaglini@arm.com MISCREG_TTBR0_EL1, 48313392Sgiacomo.travaglini@arm.com MISCREG_TTBR1_EL1, 48413392Sgiacomo.travaglini@arm.com MISCREG_TCR_EL1, 48513392Sgiacomo.travaglini@arm.com MISCREG_TTBR0_EL2, 48613392Sgiacomo.travaglini@arm.com MISCREG_TCR_EL2, 48713392Sgiacomo.travaglini@arm.com MISCREG_VTTBR_EL2, 48813392Sgiacomo.travaglini@arm.com MISCREG_VTCR_EL2, 48913392Sgiacomo.travaglini@arm.com MISCREG_TTBR0_EL3, 49013392Sgiacomo.travaglini@arm.com MISCREG_TCR_EL3, 49113392Sgiacomo.travaglini@arm.com MISCREG_DACR32_EL2, 49213392Sgiacomo.travaglini@arm.com MISCREG_SPSR_EL1, 49313392Sgiacomo.travaglini@arm.com MISCREG_ELR_EL1, 49413392Sgiacomo.travaglini@arm.com MISCREG_SP_EL0, 49513392Sgiacomo.travaglini@arm.com MISCREG_SPSEL, 49613392Sgiacomo.travaglini@arm.com MISCREG_CURRENTEL, 49713392Sgiacomo.travaglini@arm.com MISCREG_NZCV, 49813392Sgiacomo.travaglini@arm.com MISCREG_DAIF, 49913392Sgiacomo.travaglini@arm.com MISCREG_FPCR, 50013392Sgiacomo.travaglini@arm.com MISCREG_FPSR, 50113392Sgiacomo.travaglini@arm.com MISCREG_DSPSR_EL0, 50213392Sgiacomo.travaglini@arm.com MISCREG_DLR_EL0, 50313392Sgiacomo.travaglini@arm.com MISCREG_SPSR_EL2, 50413392Sgiacomo.travaglini@arm.com MISCREG_ELR_EL2, 50513392Sgiacomo.travaglini@arm.com MISCREG_SP_EL1, 50613392Sgiacomo.travaglini@arm.com MISCREG_SPSR_IRQ_AA64, 50713392Sgiacomo.travaglini@arm.com MISCREG_SPSR_ABT_AA64, 50813392Sgiacomo.travaglini@arm.com MISCREG_SPSR_UND_AA64, 50913392Sgiacomo.travaglini@arm.com MISCREG_SPSR_FIQ_AA64, 51013392Sgiacomo.travaglini@arm.com MISCREG_SPSR_EL3, 51113392Sgiacomo.travaglini@arm.com MISCREG_ELR_EL3, 51213392Sgiacomo.travaglini@arm.com MISCREG_SP_EL2, 51313392Sgiacomo.travaglini@arm.com MISCREG_AFSR0_EL1, 51413392Sgiacomo.travaglini@arm.com MISCREG_AFSR1_EL1, 51513392Sgiacomo.travaglini@arm.com MISCREG_ESR_EL1, 51613392Sgiacomo.travaglini@arm.com MISCREG_IFSR32_EL2, 51713392Sgiacomo.travaglini@arm.com MISCREG_AFSR0_EL2, 51813392Sgiacomo.travaglini@arm.com MISCREG_AFSR1_EL2, 51913392Sgiacomo.travaglini@arm.com MISCREG_ESR_EL2, 52013392Sgiacomo.travaglini@arm.com MISCREG_FPEXC32_EL2, 52113392Sgiacomo.travaglini@arm.com MISCREG_AFSR0_EL3, 52213392Sgiacomo.travaglini@arm.com MISCREG_AFSR1_EL3, 52313392Sgiacomo.travaglini@arm.com MISCREG_ESR_EL3, 52413392Sgiacomo.travaglini@arm.com MISCREG_FAR_EL1, 52513392Sgiacomo.travaglini@arm.com MISCREG_FAR_EL2, 52613392Sgiacomo.travaglini@arm.com MISCREG_HPFAR_EL2, 52713392Sgiacomo.travaglini@arm.com MISCREG_FAR_EL3, 52813392Sgiacomo.travaglini@arm.com MISCREG_IC_IALLUIS, 52913392Sgiacomo.travaglini@arm.com MISCREG_PAR_EL1, 53013392Sgiacomo.travaglini@arm.com MISCREG_IC_IALLU, 53113392Sgiacomo.travaglini@arm.com MISCREG_DC_IVAC_Xt, 53213392Sgiacomo.travaglini@arm.com MISCREG_DC_ISW_Xt, 53313392Sgiacomo.travaglini@arm.com MISCREG_AT_S1E1R_Xt, 53413392Sgiacomo.travaglini@arm.com MISCREG_AT_S1E1W_Xt, 53513392Sgiacomo.travaglini@arm.com MISCREG_AT_S1E0R_Xt, 53613392Sgiacomo.travaglini@arm.com MISCREG_AT_S1E0W_Xt, 53713392Sgiacomo.travaglini@arm.com MISCREG_DC_CSW_Xt, 53813392Sgiacomo.travaglini@arm.com MISCREG_DC_CISW_Xt, 53913392Sgiacomo.travaglini@arm.com MISCREG_DC_ZVA_Xt, 54013392Sgiacomo.travaglini@arm.com MISCREG_IC_IVAU_Xt, 54113392Sgiacomo.travaglini@arm.com MISCREG_DC_CVAC_Xt, 54213392Sgiacomo.travaglini@arm.com MISCREG_DC_CVAU_Xt, 54313392Sgiacomo.travaglini@arm.com MISCREG_DC_CIVAC_Xt, 54413392Sgiacomo.travaglini@arm.com MISCREG_AT_S1E2R_Xt, 54513392Sgiacomo.travaglini@arm.com MISCREG_AT_S1E2W_Xt, 54613392Sgiacomo.travaglini@arm.com MISCREG_AT_S12E1R_Xt, 54713392Sgiacomo.travaglini@arm.com MISCREG_AT_S12E1W_Xt, 54813392Sgiacomo.travaglini@arm.com MISCREG_AT_S12E0R_Xt, 54913392Sgiacomo.travaglini@arm.com MISCREG_AT_S12E0W_Xt, 55013392Sgiacomo.travaglini@arm.com MISCREG_AT_S1E3R_Xt, 55113392Sgiacomo.travaglini@arm.com MISCREG_AT_S1E3W_Xt, 55213392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VMALLE1IS, 55313392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VAE1IS_Xt, 55413392Sgiacomo.travaglini@arm.com MISCREG_TLBI_ASIDE1IS_Xt, 55513392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VAAE1IS_Xt, 55613392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VALE1IS_Xt, 55713392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VAALE1IS_Xt, 55813392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VMALLE1, 55913392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VAE1_Xt, 56013392Sgiacomo.travaglini@arm.com MISCREG_TLBI_ASIDE1_Xt, 56113392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VAAE1_Xt, 56213392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VALE1_Xt, 56313392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VAALE1_Xt, 56413392Sgiacomo.travaglini@arm.com MISCREG_TLBI_IPAS2E1IS_Xt, 56513392Sgiacomo.travaglini@arm.com MISCREG_TLBI_IPAS2LE1IS_Xt, 56613392Sgiacomo.travaglini@arm.com MISCREG_TLBI_ALLE2IS, 56713392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VAE2IS_Xt, 56813392Sgiacomo.travaglini@arm.com MISCREG_TLBI_ALLE1IS, 56913392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VALE2IS_Xt, 57013392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VMALLS12E1IS, 57113392Sgiacomo.travaglini@arm.com MISCREG_TLBI_IPAS2E1_Xt, 57213392Sgiacomo.travaglini@arm.com MISCREG_TLBI_IPAS2LE1_Xt, 57313392Sgiacomo.travaglini@arm.com MISCREG_TLBI_ALLE2, 57413392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VAE2_Xt, 57513392Sgiacomo.travaglini@arm.com MISCREG_TLBI_ALLE1, 57613392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VALE2_Xt, 57713392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VMALLS12E1, 57813392Sgiacomo.travaglini@arm.com MISCREG_TLBI_ALLE3IS, 57913392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VAE3IS_Xt, 58013392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VALE3IS_Xt, 58113392Sgiacomo.travaglini@arm.com MISCREG_TLBI_ALLE3, 58213392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VAE3_Xt, 58313392Sgiacomo.travaglini@arm.com MISCREG_TLBI_VALE3_Xt, 58413392Sgiacomo.travaglini@arm.com MISCREG_PMINTENSET_EL1, 58513392Sgiacomo.travaglini@arm.com MISCREG_PMINTENCLR_EL1, 58613392Sgiacomo.travaglini@arm.com MISCREG_PMCR_EL0, 58713392Sgiacomo.travaglini@arm.com MISCREG_PMCNTENSET_EL0, 58813392Sgiacomo.travaglini@arm.com MISCREG_PMCNTENCLR_EL0, 58913392Sgiacomo.travaglini@arm.com MISCREG_PMOVSCLR_EL0, 59013392Sgiacomo.travaglini@arm.com MISCREG_PMSWINC_EL0, 59113392Sgiacomo.travaglini@arm.com MISCREG_PMSELR_EL0, 59213392Sgiacomo.travaglini@arm.com MISCREG_PMCEID0_EL0, 59313392Sgiacomo.travaglini@arm.com MISCREG_PMCEID1_EL0, 59413392Sgiacomo.travaglini@arm.com MISCREG_PMCCNTR_EL0, 59513392Sgiacomo.travaglini@arm.com MISCREG_PMXEVTYPER_EL0, 59613392Sgiacomo.travaglini@arm.com MISCREG_PMCCFILTR_EL0, 59713392Sgiacomo.travaglini@arm.com MISCREG_PMXEVCNTR_EL0, 59813392Sgiacomo.travaglini@arm.com MISCREG_PMUSERENR_EL0, 59913392Sgiacomo.travaglini@arm.com MISCREG_PMOVSSET_EL0, 60013392Sgiacomo.travaglini@arm.com MISCREG_MAIR_EL1, 60113392Sgiacomo.travaglini@arm.com MISCREG_AMAIR_EL1, 60213392Sgiacomo.travaglini@arm.com MISCREG_MAIR_EL2, 60313392Sgiacomo.travaglini@arm.com MISCREG_AMAIR_EL2, 60413392Sgiacomo.travaglini@arm.com MISCREG_MAIR_EL3, 60513392Sgiacomo.travaglini@arm.com MISCREG_AMAIR_EL3, 60613392Sgiacomo.travaglini@arm.com MISCREG_L2CTLR_EL1, 60713392Sgiacomo.travaglini@arm.com MISCREG_L2ECTLR_EL1, 60813392Sgiacomo.travaglini@arm.com MISCREG_VBAR_EL1, 60913392Sgiacomo.travaglini@arm.com MISCREG_RVBAR_EL1, 61013392Sgiacomo.travaglini@arm.com MISCREG_ISR_EL1, 61113392Sgiacomo.travaglini@arm.com MISCREG_VBAR_EL2, 61213392Sgiacomo.travaglini@arm.com MISCREG_RVBAR_EL2, 61313392Sgiacomo.travaglini@arm.com MISCREG_VBAR_EL3, 61413392Sgiacomo.travaglini@arm.com MISCREG_RVBAR_EL3, 61513392Sgiacomo.travaglini@arm.com MISCREG_RMR_EL3, 61613392Sgiacomo.travaglini@arm.com MISCREG_CONTEXTIDR_EL1, 61713392Sgiacomo.travaglini@arm.com MISCREG_TPIDR_EL1, 61813392Sgiacomo.travaglini@arm.com MISCREG_TPIDR_EL0, 61913392Sgiacomo.travaglini@arm.com MISCREG_TPIDRRO_EL0, 62013392Sgiacomo.travaglini@arm.com MISCREG_TPIDR_EL2, 62113392Sgiacomo.travaglini@arm.com MISCREG_TPIDR_EL3, 62213392Sgiacomo.travaglini@arm.com MISCREG_CNTKCTL_EL1, 62313392Sgiacomo.travaglini@arm.com MISCREG_CNTFRQ_EL0, 62413392Sgiacomo.travaglini@arm.com MISCREG_CNTPCT_EL0, 62513392Sgiacomo.travaglini@arm.com MISCREG_CNTVCT_EL0, 62613392Sgiacomo.travaglini@arm.com MISCREG_CNTP_TVAL_EL0, 62713392Sgiacomo.travaglini@arm.com MISCREG_CNTP_CTL_EL0, 62813392Sgiacomo.travaglini@arm.com MISCREG_CNTP_CVAL_EL0, 62913392Sgiacomo.travaglini@arm.com MISCREG_CNTV_TVAL_EL0, 63013392Sgiacomo.travaglini@arm.com MISCREG_CNTV_CTL_EL0, 63113392Sgiacomo.travaglini@arm.com MISCREG_CNTV_CVAL_EL0, 63213392Sgiacomo.travaglini@arm.com MISCREG_PMEVCNTR0_EL0, 63313392Sgiacomo.travaglini@arm.com MISCREG_PMEVCNTR1_EL0, 63413392Sgiacomo.travaglini@arm.com MISCREG_PMEVCNTR2_EL0, 63513392Sgiacomo.travaglini@arm.com MISCREG_PMEVCNTR3_EL0, 63613392Sgiacomo.travaglini@arm.com MISCREG_PMEVCNTR4_EL0, 63713392Sgiacomo.travaglini@arm.com MISCREG_PMEVCNTR5_EL0, 63813392Sgiacomo.travaglini@arm.com MISCREG_PMEVTYPER0_EL0, 63913392Sgiacomo.travaglini@arm.com MISCREG_PMEVTYPER1_EL0, 64013392Sgiacomo.travaglini@arm.com MISCREG_PMEVTYPER2_EL0, 64113392Sgiacomo.travaglini@arm.com MISCREG_PMEVTYPER3_EL0, 64213392Sgiacomo.travaglini@arm.com MISCREG_PMEVTYPER4_EL0, 64313392Sgiacomo.travaglini@arm.com MISCREG_PMEVTYPER5_EL0, 64413392Sgiacomo.travaglini@arm.com MISCREG_CNTVOFF_EL2, 64513392Sgiacomo.travaglini@arm.com MISCREG_CNTHCTL_EL2, 64613392Sgiacomo.travaglini@arm.com MISCREG_CNTHP_TVAL_EL2, 64713392Sgiacomo.travaglini@arm.com MISCREG_CNTHP_CTL_EL2, 64813392Sgiacomo.travaglini@arm.com MISCREG_CNTHP_CVAL_EL2, 64913392Sgiacomo.travaglini@arm.com MISCREG_CNTPS_TVAL_EL1, 65013392Sgiacomo.travaglini@arm.com MISCREG_CNTPS_CTL_EL1, 65113392Sgiacomo.travaglini@arm.com MISCREG_CNTPS_CVAL_EL1, 65213392Sgiacomo.travaglini@arm.com MISCREG_IL1DATA0_EL1, 65313392Sgiacomo.travaglini@arm.com MISCREG_IL1DATA1_EL1, 65413392Sgiacomo.travaglini@arm.com MISCREG_IL1DATA2_EL1, 65513392Sgiacomo.travaglini@arm.com MISCREG_IL1DATA3_EL1, 65613392Sgiacomo.travaglini@arm.com MISCREG_DL1DATA0_EL1, 65713392Sgiacomo.travaglini@arm.com MISCREG_DL1DATA1_EL1, 65813392Sgiacomo.travaglini@arm.com MISCREG_DL1DATA2_EL1, 65913392Sgiacomo.travaglini@arm.com MISCREG_DL1DATA3_EL1, 66013392Sgiacomo.travaglini@arm.com MISCREG_DL1DATA4_EL1, 66113392Sgiacomo.travaglini@arm.com MISCREG_L2ACTLR_EL1, 66213392Sgiacomo.travaglini@arm.com MISCREG_CPUACTLR_EL1, 66313392Sgiacomo.travaglini@arm.com MISCREG_CPUECTLR_EL1, 66413392Sgiacomo.travaglini@arm.com MISCREG_CPUMERRSR_EL1, 66513392Sgiacomo.travaglini@arm.com MISCREG_L2MERRSR_EL1, 66613392Sgiacomo.travaglini@arm.com MISCREG_CBAR_EL1, 66713392Sgiacomo.travaglini@arm.com MISCREG_CONTEXTIDR_EL2, 6687259Sgblack@eecs.umich.edu 66912675Sgiacomo.travaglini@arm.com // Introduced in ARMv8.1 67013392Sgiacomo.travaglini@arm.com MISCREG_TTBR1_EL2, 67113392Sgiacomo.travaglini@arm.com MISCREG_CNTHV_CTL_EL2, 67213392Sgiacomo.travaglini@arm.com MISCREG_CNTHV_CVAL_EL2, 67313392Sgiacomo.travaglini@arm.com MISCREG_CNTHV_TVAL_EL2, 67412675Sgiacomo.travaglini@arm.com 67513392Sgiacomo.travaglini@arm.com MISCREG_ID_AA64MMFR2_EL1, 67613531Sjairo.balart@metempsy.com 67713531Sjairo.balart@metempsy.com // GICv3, CPU interface 67813531Sjairo.balart@metempsy.com MISCREG_ICC_PMR_EL1, 67913531Sjairo.balart@metempsy.com MISCREG_ICC_IAR0_EL1, 68013531Sjairo.balart@metempsy.com MISCREG_ICC_EOIR0_EL1, 68113531Sjairo.balart@metempsy.com MISCREG_ICC_HPPIR0_EL1, 68213531Sjairo.balart@metempsy.com MISCREG_ICC_BPR0_EL1, 68313531Sjairo.balart@metempsy.com MISCREG_ICC_AP0R0_EL1, 68413531Sjairo.balart@metempsy.com MISCREG_ICC_AP0R1_EL1, 68513531Sjairo.balart@metempsy.com MISCREG_ICC_AP0R2_EL1, 68613531Sjairo.balart@metempsy.com MISCREG_ICC_AP0R3_EL1, 68713531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R0_EL1, 68813531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R0_EL1_NS, 68913531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R0_EL1_S, 69013531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R1_EL1, 69113531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R1_EL1_NS, 69213531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R1_EL1_S, 69313531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R2_EL1, 69413531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R2_EL1_NS, 69513531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R2_EL1_S, 69613531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R3_EL1, 69713531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R3_EL1_NS, 69813531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R3_EL1_S, 69913531Sjairo.balart@metempsy.com MISCREG_ICC_DIR_EL1, 70013531Sjairo.balart@metempsy.com MISCREG_ICC_RPR_EL1, 70113531Sjairo.balart@metempsy.com MISCREG_ICC_SGI1R_EL1, 70213531Sjairo.balart@metempsy.com MISCREG_ICC_ASGI1R_EL1, 70313531Sjairo.balart@metempsy.com MISCREG_ICC_SGI0R_EL1, 70413531Sjairo.balart@metempsy.com MISCREG_ICC_IAR1_EL1, 70513531Sjairo.balart@metempsy.com MISCREG_ICC_EOIR1_EL1, 70613531Sjairo.balart@metempsy.com MISCREG_ICC_HPPIR1_EL1, 70713531Sjairo.balart@metempsy.com MISCREG_ICC_BPR1_EL1, 70813531Sjairo.balart@metempsy.com MISCREG_ICC_BPR1_EL1_NS, 70913531Sjairo.balart@metempsy.com MISCREG_ICC_BPR1_EL1_S, 71013531Sjairo.balart@metempsy.com MISCREG_ICC_CTLR_EL1, 71113531Sjairo.balart@metempsy.com MISCREG_ICC_CTLR_EL1_NS, 71213531Sjairo.balart@metempsy.com MISCREG_ICC_CTLR_EL1_S, 71313531Sjairo.balart@metempsy.com MISCREG_ICC_SRE_EL1, 71413531Sjairo.balart@metempsy.com MISCREG_ICC_SRE_EL1_NS, 71513531Sjairo.balart@metempsy.com MISCREG_ICC_SRE_EL1_S, 71613531Sjairo.balart@metempsy.com MISCREG_ICC_IGRPEN0_EL1, 71713531Sjairo.balart@metempsy.com MISCREG_ICC_IGRPEN1_EL1, 71813531Sjairo.balart@metempsy.com MISCREG_ICC_IGRPEN1_EL1_NS, 71913531Sjairo.balart@metempsy.com MISCREG_ICC_IGRPEN1_EL1_S, 72013531Sjairo.balart@metempsy.com MISCREG_ICC_SRE_EL2, 72113531Sjairo.balart@metempsy.com MISCREG_ICC_CTLR_EL3, 72213531Sjairo.balart@metempsy.com MISCREG_ICC_SRE_EL3, 72313531Sjairo.balart@metempsy.com MISCREG_ICC_IGRPEN1_EL3, 72413531Sjairo.balart@metempsy.com 72513531Sjairo.balart@metempsy.com // GICv3, CPU interface, virtualization 72613531Sjairo.balart@metempsy.com MISCREG_ICH_AP0R0_EL2, 72713531Sjairo.balart@metempsy.com MISCREG_ICH_AP0R1_EL2, 72813531Sjairo.balart@metempsy.com MISCREG_ICH_AP0R2_EL2, 72913531Sjairo.balart@metempsy.com MISCREG_ICH_AP0R3_EL2, 73013531Sjairo.balart@metempsy.com MISCREG_ICH_AP1R0_EL2, 73113531Sjairo.balart@metempsy.com MISCREG_ICH_AP1R1_EL2, 73213531Sjairo.balart@metempsy.com MISCREG_ICH_AP1R2_EL2, 73313531Sjairo.balart@metempsy.com MISCREG_ICH_AP1R3_EL2, 73413531Sjairo.balart@metempsy.com MISCREG_ICH_HCR_EL2, 73513531Sjairo.balart@metempsy.com MISCREG_ICH_VTR_EL2, 73613531Sjairo.balart@metempsy.com MISCREG_ICH_MISR_EL2, 73713531Sjairo.balart@metempsy.com MISCREG_ICH_EISR_EL2, 73813531Sjairo.balart@metempsy.com MISCREG_ICH_ELRSR_EL2, 73913531Sjairo.balart@metempsy.com MISCREG_ICH_VMCR_EL2, 74013531Sjairo.balart@metempsy.com MISCREG_ICH_LR0_EL2, 74113531Sjairo.balart@metempsy.com MISCREG_ICH_LR1_EL2, 74213531Sjairo.balart@metempsy.com MISCREG_ICH_LR2_EL2, 74313531Sjairo.balart@metempsy.com MISCREG_ICH_LR3_EL2, 74413531Sjairo.balart@metempsy.com MISCREG_ICH_LR4_EL2, 74513531Sjairo.balart@metempsy.com MISCREG_ICH_LR5_EL2, 74613531Sjairo.balart@metempsy.com MISCREG_ICH_LR6_EL2, 74713531Sjairo.balart@metempsy.com MISCREG_ICH_LR7_EL2, 74813531Sjairo.balart@metempsy.com MISCREG_ICH_LR8_EL2, 74913531Sjairo.balart@metempsy.com MISCREG_ICH_LR9_EL2, 75013531Sjairo.balart@metempsy.com MISCREG_ICH_LR10_EL2, 75113531Sjairo.balart@metempsy.com MISCREG_ICH_LR11_EL2, 75213531Sjairo.balart@metempsy.com MISCREG_ICH_LR12_EL2, 75313531Sjairo.balart@metempsy.com MISCREG_ICH_LR13_EL2, 75413531Sjairo.balart@metempsy.com MISCREG_ICH_LR14_EL2, 75513531Sjairo.balart@metempsy.com MISCREG_ICH_LR15_EL2, 75613531Sjairo.balart@metempsy.com 75713531Sjairo.balart@metempsy.com MISCREG_ICV_PMR_EL1, 75813531Sjairo.balart@metempsy.com MISCREG_ICV_IAR0_EL1, 75913531Sjairo.balart@metempsy.com MISCREG_ICV_EOIR0_EL1, 76013531Sjairo.balart@metempsy.com MISCREG_ICV_HPPIR0_EL1, 76113531Sjairo.balart@metempsy.com MISCREG_ICV_BPR0_EL1, 76213531Sjairo.balart@metempsy.com MISCREG_ICV_AP0R0_EL1, 76313531Sjairo.balart@metempsy.com MISCREG_ICV_AP0R1_EL1, 76413531Sjairo.balart@metempsy.com MISCREG_ICV_AP0R2_EL1, 76513531Sjairo.balart@metempsy.com MISCREG_ICV_AP0R3_EL1, 76613531Sjairo.balart@metempsy.com MISCREG_ICV_AP1R0_EL1, 76713531Sjairo.balart@metempsy.com MISCREG_ICV_AP1R0_EL1_NS, 76813531Sjairo.balart@metempsy.com MISCREG_ICV_AP1R0_EL1_S, 76913531Sjairo.balart@metempsy.com MISCREG_ICV_AP1R1_EL1, 77013531Sjairo.balart@metempsy.com MISCREG_ICV_AP1R1_EL1_NS, 77113531Sjairo.balart@metempsy.com MISCREG_ICV_AP1R1_EL1_S, 77213531Sjairo.balart@metempsy.com MISCREG_ICV_AP1R2_EL1, 77313531Sjairo.balart@metempsy.com MISCREG_ICV_AP1R2_EL1_NS, 77413531Sjairo.balart@metempsy.com MISCREG_ICV_AP1R2_EL1_S, 77513531Sjairo.balart@metempsy.com MISCREG_ICV_AP1R3_EL1, 77613531Sjairo.balart@metempsy.com MISCREG_ICV_AP1R3_EL1_NS, 77713531Sjairo.balart@metempsy.com MISCREG_ICV_AP1R3_EL1_S, 77813531Sjairo.balart@metempsy.com MISCREG_ICV_DIR_EL1, 77913531Sjairo.balart@metempsy.com MISCREG_ICV_RPR_EL1, 78013531Sjairo.balart@metempsy.com MISCREG_ICV_SGI1R_EL1, 78113531Sjairo.balart@metempsy.com MISCREG_ICV_ASGI1R_EL1, 78213531Sjairo.balart@metempsy.com MISCREG_ICV_SGI0R_EL1, 78313531Sjairo.balart@metempsy.com MISCREG_ICV_IAR1_EL1, 78413531Sjairo.balart@metempsy.com MISCREG_ICV_EOIR1_EL1, 78513531Sjairo.balart@metempsy.com MISCREG_ICV_HPPIR1_EL1, 78613531Sjairo.balart@metempsy.com MISCREG_ICV_BPR1_EL1, 78713531Sjairo.balart@metempsy.com MISCREG_ICV_BPR1_EL1_NS, 78813531Sjairo.balart@metempsy.com MISCREG_ICV_BPR1_EL1_S, 78913531Sjairo.balart@metempsy.com MISCREG_ICV_CTLR_EL1, 79013531Sjairo.balart@metempsy.com MISCREG_ICV_CTLR_EL1_NS, 79113531Sjairo.balart@metempsy.com MISCREG_ICV_CTLR_EL1_S, 79213531Sjairo.balart@metempsy.com MISCREG_ICV_SRE_EL1, 79313531Sjairo.balart@metempsy.com MISCREG_ICV_SRE_EL1_NS, 79413531Sjairo.balart@metempsy.com MISCREG_ICV_SRE_EL1_S, 79513531Sjairo.balart@metempsy.com MISCREG_ICV_IGRPEN0_EL1, 79613531Sjairo.balart@metempsy.com MISCREG_ICV_IGRPEN1_EL1, 79713531Sjairo.balart@metempsy.com MISCREG_ICV_IGRPEN1_EL1_NS, 79813531Sjairo.balart@metempsy.com MISCREG_ICV_IGRPEN1_EL1_S, 79913531Sjairo.balart@metempsy.com 80013531Sjairo.balart@metempsy.com MISCREG_ICC_AP0R0, 80113531Sjairo.balart@metempsy.com MISCREG_ICC_AP0R1, 80213531Sjairo.balart@metempsy.com MISCREG_ICC_AP0R2, 80313531Sjairo.balart@metempsy.com MISCREG_ICC_AP0R3, 80413531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R0, 80513531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R0_NS, 80613531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R0_S, 80713531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R1, 80813531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R1_NS, 80913531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R1_S, 81013531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R2, 81113531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R2_NS, 81213531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R2_S, 81313531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R3, 81413531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R3_NS, 81513531Sjairo.balart@metempsy.com MISCREG_ICC_AP1R3_S, 81613531Sjairo.balart@metempsy.com MISCREG_ICC_ASGI1R, 81713531Sjairo.balart@metempsy.com MISCREG_ICC_BPR0, 81813531Sjairo.balart@metempsy.com MISCREG_ICC_BPR1, 81913531Sjairo.balart@metempsy.com MISCREG_ICC_BPR1_NS, 82013531Sjairo.balart@metempsy.com MISCREG_ICC_BPR1_S, 82113531Sjairo.balart@metempsy.com MISCREG_ICC_CTLR, 82213531Sjairo.balart@metempsy.com MISCREG_ICC_CTLR_NS, 82313531Sjairo.balart@metempsy.com MISCREG_ICC_CTLR_S, 82413531Sjairo.balart@metempsy.com MISCREG_ICC_DIR, 82513531Sjairo.balart@metempsy.com MISCREG_ICC_EOIR0, 82613531Sjairo.balart@metempsy.com MISCREG_ICC_EOIR1, 82713531Sjairo.balart@metempsy.com MISCREG_ICC_HPPIR0, 82813531Sjairo.balart@metempsy.com MISCREG_ICC_HPPIR1, 82913531Sjairo.balart@metempsy.com MISCREG_ICC_HSRE, 83013531Sjairo.balart@metempsy.com MISCREG_ICC_IAR0, 83113531Sjairo.balart@metempsy.com MISCREG_ICC_IAR1, 83213531Sjairo.balart@metempsy.com MISCREG_ICC_IGRPEN0, 83313531Sjairo.balart@metempsy.com MISCREG_ICC_IGRPEN1, 83413531Sjairo.balart@metempsy.com MISCREG_ICC_IGRPEN1_NS, 83513531Sjairo.balart@metempsy.com MISCREG_ICC_IGRPEN1_S, 83613531Sjairo.balart@metempsy.com MISCREG_ICC_MCTLR, 83713531Sjairo.balart@metempsy.com MISCREG_ICC_MGRPEN1, 83813531Sjairo.balart@metempsy.com MISCREG_ICC_MSRE, 83913531Sjairo.balart@metempsy.com MISCREG_ICC_PMR, 84013531Sjairo.balart@metempsy.com MISCREG_ICC_RPR, 84113531Sjairo.balart@metempsy.com MISCREG_ICC_SGI0R, 84213531Sjairo.balart@metempsy.com MISCREG_ICC_SGI1R, 84313531Sjairo.balart@metempsy.com MISCREG_ICC_SRE, 84413531Sjairo.balart@metempsy.com MISCREG_ICC_SRE_NS, 84513531Sjairo.balart@metempsy.com MISCREG_ICC_SRE_S, 84613531Sjairo.balart@metempsy.com 84713531Sjairo.balart@metempsy.com MISCREG_ICH_AP0R0, 84813531Sjairo.balart@metempsy.com MISCREG_ICH_AP0R1, 84913531Sjairo.balart@metempsy.com MISCREG_ICH_AP0R2, 85013531Sjairo.balart@metempsy.com MISCREG_ICH_AP0R3, 85113531Sjairo.balart@metempsy.com MISCREG_ICH_AP1R0, 85213531Sjairo.balart@metempsy.com MISCREG_ICH_AP1R1, 85313531Sjairo.balart@metempsy.com MISCREG_ICH_AP1R2, 85413531Sjairo.balart@metempsy.com MISCREG_ICH_AP1R3, 85513531Sjairo.balart@metempsy.com MISCREG_ICH_HCR, 85613531Sjairo.balart@metempsy.com MISCREG_ICH_VTR, 85713531Sjairo.balart@metempsy.com MISCREG_ICH_MISR, 85813531Sjairo.balart@metempsy.com MISCREG_ICH_EISR, 85913531Sjairo.balart@metempsy.com MISCREG_ICH_ELRSR, 86013531Sjairo.balart@metempsy.com MISCREG_ICH_VMCR, 86113531Sjairo.balart@metempsy.com MISCREG_ICH_LR0, 86213531Sjairo.balart@metempsy.com MISCREG_ICH_LR1, 86313531Sjairo.balart@metempsy.com MISCREG_ICH_LR2, 86413531Sjairo.balart@metempsy.com MISCREG_ICH_LR3, 86513531Sjairo.balart@metempsy.com MISCREG_ICH_LR4, 86613531Sjairo.balart@metempsy.com MISCREG_ICH_LR5, 86713531Sjairo.balart@metempsy.com MISCREG_ICH_LR6, 86813531Sjairo.balart@metempsy.com MISCREG_ICH_LR7, 86913531Sjairo.balart@metempsy.com MISCREG_ICH_LR8, 87013531Sjairo.balart@metempsy.com MISCREG_ICH_LR9, 87113531Sjairo.balart@metempsy.com MISCREG_ICH_LR10, 87213531Sjairo.balart@metempsy.com MISCREG_ICH_LR11, 87313531Sjairo.balart@metempsy.com MISCREG_ICH_LR12, 87413531Sjairo.balart@metempsy.com MISCREG_ICH_LR13, 87513531Sjairo.balart@metempsy.com MISCREG_ICH_LR14, 87613531Sjairo.balart@metempsy.com MISCREG_ICH_LR15, 87713531Sjairo.balart@metempsy.com MISCREG_ICH_LRC0, 87813531Sjairo.balart@metempsy.com MISCREG_ICH_LRC1, 87913531Sjairo.balart@metempsy.com MISCREG_ICH_LRC2, 88013531Sjairo.balart@metempsy.com MISCREG_ICH_LRC3, 88113531Sjairo.balart@metempsy.com MISCREG_ICH_LRC4, 88213531Sjairo.balart@metempsy.com MISCREG_ICH_LRC5, 88313531Sjairo.balart@metempsy.com MISCREG_ICH_LRC6, 88413531Sjairo.balart@metempsy.com MISCREG_ICH_LRC7, 88513531Sjairo.balart@metempsy.com MISCREG_ICH_LRC8, 88613531Sjairo.balart@metempsy.com MISCREG_ICH_LRC9, 88713531Sjairo.balart@metempsy.com MISCREG_ICH_LRC10, 88813531Sjairo.balart@metempsy.com MISCREG_ICH_LRC11, 88913531Sjairo.balart@metempsy.com MISCREG_ICH_LRC12, 89013531Sjairo.balart@metempsy.com MISCREG_ICH_LRC13, 89113531Sjairo.balart@metempsy.com MISCREG_ICH_LRC14, 89213531Sjairo.balart@metempsy.com MISCREG_ICH_LRC15, 89313531Sjairo.balart@metempsy.com 89412529Sgiacomo.travaglini@arm.com // These MISCREG_FREESLOT are available Misc Register 89512529Sgiacomo.travaglini@arm.com // slots for future registers to be implemented. 89613392Sgiacomo.travaglini@arm.com MISCREG_FREESLOT_1, 89712529Sgiacomo.travaglini@arm.com 89812529Sgiacomo.travaglini@arm.com // NUM_PHYS_MISCREGS specifies the number of actual physical 89912529Sgiacomo.travaglini@arm.com // registers, not considering the following pseudo-registers 90012530Sgiacomo.travaglini@arm.com // (dummy registers), like UNKNOWN, CP15_UNIMPL, MISCREG_IMPDEF_UNIMPL. 90112529Sgiacomo.travaglini@arm.com // Checkpointing should use this physical index when 90212529Sgiacomo.travaglini@arm.com // saving/restoring register values. 90313392Sgiacomo.travaglini@arm.com NUM_PHYS_MISCREGS, 90412529Sgiacomo.travaglini@arm.com 90510037SARM gem5 Developers // Dummy registers 90612529Sgiacomo.travaglini@arm.com MISCREG_NOP, 90712529Sgiacomo.travaglini@arm.com MISCREG_RAZ, 90812529Sgiacomo.travaglini@arm.com MISCREG_CP14_UNIMPL, 90912529Sgiacomo.travaglini@arm.com MISCREG_CP15_UNIMPL, 91012529Sgiacomo.travaglini@arm.com MISCREG_UNKNOWN, 91110037SARM gem5 Developers 91212530Sgiacomo.travaglini@arm.com // Implementation defined register: this represent 91312530Sgiacomo.travaglini@arm.com // a pool of unimplemented registers whose access can throw 91412530Sgiacomo.travaglini@arm.com // either UNDEFINED or hypervisor trap exception. 91512530Sgiacomo.travaglini@arm.com MISCREG_IMPDEF_UNIMPL, 91612530Sgiacomo.travaglini@arm.com 91712815Sgiacomo.travaglini@arm.com // RAS extension (unimplemented) 91812815Sgiacomo.travaglini@arm.com MISCREG_ERRIDR_EL1, 91912815Sgiacomo.travaglini@arm.com MISCREG_ERRSELR_EL1, 92012815Sgiacomo.travaglini@arm.com MISCREG_ERXFR_EL1, 92112815Sgiacomo.travaglini@arm.com MISCREG_ERXCTLR_EL1, 92212815Sgiacomo.travaglini@arm.com MISCREG_ERXSTATUS_EL1, 92312815Sgiacomo.travaglini@arm.com MISCREG_ERXADDR_EL1, 92412815Sgiacomo.travaglini@arm.com MISCREG_ERXMISC0_EL1, 92512815Sgiacomo.travaglini@arm.com MISCREG_ERXMISC1_EL1, 92612815Sgiacomo.travaglini@arm.com MISCREG_DISR_EL1, 92712815Sgiacomo.travaglini@arm.com MISCREG_VSESR_EL2, 92812815Sgiacomo.travaglini@arm.com MISCREG_VDISR_EL2, 92912815Sgiacomo.travaglini@arm.com 93012529Sgiacomo.travaglini@arm.com // Total number of Misc Registers: Physical + Dummy 93112529Sgiacomo.travaglini@arm.com NUM_MISCREGS 9326261Sgblack@eecs.umich.edu }; 9336261Sgblack@eecs.umich.edu 93410037SARM gem5 Developers enum MiscRegInfo { 93510037SARM gem5 Developers MISCREG_IMPLEMENTED, 93610506SAli.Saidi@ARM.com MISCREG_UNVERIFIABLE, // Does the value change on every read (e.g. a 93710506SAli.Saidi@ARM.com // arch generic counter) 93810037SARM gem5 Developers MISCREG_WARN_NOT_FAIL, // If MISCREG_IMPLEMENTED is deasserted, it 93910037SARM gem5 Developers // tells whether the instruction should raise a 94010037SARM gem5 Developers // warning or fail 94110037SARM gem5 Developers MISCREG_MUTEX, // True if the register corresponds to a pair of 94210037SARM gem5 Developers // mutually exclusive registers 94310037SARM gem5 Developers MISCREG_BANKED, // True if the register is banked between the two 94410037SARM gem5 Developers // security states, and this is the parent node of the 94510037SARM gem5 Developers // two banked registers 94610037SARM gem5 Developers MISCREG_BANKED_CHILD, // The entry is one of the child registers that 94710037SARM gem5 Developers // forms a banked set of regs (along with the 94810037SARM gem5 Developers // other child regs) 94910037SARM gem5 Developers 95010037SARM gem5 Developers // Access permissions 95110037SARM gem5 Developers // User mode 95210037SARM gem5 Developers MISCREG_USR_NS_RD, 95310037SARM gem5 Developers MISCREG_USR_NS_WR, 95410037SARM gem5 Developers MISCREG_USR_S_RD, 95510037SARM gem5 Developers MISCREG_USR_S_WR, 95610037SARM gem5 Developers // Privileged modes other than hypervisor or monitor 95710037SARM gem5 Developers MISCREG_PRI_NS_RD, 95810037SARM gem5 Developers MISCREG_PRI_NS_WR, 95910037SARM gem5 Developers MISCREG_PRI_S_RD, 96010037SARM gem5 Developers MISCREG_PRI_S_WR, 96110037SARM gem5 Developers // Hypervisor mode 96210037SARM gem5 Developers MISCREG_HYP_RD, 96310037SARM gem5 Developers MISCREG_HYP_WR, 96410037SARM gem5 Developers // Monitor mode, SCR.NS == 0 96510037SARM gem5 Developers MISCREG_MON_NS0_RD, 96610037SARM gem5 Developers MISCREG_MON_NS0_WR, 96710037SARM gem5 Developers // Monitor mode, SCR.NS == 1 96810037SARM gem5 Developers MISCREG_MON_NS1_RD, 96910037SARM gem5 Developers MISCREG_MON_NS1_WR, 97010037SARM gem5 Developers 97110037SARM gem5 Developers NUM_MISCREG_INFOS 97210037SARM gem5 Developers }; 97310037SARM gem5 Developers 97410037SARM gem5 Developers extern std::bitset<NUM_MISCREG_INFOS> miscRegInfo[NUM_MISCREGS]; 97510037SARM gem5 Developers 97610037SARM gem5 Developers // Decodes 32-bit CP14 registers accessible through MCR/MRC instructions 9778868SMatt.Horsnell@arm.com MiscRegIndex decodeCP14Reg(unsigned crn, unsigned opc1, 9788868SMatt.Horsnell@arm.com unsigned crm, unsigned opc2); 97910037SARM gem5 Developers MiscRegIndex decodeAArch64SysReg(unsigned op0, unsigned op1, 98010037SARM gem5 Developers unsigned crn, unsigned crm, 98110037SARM gem5 Developers unsigned op2); 98210037SARM gem5 Developers // Whether a particular AArch64 system register is -always- read only. 98310037SARM gem5 Developers bool aarch64SysRegReadOnly(MiscRegIndex miscReg); 9848868SMatt.Horsnell@arm.com 98510037SARM gem5 Developers // Decodes 32-bit CP15 registers accessible through MCR/MRC instructions 9867259Sgblack@eecs.umich.edu MiscRegIndex decodeCP15Reg(unsigned crn, unsigned opc1, 9877259Sgblack@eecs.umich.edu unsigned crm, unsigned opc2); 9887259Sgblack@eecs.umich.edu 98910037SARM gem5 Developers // Decodes 64-bit CP15 registers accessible through MCRR/MRRC instructions 99010037SARM gem5 Developers MiscRegIndex decodeCP15Reg64(unsigned crm, unsigned opc1); 99110037SARM gem5 Developers 9928868SMatt.Horsnell@arm.com 9939256SAndreas.Sandberg@arm.com const char * const miscRegName[] = { 99410037SARM gem5 Developers "cpsr", 99510037SARM gem5 Developers "spsr", 99610037SARM gem5 Developers "spsr_fiq", 99710037SARM gem5 Developers "spsr_irq", 99810037SARM gem5 Developers "spsr_svc", 99910037SARM gem5 Developers "spsr_mon", 100010037SARM gem5 Developers "spsr_abt", 100110037SARM gem5 Developers "spsr_hyp", 100210037SARM gem5 Developers "spsr_und", 100310037SARM gem5 Developers "elr_hyp", 100410037SARM gem5 Developers "fpsid", 100510037SARM gem5 Developers "fpscr", 100610037SARM gem5 Developers "mvfr1", 100710037SARM gem5 Developers "mvfr0", 100810037SARM gem5 Developers "fpexc", 100910037SARM gem5 Developers 101010037SARM gem5 Developers // Helper registers 101110037SARM gem5 Developers "cpsr_mode", 101210037SARM gem5 Developers "cpsr_q", 101310037SARM gem5 Developers "fpscr_exc", 101410037SARM gem5 Developers "fpscr_qc", 101510037SARM gem5 Developers "lockaddr", 101610037SARM gem5 Developers "lockflag", 101710037SARM gem5 Developers "prrr_mair0", 101810037SARM gem5 Developers "prrr_mair0_ns", 101910037SARM gem5 Developers "prrr_mair0_s", 102010037SARM gem5 Developers "nmrr_mair1", 102110037SARM gem5 Developers "nmrr_mair1_ns", 102210037SARM gem5 Developers "nmrr_mair1_s", 102310037SARM gem5 Developers "pmxevtyper_pmccfiltr", 102410037SARM gem5 Developers "sctlr_rst", 102510037SARM gem5 Developers "sev_mailbox", 102610037SARM gem5 Developers 102710037SARM gem5 Developers // AArch32 CP14 registers 102810037SARM gem5 Developers "dbgdidr", 102910037SARM gem5 Developers "dbgdscrint", 103010037SARM gem5 Developers "dbgdccint", 103110037SARM gem5 Developers "dbgdtrtxint", 103210037SARM gem5 Developers "dbgdtrrxint", 103310037SARM gem5 Developers "dbgwfar", 103410037SARM gem5 Developers "dbgvcr", 103510037SARM gem5 Developers "dbgdtrrxext", 103610037SARM gem5 Developers "dbgdscrext", 103710037SARM gem5 Developers "dbgdtrtxext", 103810037SARM gem5 Developers "dbgoseccr", 103910037SARM gem5 Developers "dbgbvr0", 104010037SARM gem5 Developers "dbgbvr1", 104110037SARM gem5 Developers "dbgbvr2", 104210037SARM gem5 Developers "dbgbvr3", 104310037SARM gem5 Developers "dbgbvr4", 104410037SARM gem5 Developers "dbgbvr5", 104510037SARM gem5 Developers "dbgbcr0", 104610037SARM gem5 Developers "dbgbcr1", 104710037SARM gem5 Developers "dbgbcr2", 104810037SARM gem5 Developers "dbgbcr3", 104910037SARM gem5 Developers "dbgbcr4", 105010037SARM gem5 Developers "dbgbcr5", 105110037SARM gem5 Developers "dbgwvr0", 105210037SARM gem5 Developers "dbgwvr1", 105310037SARM gem5 Developers "dbgwvr2", 105410037SARM gem5 Developers "dbgwvr3", 105510037SARM gem5 Developers "dbgwcr0", 105610037SARM gem5 Developers "dbgwcr1", 105710037SARM gem5 Developers "dbgwcr2", 105810037SARM gem5 Developers "dbgwcr3", 105910037SARM gem5 Developers "dbgdrar", 106010037SARM gem5 Developers "dbgbxvr4", 106110037SARM gem5 Developers "dbgbxvr5", 106210037SARM gem5 Developers "dbgoslar", 106310037SARM gem5 Developers "dbgoslsr", 106410037SARM gem5 Developers "dbgosdlr", 106510037SARM gem5 Developers "dbgprcr", 106610037SARM gem5 Developers "dbgdsar", 106710037SARM gem5 Developers "dbgclaimset", 106810037SARM gem5 Developers "dbgclaimclr", 106910037SARM gem5 Developers "dbgauthstatus", 107010037SARM gem5 Developers "dbgdevid2", 107110037SARM gem5 Developers "dbgdevid1", 107210037SARM gem5 Developers "dbgdevid0", 107310037SARM gem5 Developers "teecr", 107410037SARM gem5 Developers "jidr", 107510037SARM gem5 Developers "teehbr", 107610037SARM gem5 Developers "joscr", 107710037SARM gem5 Developers "jmcr", 107810037SARM gem5 Developers 107910037SARM gem5 Developers // AArch32 CP15 registers 108010037SARM gem5 Developers "midr", 108110037SARM gem5 Developers "ctr", 108210037SARM gem5 Developers "tcmtr", 108310037SARM gem5 Developers "tlbtr", 108410037SARM gem5 Developers "mpidr", 108510037SARM gem5 Developers "revidr", 108610037SARM gem5 Developers "id_pfr0", 108710037SARM gem5 Developers "id_pfr1", 108810037SARM gem5 Developers "id_dfr0", 108910037SARM gem5 Developers "id_afr0", 109010037SARM gem5 Developers "id_mmfr0", 109110037SARM gem5 Developers "id_mmfr1", 109210037SARM gem5 Developers "id_mmfr2", 109310037SARM gem5 Developers "id_mmfr3", 109410037SARM gem5 Developers "id_isar0", 109510037SARM gem5 Developers "id_isar1", 109610037SARM gem5 Developers "id_isar2", 109710037SARM gem5 Developers "id_isar3", 109810037SARM gem5 Developers "id_isar4", 109910037SARM gem5 Developers "id_isar5", 110010037SARM gem5 Developers "ccsidr", 110110037SARM gem5 Developers "clidr", 110210037SARM gem5 Developers "aidr", 110310037SARM gem5 Developers "csselr", 110410037SARM gem5 Developers "csselr_ns", 110510037SARM gem5 Developers "csselr_s", 110610037SARM gem5 Developers "vpidr", 110710037SARM gem5 Developers "vmpidr", 110810037SARM gem5 Developers "sctlr", 110910037SARM gem5 Developers "sctlr_ns", 111010037SARM gem5 Developers "sctlr_s", 111110037SARM gem5 Developers "actlr", 111210037SARM gem5 Developers "actlr_ns", 111310037SARM gem5 Developers "actlr_s", 111410037SARM gem5 Developers "cpacr", 111510037SARM gem5 Developers "scr", 111610037SARM gem5 Developers "sder", 111710037SARM gem5 Developers "nsacr", 111810037SARM gem5 Developers "hsctlr", 111910037SARM gem5 Developers "hactlr", 112010037SARM gem5 Developers "hcr", 112110037SARM gem5 Developers "hdcr", 112210037SARM gem5 Developers "hcptr", 112310037SARM gem5 Developers "hstr", 112410037SARM gem5 Developers "hacr", 112510037SARM gem5 Developers "ttbr0", 112610037SARM gem5 Developers "ttbr0_ns", 112710037SARM gem5 Developers "ttbr0_s", 112810037SARM gem5 Developers "ttbr1", 112910037SARM gem5 Developers "ttbr1_ns", 113010037SARM gem5 Developers "ttbr1_s", 113110037SARM gem5 Developers "ttbcr", 113210037SARM gem5 Developers "ttbcr_ns", 113310037SARM gem5 Developers "ttbcr_s", 113410037SARM gem5 Developers "htcr", 113510037SARM gem5 Developers "vtcr", 113610037SARM gem5 Developers "dacr", 113710037SARM gem5 Developers "dacr_ns", 113810037SARM gem5 Developers "dacr_s", 113910037SARM gem5 Developers "dfsr", 114010037SARM gem5 Developers "dfsr_ns", 114110037SARM gem5 Developers "dfsr_s", 114210037SARM gem5 Developers "ifsr", 114310037SARM gem5 Developers "ifsr_ns", 114410037SARM gem5 Developers "ifsr_s", 114510037SARM gem5 Developers "adfsr", 114610037SARM gem5 Developers "adfsr_ns", 114710037SARM gem5 Developers "adfsr_s", 114810037SARM gem5 Developers "aifsr", 114910037SARM gem5 Developers "aifsr_ns", 115010037SARM gem5 Developers "aifsr_s", 115110037SARM gem5 Developers "hadfsr", 115210037SARM gem5 Developers "haifsr", 115310037SARM gem5 Developers "hsr", 115410037SARM gem5 Developers "dfar", 115510037SARM gem5 Developers "dfar_ns", 115610037SARM gem5 Developers "dfar_s", 115710037SARM gem5 Developers "ifar", 115810037SARM gem5 Developers "ifar_ns", 115910037SARM gem5 Developers "ifar_s", 116010037SARM gem5 Developers "hdfar", 116110037SARM gem5 Developers "hifar", 116210037SARM gem5 Developers "hpfar", 116310037SARM gem5 Developers "icialluis", 116410037SARM gem5 Developers "bpiallis", 116510037SARM gem5 Developers "par", 116610037SARM gem5 Developers "par_ns", 116710037SARM gem5 Developers "par_s", 116810037SARM gem5 Developers "iciallu", 116910037SARM gem5 Developers "icimvau", 117010037SARM gem5 Developers "cp15isb", 117110037SARM gem5 Developers "bpiall", 117210037SARM gem5 Developers "bpimva", 117310037SARM gem5 Developers "dcimvac", 117410037SARM gem5 Developers "dcisw", 117510037SARM gem5 Developers "ats1cpr", 117610037SARM gem5 Developers "ats1cpw", 117710037SARM gem5 Developers "ats1cur", 117810037SARM gem5 Developers "ats1cuw", 117910037SARM gem5 Developers "ats12nsopr", 118010037SARM gem5 Developers "ats12nsopw", 118110037SARM gem5 Developers "ats12nsour", 118210037SARM gem5 Developers "ats12nsouw", 118310037SARM gem5 Developers "dccmvac", 118410037SARM gem5 Developers "dccsw", 118510037SARM gem5 Developers "cp15dsb", 118610037SARM gem5 Developers "cp15dmb", 118710037SARM gem5 Developers "dccmvau", 118810037SARM gem5 Developers "dccimvac", 118910037SARM gem5 Developers "dccisw", 119010037SARM gem5 Developers "ats1hr", 119110037SARM gem5 Developers "ats1hw", 119210037SARM gem5 Developers "tlbiallis", 119310037SARM gem5 Developers "tlbimvais", 119410037SARM gem5 Developers "tlbiasidis", 119510037SARM gem5 Developers "tlbimvaais", 119610037SARM gem5 Developers "tlbimvalis", 119710037SARM gem5 Developers "tlbimvaalis", 119810037SARM gem5 Developers "itlbiall", 119910037SARM gem5 Developers "itlbimva", 120010037SARM gem5 Developers "itlbiasid", 120110037SARM gem5 Developers "dtlbiall", 120210037SARM gem5 Developers "dtlbimva", 120310037SARM gem5 Developers "dtlbiasid", 120410037SARM gem5 Developers "tlbiall", 120510037SARM gem5 Developers "tlbimva", 120610037SARM gem5 Developers "tlbiasid", 120710037SARM gem5 Developers "tlbimvaa", 120810037SARM gem5 Developers "tlbimval", 120910037SARM gem5 Developers "tlbimvaal", 121010037SARM gem5 Developers "tlbiipas2is", 121110037SARM gem5 Developers "tlbiipas2lis", 121210037SARM gem5 Developers "tlbiallhis", 121310037SARM gem5 Developers "tlbimvahis", 121410037SARM gem5 Developers "tlbiallnsnhis", 121510037SARM gem5 Developers "tlbimvalhis", 121610037SARM gem5 Developers "tlbiipas2", 121710037SARM gem5 Developers "tlbiipas2l", 121810037SARM gem5 Developers "tlbiallh", 121910037SARM gem5 Developers "tlbimvah", 122010037SARM gem5 Developers "tlbiallnsnh", 122110037SARM gem5 Developers "tlbimvalh", 122210037SARM gem5 Developers "pmcr", 122310037SARM gem5 Developers "pmcntenset", 122410037SARM gem5 Developers "pmcntenclr", 122510037SARM gem5 Developers "pmovsr", 122610037SARM gem5 Developers "pmswinc", 122710037SARM gem5 Developers "pmselr", 122810037SARM gem5 Developers "pmceid0", 122910037SARM gem5 Developers "pmceid1", 123010037SARM gem5 Developers "pmccntr", 123110037SARM gem5 Developers "pmxevtyper", 123210037SARM gem5 Developers "pmccfiltr", 123310037SARM gem5 Developers "pmxevcntr", 123410037SARM gem5 Developers "pmuserenr", 123510037SARM gem5 Developers "pmintenset", 123610037SARM gem5 Developers "pmintenclr", 123710037SARM gem5 Developers "pmovsset", 12388549Sdaniel.johnson@arm.com "l2ctlr", 123910037SARM gem5 Developers "l2ectlr", 124010037SARM gem5 Developers "prrr", 124110037SARM gem5 Developers "prrr_ns", 124210037SARM gem5 Developers "prrr_s", 124310037SARM gem5 Developers "mair0", 124410037SARM gem5 Developers "mair0_ns", 124510037SARM gem5 Developers "mair0_s", 124610037SARM gem5 Developers "nmrr", 124710037SARM gem5 Developers "nmrr_ns", 124810037SARM gem5 Developers "nmrr_s", 124910037SARM gem5 Developers "mair1", 125010037SARM gem5 Developers "mair1_ns", 125110037SARM gem5 Developers "mair1_s", 125210037SARM gem5 Developers "amair0", 125310037SARM gem5 Developers "amair0_ns", 125410037SARM gem5 Developers "amair0_s", 125510037SARM gem5 Developers "amair1", 125610037SARM gem5 Developers "amair1_ns", 125710037SARM gem5 Developers "amair1_s", 125810037SARM gem5 Developers "hmair0", 125910037SARM gem5 Developers "hmair1", 126010037SARM gem5 Developers "hamair0", 126110037SARM gem5 Developers "hamair1", 126210037SARM gem5 Developers "vbar", 126310037SARM gem5 Developers "vbar_ns", 126410037SARM gem5 Developers "vbar_s", 126510037SARM gem5 Developers "mvbar", 126610037SARM gem5 Developers "rmr", 126710037SARM gem5 Developers "isr", 126810037SARM gem5 Developers "hvbar", 126910037SARM gem5 Developers "fcseidr", 127010037SARM gem5 Developers "contextidr", 127110037SARM gem5 Developers "contextidr_ns", 127210037SARM gem5 Developers "contextidr_s", 127310037SARM gem5 Developers "tpidrurw", 127410037SARM gem5 Developers "tpidrurw_ns", 127510037SARM gem5 Developers "tpidrurw_s", 127610037SARM gem5 Developers "tpidruro", 127710037SARM gem5 Developers "tpidruro_ns", 127810037SARM gem5 Developers "tpidruro_s", 127910037SARM gem5 Developers "tpidrprw", 128010037SARM gem5 Developers "tpidrprw_ns", 128110037SARM gem5 Developers "tpidrprw_s", 128210037SARM gem5 Developers "htpidr", 128310037SARM gem5 Developers "cntfrq", 128410037SARM gem5 Developers "cntkctl", 128510037SARM gem5 Developers "cntp_tval", 128610037SARM gem5 Developers "cntp_tval_ns", 128710037SARM gem5 Developers "cntp_tval_s", 128810037SARM gem5 Developers "cntp_ctl", 128910037SARM gem5 Developers "cntp_ctl_ns", 129010037SARM gem5 Developers "cntp_ctl_s", 129110037SARM gem5 Developers "cntv_tval", 129210037SARM gem5 Developers "cntv_ctl", 129310037SARM gem5 Developers "cnthctl", 129410037SARM gem5 Developers "cnthp_tval", 129510037SARM gem5 Developers "cnthp_ctl", 129610037SARM gem5 Developers "il1data0", 129710037SARM gem5 Developers "il1data1", 129810037SARM gem5 Developers "il1data2", 129910037SARM gem5 Developers "il1data3", 130010037SARM gem5 Developers "dl1data0", 130110037SARM gem5 Developers "dl1data1", 130210037SARM gem5 Developers "dl1data2", 130310037SARM gem5 Developers "dl1data3", 130410037SARM gem5 Developers "dl1data4", 130510037SARM gem5 Developers "ramindex", 130610037SARM gem5 Developers "l2actlr", 130710037SARM gem5 Developers "cbar", 130810037SARM gem5 Developers "httbr", 130910037SARM gem5 Developers "vttbr", 131010037SARM gem5 Developers "cntpct", 131110037SARM gem5 Developers "cntvct", 131210037SARM gem5 Developers "cntp_cval", 131310037SARM gem5 Developers "cntp_cval_ns", 131410037SARM gem5 Developers "cntp_cval_s", 131510037SARM gem5 Developers "cntv_cval", 131610037SARM gem5 Developers "cntvoff", 131710037SARM gem5 Developers "cnthp_cval", 131810037SARM gem5 Developers "cpumerrsr", 131910037SARM gem5 Developers "l2merrsr", 132010037SARM gem5 Developers 132110037SARM gem5 Developers // AArch64 registers (Op0=2) 132210037SARM gem5 Developers "mdccint_el1", 132310037SARM gem5 Developers "osdtrrx_el1", 132410037SARM gem5 Developers "mdscr_el1", 132510037SARM gem5 Developers "osdtrtx_el1", 132610037SARM gem5 Developers "oseccr_el1", 132710037SARM gem5 Developers "dbgbvr0_el1", 132810037SARM gem5 Developers "dbgbvr1_el1", 132910037SARM gem5 Developers "dbgbvr2_el1", 133010037SARM gem5 Developers "dbgbvr3_el1", 133110037SARM gem5 Developers "dbgbvr4_el1", 133210037SARM gem5 Developers "dbgbvr5_el1", 133310037SARM gem5 Developers "dbgbcr0_el1", 133410037SARM gem5 Developers "dbgbcr1_el1", 133510037SARM gem5 Developers "dbgbcr2_el1", 133610037SARM gem5 Developers "dbgbcr3_el1", 133710037SARM gem5 Developers "dbgbcr4_el1", 133810037SARM gem5 Developers "dbgbcr5_el1", 133910037SARM gem5 Developers "dbgwvr0_el1", 134010037SARM gem5 Developers "dbgwvr1_el1", 134110037SARM gem5 Developers "dbgwvr2_el1", 134210037SARM gem5 Developers "dbgwvr3_el1", 134310037SARM gem5 Developers "dbgwcr0_el1", 134410037SARM gem5 Developers "dbgwcr1_el1", 134510037SARM gem5 Developers "dbgwcr2_el1", 134610037SARM gem5 Developers "dbgwcr3_el1", 134710037SARM gem5 Developers "mdccsr_el0", 134810037SARM gem5 Developers "mddtr_el0", 134910037SARM gem5 Developers "mddtrtx_el0", 135010037SARM gem5 Developers "mddtrrx_el0", 135110037SARM gem5 Developers "dbgvcr32_el2", 135210037SARM gem5 Developers "mdrar_el1", 135310037SARM gem5 Developers "oslar_el1", 135410037SARM gem5 Developers "oslsr_el1", 135510037SARM gem5 Developers "osdlr_el1", 135610037SARM gem5 Developers "dbgprcr_el1", 135710037SARM gem5 Developers "dbgclaimset_el1", 135810037SARM gem5 Developers "dbgclaimclr_el1", 135910037SARM gem5 Developers "dbgauthstatus_el1", 136010037SARM gem5 Developers "teecr32_el1", 136110037SARM gem5 Developers "teehbr32_el1", 136210037SARM gem5 Developers 136310037SARM gem5 Developers // AArch64 registers (Op0=1,3) 136410037SARM gem5 Developers "midr_el1", 136510037SARM gem5 Developers "mpidr_el1", 136610037SARM gem5 Developers "revidr_el1", 136710037SARM gem5 Developers "id_pfr0_el1", 136810037SARM gem5 Developers "id_pfr1_el1", 136910037SARM gem5 Developers "id_dfr0_el1", 137010037SARM gem5 Developers "id_afr0_el1", 137110037SARM gem5 Developers "id_mmfr0_el1", 137210037SARM gem5 Developers "id_mmfr1_el1", 137310037SARM gem5 Developers "id_mmfr2_el1", 137410037SARM gem5 Developers "id_mmfr3_el1", 137510037SARM gem5 Developers "id_isar0_el1", 137610037SARM gem5 Developers "id_isar1_el1", 137710037SARM gem5 Developers "id_isar2_el1", 137810037SARM gem5 Developers "id_isar3_el1", 137910037SARM gem5 Developers "id_isar4_el1", 138010037SARM gem5 Developers "id_isar5_el1", 138110037SARM gem5 Developers "mvfr0_el1", 138210037SARM gem5 Developers "mvfr1_el1", 138310037SARM gem5 Developers "mvfr2_el1", 138410037SARM gem5 Developers "id_aa64pfr0_el1", 138510037SARM gem5 Developers "id_aa64pfr1_el1", 138610037SARM gem5 Developers "id_aa64dfr0_el1", 138710037SARM gem5 Developers "id_aa64dfr1_el1", 138810037SARM gem5 Developers "id_aa64afr0_el1", 138910037SARM gem5 Developers "id_aa64afr1_el1", 139010037SARM gem5 Developers "id_aa64isar0_el1", 139110037SARM gem5 Developers "id_aa64isar1_el1", 139210037SARM gem5 Developers "id_aa64mmfr0_el1", 139310037SARM gem5 Developers "id_aa64mmfr1_el1", 139410037SARM gem5 Developers "ccsidr_el1", 139510037SARM gem5 Developers "clidr_el1", 139610037SARM gem5 Developers "aidr_el1", 139710037SARM gem5 Developers "csselr_el1", 139810037SARM gem5 Developers "ctr_el0", 139910037SARM gem5 Developers "dczid_el0", 140010037SARM gem5 Developers "vpidr_el2", 140110037SARM gem5 Developers "vmpidr_el2", 140210037SARM gem5 Developers "sctlr_el1", 140310037SARM gem5 Developers "actlr_el1", 140410037SARM gem5 Developers "cpacr_el1", 140510037SARM gem5 Developers "sctlr_el2", 140610037SARM gem5 Developers "actlr_el2", 140710037SARM gem5 Developers "hcr_el2", 140810037SARM gem5 Developers "mdcr_el2", 140910037SARM gem5 Developers "cptr_el2", 141010037SARM gem5 Developers "hstr_el2", 141110037SARM gem5 Developers "hacr_el2", 141210037SARM gem5 Developers "sctlr_el3", 141310037SARM gem5 Developers "actlr_el3", 141410037SARM gem5 Developers "scr_el3", 141510037SARM gem5 Developers "sder32_el3", 141610037SARM gem5 Developers "cptr_el3", 141710037SARM gem5 Developers "mdcr_el3", 141810037SARM gem5 Developers "ttbr0_el1", 141910037SARM gem5 Developers "ttbr1_el1", 142010037SARM gem5 Developers "tcr_el1", 142110037SARM gem5 Developers "ttbr0_el2", 142210037SARM gem5 Developers "tcr_el2", 142310037SARM gem5 Developers "vttbr_el2", 142410037SARM gem5 Developers "vtcr_el2", 142510037SARM gem5 Developers "ttbr0_el3", 142610037SARM gem5 Developers "tcr_el3", 142710037SARM gem5 Developers "dacr32_el2", 142810037SARM gem5 Developers "spsr_el1", 142910037SARM gem5 Developers "elr_el1", 143010037SARM gem5 Developers "sp_el0", 143110037SARM gem5 Developers "spsel", 143210037SARM gem5 Developers "currentel", 143310037SARM gem5 Developers "nzcv", 143410037SARM gem5 Developers "daif", 143510037SARM gem5 Developers "fpcr", 143610037SARM gem5 Developers "fpsr", 143710037SARM gem5 Developers "dspsr_el0", 143810037SARM gem5 Developers "dlr_el0", 143910037SARM gem5 Developers "spsr_el2", 144010037SARM gem5 Developers "elr_el2", 144110037SARM gem5 Developers "sp_el1", 144210037SARM gem5 Developers "spsr_irq_aa64", 144310037SARM gem5 Developers "spsr_abt_aa64", 144410037SARM gem5 Developers "spsr_und_aa64", 144510037SARM gem5 Developers "spsr_fiq_aa64", 144610037SARM gem5 Developers "spsr_el3", 144710037SARM gem5 Developers "elr_el3", 144810037SARM gem5 Developers "sp_el2", 144910037SARM gem5 Developers "afsr0_el1", 145010037SARM gem5 Developers "afsr1_el1", 145110037SARM gem5 Developers "esr_el1", 145210037SARM gem5 Developers "ifsr32_el2", 145310037SARM gem5 Developers "afsr0_el2", 145410037SARM gem5 Developers "afsr1_el2", 145510037SARM gem5 Developers "esr_el2", 145610037SARM gem5 Developers "fpexc32_el2", 145710037SARM gem5 Developers "afsr0_el3", 145810037SARM gem5 Developers "afsr1_el3", 145910037SARM gem5 Developers "esr_el3", 146010037SARM gem5 Developers "far_el1", 146110037SARM gem5 Developers "far_el2", 146210037SARM gem5 Developers "hpfar_el2", 146310037SARM gem5 Developers "far_el3", 146410037SARM gem5 Developers "ic_ialluis", 146510037SARM gem5 Developers "par_el1", 146610037SARM gem5 Developers "ic_iallu", 146710037SARM gem5 Developers "dc_ivac_xt", 146810037SARM gem5 Developers "dc_isw_xt", 146910037SARM gem5 Developers "at_s1e1r_xt", 147010037SARM gem5 Developers "at_s1e1w_xt", 147110037SARM gem5 Developers "at_s1e0r_xt", 147210037SARM gem5 Developers "at_s1e0w_xt", 147310037SARM gem5 Developers "dc_csw_xt", 147410037SARM gem5 Developers "dc_cisw_xt", 147510037SARM gem5 Developers "dc_zva_xt", 147610037SARM gem5 Developers "ic_ivau_xt", 147710037SARM gem5 Developers "dc_cvac_xt", 147810037SARM gem5 Developers "dc_cvau_xt", 147910037SARM gem5 Developers "dc_civac_xt", 148010037SARM gem5 Developers "at_s1e2r_xt", 148110037SARM gem5 Developers "at_s1e2w_xt", 148210037SARM gem5 Developers "at_s12e1r_xt", 148310037SARM gem5 Developers "at_s12e1w_xt", 148410037SARM gem5 Developers "at_s12e0r_xt", 148510037SARM gem5 Developers "at_s12e0w_xt", 148610037SARM gem5 Developers "at_s1e3r_xt", 148710037SARM gem5 Developers "at_s1e3w_xt", 148810037SARM gem5 Developers "tlbi_vmalle1is", 148910037SARM gem5 Developers "tlbi_vae1is_xt", 149010037SARM gem5 Developers "tlbi_aside1is_xt", 149110037SARM gem5 Developers "tlbi_vaae1is_xt", 149210037SARM gem5 Developers "tlbi_vale1is_xt", 149310037SARM gem5 Developers "tlbi_vaale1is_xt", 149410037SARM gem5 Developers "tlbi_vmalle1", 149510037SARM gem5 Developers "tlbi_vae1_xt", 149610037SARM gem5 Developers "tlbi_aside1_xt", 149710037SARM gem5 Developers "tlbi_vaae1_xt", 149810037SARM gem5 Developers "tlbi_vale1_xt", 149910037SARM gem5 Developers "tlbi_vaale1_xt", 150010037SARM gem5 Developers "tlbi_ipas2e1is_xt", 150110037SARM gem5 Developers "tlbi_ipas2le1is_xt", 150210037SARM gem5 Developers "tlbi_alle2is", 150310037SARM gem5 Developers "tlbi_vae2is_xt", 150410037SARM gem5 Developers "tlbi_alle1is", 150510037SARM gem5 Developers "tlbi_vale2is_xt", 150610037SARM gem5 Developers "tlbi_vmalls12e1is", 150710037SARM gem5 Developers "tlbi_ipas2e1_xt", 150810037SARM gem5 Developers "tlbi_ipas2le1_xt", 150910037SARM gem5 Developers "tlbi_alle2", 151010037SARM gem5 Developers "tlbi_vae2_xt", 151110037SARM gem5 Developers "tlbi_alle1", 151210037SARM gem5 Developers "tlbi_vale2_xt", 151310037SARM gem5 Developers "tlbi_vmalls12e1", 151410037SARM gem5 Developers "tlbi_alle3is", 151510037SARM gem5 Developers "tlbi_vae3is_xt", 151610037SARM gem5 Developers "tlbi_vale3is_xt", 151710037SARM gem5 Developers "tlbi_alle3", 151810037SARM gem5 Developers "tlbi_vae3_xt", 151910037SARM gem5 Developers "tlbi_vale3_xt", 152010037SARM gem5 Developers "pmintenset_el1", 152110037SARM gem5 Developers "pmintenclr_el1", 152210037SARM gem5 Developers "pmcr_el0", 152310037SARM gem5 Developers "pmcntenset_el0", 152410037SARM gem5 Developers "pmcntenclr_el0", 152510037SARM gem5 Developers "pmovsclr_el0", 152610037SARM gem5 Developers "pmswinc_el0", 152710037SARM gem5 Developers "pmselr_el0", 152810037SARM gem5 Developers "pmceid0_el0", 152910037SARM gem5 Developers "pmceid1_el0", 153010037SARM gem5 Developers "pmccntr_el0", 153110037SARM gem5 Developers "pmxevtyper_el0", 153210037SARM gem5 Developers "pmccfiltr_el0", 153310037SARM gem5 Developers "pmxevcntr_el0", 153410037SARM gem5 Developers "pmuserenr_el0", 153510037SARM gem5 Developers "pmovsset_el0", 153610037SARM gem5 Developers "mair_el1", 153710037SARM gem5 Developers "amair_el1", 153810037SARM gem5 Developers "mair_el2", 153910037SARM gem5 Developers "amair_el2", 154010037SARM gem5 Developers "mair_el3", 154110037SARM gem5 Developers "amair_el3", 154210037SARM gem5 Developers "l2ctlr_el1", 154310037SARM gem5 Developers "l2ectlr_el1", 154410037SARM gem5 Developers "vbar_el1", 154510037SARM gem5 Developers "rvbar_el1", 154610037SARM gem5 Developers "isr_el1", 154710037SARM gem5 Developers "vbar_el2", 154810037SARM gem5 Developers "rvbar_el2", 154910037SARM gem5 Developers "vbar_el3", 155010037SARM gem5 Developers "rvbar_el3", 155110037SARM gem5 Developers "rmr_el3", 155210037SARM gem5 Developers "contextidr_el1", 155310037SARM gem5 Developers "tpidr_el1", 155410037SARM gem5 Developers "tpidr_el0", 155510037SARM gem5 Developers "tpidrro_el0", 155610037SARM gem5 Developers "tpidr_el2", 155710037SARM gem5 Developers "tpidr_el3", 155810037SARM gem5 Developers "cntkctl_el1", 155910037SARM gem5 Developers "cntfrq_el0", 156010037SARM gem5 Developers "cntpct_el0", 156110037SARM gem5 Developers "cntvct_el0", 156210037SARM gem5 Developers "cntp_tval_el0", 156310037SARM gem5 Developers "cntp_ctl_el0", 156410037SARM gem5 Developers "cntp_cval_el0", 156510037SARM gem5 Developers "cntv_tval_el0", 156610037SARM gem5 Developers "cntv_ctl_el0", 156710037SARM gem5 Developers "cntv_cval_el0", 156810037SARM gem5 Developers "pmevcntr0_el0", 156910037SARM gem5 Developers "pmevcntr1_el0", 157010037SARM gem5 Developers "pmevcntr2_el0", 157110037SARM gem5 Developers "pmevcntr3_el0", 157210037SARM gem5 Developers "pmevcntr4_el0", 157310037SARM gem5 Developers "pmevcntr5_el0", 157410037SARM gem5 Developers "pmevtyper0_el0", 157510037SARM gem5 Developers "pmevtyper1_el0", 157610037SARM gem5 Developers "pmevtyper2_el0", 157710037SARM gem5 Developers "pmevtyper3_el0", 157810037SARM gem5 Developers "pmevtyper4_el0", 157910037SARM gem5 Developers "pmevtyper5_el0", 158010037SARM gem5 Developers "cntvoff_el2", 158110037SARM gem5 Developers "cnthctl_el2", 158210037SARM gem5 Developers "cnthp_tval_el2", 158310037SARM gem5 Developers "cnthp_ctl_el2", 158410037SARM gem5 Developers "cnthp_cval_el2", 158510037SARM gem5 Developers "cntps_tval_el1", 158610037SARM gem5 Developers "cntps_ctl_el1", 158710037SARM gem5 Developers "cntps_cval_el1", 158810037SARM gem5 Developers "il1data0_el1", 158910037SARM gem5 Developers "il1data1_el1", 159010037SARM gem5 Developers "il1data2_el1", 159110037SARM gem5 Developers "il1data3_el1", 159210037SARM gem5 Developers "dl1data0_el1", 159310037SARM gem5 Developers "dl1data1_el1", 159410037SARM gem5 Developers "dl1data2_el1", 159510037SARM gem5 Developers "dl1data3_el1", 159610037SARM gem5 Developers "dl1data4_el1", 159710037SARM gem5 Developers "l2actlr_el1", 159810037SARM gem5 Developers "cpuactlr_el1", 159910037SARM gem5 Developers "cpuectlr_el1", 160010037SARM gem5 Developers "cpumerrsr_el1", 160110037SARM gem5 Developers "l2merrsr_el1", 160210037SARM gem5 Developers "cbar_el1", 160310856SCurtis.Dunham@arm.com "contextidr_el2", 160410037SARM gem5 Developers 160512675Sgiacomo.travaglini@arm.com "ttbr1_el2", 160612816Sgiacomo.travaglini@arm.com "cnthv_ctl_el2", 160712816Sgiacomo.travaglini@arm.com "cnthv_cval_el2", 160812816Sgiacomo.travaglini@arm.com "cnthv_tval_el2", 160913116Sgiacomo.travaglini@arm.com "id_aa64mmfr2_el1", 161013531Sjairo.balart@metempsy.com 161113531Sjairo.balart@metempsy.com // GICv3, CPU interface 161213531Sjairo.balart@metempsy.com "icc_pmr_el1", 161313531Sjairo.balart@metempsy.com "icc_iar0_el1", 161413531Sjairo.balart@metempsy.com "icc_eoir0_el1", 161513531Sjairo.balart@metempsy.com "icc_hppir0_el1", 161613531Sjairo.balart@metempsy.com "icc_bpr0_el1", 161713531Sjairo.balart@metempsy.com "icc_ap0r0_el1", 161813531Sjairo.balart@metempsy.com "icc_ap0r1_el1", 161913531Sjairo.balart@metempsy.com "icc_ap0r2_el1", 162013531Sjairo.balart@metempsy.com "icc_ap0r3_el1", 162113531Sjairo.balart@metempsy.com "icc_ap1r0_el1", 162213531Sjairo.balart@metempsy.com "icc_ap1r0_el1_ns", 162313531Sjairo.balart@metempsy.com "icc_ap1r0_el1_s", 162413531Sjairo.balart@metempsy.com "icc_ap1r1_el1", 162513531Sjairo.balart@metempsy.com "icc_ap1r1_el1_ns", 162613531Sjairo.balart@metempsy.com "icc_ap1r1_el1_s", 162713531Sjairo.balart@metempsy.com "icc_ap1r2_el1", 162813531Sjairo.balart@metempsy.com "icc_ap1r2_el1_ns", 162913531Sjairo.balart@metempsy.com "icc_ap1r2_el1_s", 163013531Sjairo.balart@metempsy.com "icc_ap1r3_el1", 163113531Sjairo.balart@metempsy.com "icc_ap1r3_el1_ns", 163213531Sjairo.balart@metempsy.com "icc_ap1r3_el1_s", 163313531Sjairo.balart@metempsy.com "icc_dir_el1", 163413531Sjairo.balart@metempsy.com "icc_rpr_el1", 163513531Sjairo.balart@metempsy.com "icc_sgi1r_el1", 163613531Sjairo.balart@metempsy.com "icc_asgi1r_el1", 163713531Sjairo.balart@metempsy.com "icc_sgi0r_el1", 163813531Sjairo.balart@metempsy.com "icc_iar1_el1", 163913531Sjairo.balart@metempsy.com "icc_eoir1_el1", 164013531Sjairo.balart@metempsy.com "icc_hppir1_el1", 164113531Sjairo.balart@metempsy.com "icc_bpr1_el1", 164213531Sjairo.balart@metempsy.com "icc_bpr1_el1_ns", 164313531Sjairo.balart@metempsy.com "icc_bpr1_el1_s", 164413531Sjairo.balart@metempsy.com "icc_ctlr_el1", 164513531Sjairo.balart@metempsy.com "icc_ctlr_el1_ns", 164613531Sjairo.balart@metempsy.com "icc_ctlr_el1_s", 164713531Sjairo.balart@metempsy.com "icc_sre_el1", 164813531Sjairo.balart@metempsy.com "icc_sre_el1_ns", 164913531Sjairo.balart@metempsy.com "icc_sre_el1_s", 165013531Sjairo.balart@metempsy.com "icc_igrpen0_el1", 165113531Sjairo.balart@metempsy.com "icc_igrpen1_el1", 165213531Sjairo.balart@metempsy.com "icc_igrpen1_el1_ns", 165313531Sjairo.balart@metempsy.com "icc_igrpen1_el1_s", 165413531Sjairo.balart@metempsy.com "icc_sre_el2", 165513531Sjairo.balart@metempsy.com "icc_ctlr_el3", 165613531Sjairo.balart@metempsy.com "icc_sre_el3", 165713531Sjairo.balart@metempsy.com "icc_igrpen1_el3", 165813531Sjairo.balart@metempsy.com 165913531Sjairo.balart@metempsy.com // GICv3, CPU interface, virtualization 166013531Sjairo.balart@metempsy.com "ich_ap0r0_el2", 166113531Sjairo.balart@metempsy.com "ich_ap0r1_el2", 166213531Sjairo.balart@metempsy.com "ich_ap0r2_el2", 166313531Sjairo.balart@metempsy.com "ich_ap0r3_el2", 166413531Sjairo.balart@metempsy.com "ich_ap1r0_el2", 166513531Sjairo.balart@metempsy.com "ich_ap1r1_el2", 166613531Sjairo.balart@metempsy.com "ich_ap1r2_el2", 166713531Sjairo.balart@metempsy.com "ich_ap1r3_el2", 166813531Sjairo.balart@metempsy.com "ich_hcr_el2", 166913531Sjairo.balart@metempsy.com "ich_vtr_el2", 167013531Sjairo.balart@metempsy.com "ich_misr_el2", 167113531Sjairo.balart@metempsy.com "ich_eisr_el2", 167213531Sjairo.balart@metempsy.com "ich_elrsr_el2", 167313531Sjairo.balart@metempsy.com "ich_vmcr_el2", 167413531Sjairo.balart@metempsy.com "ich_lr0_el2", 167513531Sjairo.balart@metempsy.com "ich_lr1_el2", 167613531Sjairo.balart@metempsy.com "ich_lr2_el2", 167713531Sjairo.balart@metempsy.com "ich_lr3_el2", 167813531Sjairo.balart@metempsy.com "ich_lr4_el2", 167913531Sjairo.balart@metempsy.com "ich_lr5_el2", 168013531Sjairo.balart@metempsy.com "ich_lr6_el2", 168113531Sjairo.balart@metempsy.com "ich_lr7_el2", 168213531Sjairo.balart@metempsy.com "ich_lr8_el2", 168313531Sjairo.balart@metempsy.com "ich_lr9_el2", 168413531Sjairo.balart@metempsy.com "ich_lr10_el2", 168513531Sjairo.balart@metempsy.com "ich_lr11_el2", 168613531Sjairo.balart@metempsy.com "ich_lr12_el2", 168713531Sjairo.balart@metempsy.com "ich_lr13_el2", 168813531Sjairo.balart@metempsy.com "ich_lr14_el2", 168913531Sjairo.balart@metempsy.com "ich_lr15_el2", 169013531Sjairo.balart@metempsy.com 169113531Sjairo.balart@metempsy.com "icv_pmr_el1", 169213531Sjairo.balart@metempsy.com "icv_iar0_el1", 169313531Sjairo.balart@metempsy.com "icv_eoir0_el1", 169413531Sjairo.balart@metempsy.com "icv_hppir0_el1", 169513531Sjairo.balart@metempsy.com "icv_bpr0_el1", 169613531Sjairo.balart@metempsy.com "icv_ap0r0_el1", 169713531Sjairo.balart@metempsy.com "icv_ap0r1_el1", 169813531Sjairo.balart@metempsy.com "icv_ap0r2_el1", 169913531Sjairo.balart@metempsy.com "icv_ap0r3_el1", 170013531Sjairo.balart@metempsy.com "icv_ap1r0_el1", 170113531Sjairo.balart@metempsy.com "icv_ap1r0_el1_ns", 170213531Sjairo.balart@metempsy.com "icv_ap1r0_el1_s", 170313531Sjairo.balart@metempsy.com "icv_ap1r1_el1", 170413531Sjairo.balart@metempsy.com "icv_ap1r1_el1_ns", 170513531Sjairo.balart@metempsy.com "icv_ap1r1_el1_s", 170613531Sjairo.balart@metempsy.com "icv_ap1r2_el1", 170713531Sjairo.balart@metempsy.com "icv_ap1r2_el1_ns", 170813531Sjairo.balart@metempsy.com "icv_ap1r2_el1_s", 170913531Sjairo.balart@metempsy.com "icv_ap1r3_el1", 171013531Sjairo.balart@metempsy.com "icv_ap1r3_el1_ns", 171113531Sjairo.balart@metempsy.com "icv_ap1r3_el1_s", 171213531Sjairo.balart@metempsy.com "icv_dir_el1", 171313531Sjairo.balart@metempsy.com "icv_rpr_el1", 171413531Sjairo.balart@metempsy.com "icv_sgi1r_el1", 171513531Sjairo.balart@metempsy.com "icv_asgi1r_el1", 171613531Sjairo.balart@metempsy.com "icv_sgi0r_el1", 171713531Sjairo.balart@metempsy.com "icv_iar1_el1", 171813531Sjairo.balart@metempsy.com "icv_eoir1_el1", 171913531Sjairo.balart@metempsy.com "icv_hppir1_el1", 172013531Sjairo.balart@metempsy.com "icv_bpr1_el1", 172113531Sjairo.balart@metempsy.com "icv_bpr1_el1_ns", 172213531Sjairo.balart@metempsy.com "icv_bpr1_el1_s", 172313531Sjairo.balart@metempsy.com "icv_ctlr_el1", 172413531Sjairo.balart@metempsy.com "icv_ctlr_el1_ns", 172513531Sjairo.balart@metempsy.com "icv_ctlr_el1_s", 172613531Sjairo.balart@metempsy.com "icv_sre_el1", 172713531Sjairo.balart@metempsy.com "icv_sre_el1_ns", 172813531Sjairo.balart@metempsy.com "icv_sre_el1_s", 172913531Sjairo.balart@metempsy.com "icv_igrpen0_el1", 173013531Sjairo.balart@metempsy.com "icv_igrpen1_el1", 173113531Sjairo.balart@metempsy.com "icv_igrpen1_el1_ns", 173213531Sjairo.balart@metempsy.com "icv_igrpen1_el1_s", 173313531Sjairo.balart@metempsy.com 173413531Sjairo.balart@metempsy.com "icc_ap0r0", 173513531Sjairo.balart@metempsy.com "icc_ap0r1", 173613531Sjairo.balart@metempsy.com "icc_ap0r2", 173713531Sjairo.balart@metempsy.com "icc_ap0r3", 173813531Sjairo.balart@metempsy.com "icc_ap1r0", 173913531Sjairo.balart@metempsy.com "icc_ap1r0_ns", 174013531Sjairo.balart@metempsy.com "icc_ap1r0_s", 174113531Sjairo.balart@metempsy.com "icc_ap1r1", 174213531Sjairo.balart@metempsy.com "icc_ap1r1_ns", 174313531Sjairo.balart@metempsy.com "icc_ap1r1_s", 174413531Sjairo.balart@metempsy.com "icc_ap1r2", 174513531Sjairo.balart@metempsy.com "icc_ap1r2_ns", 174613531Sjairo.balart@metempsy.com "icc_ap1r2_s", 174713531Sjairo.balart@metempsy.com "icc_ap1r3", 174813531Sjairo.balart@metempsy.com "icc_ap1r3_ns", 174913531Sjairo.balart@metempsy.com "icc_ap1r3_s", 175013531Sjairo.balart@metempsy.com "icc_asgi1r", 175113531Sjairo.balart@metempsy.com "icc_bpr0", 175213531Sjairo.balart@metempsy.com "icc_bpr1", 175313531Sjairo.balart@metempsy.com "icc_bpr1_ns", 175413531Sjairo.balart@metempsy.com "icc_bpr1_s", 175513531Sjairo.balart@metempsy.com "icc_ctlr", 175613531Sjairo.balart@metempsy.com "icc_ctlr_ns", 175713531Sjairo.balart@metempsy.com "icc_ctlr_s", 175813531Sjairo.balart@metempsy.com "icc_dir", 175913531Sjairo.balart@metempsy.com "icc_eoir0", 176013531Sjairo.balart@metempsy.com "icc_eoir1", 176113531Sjairo.balart@metempsy.com "icc_hppir0", 176213531Sjairo.balart@metempsy.com "icc_hppir1", 176313531Sjairo.balart@metempsy.com "icc_hsre", 176413531Sjairo.balart@metempsy.com "icc_iar0", 176513531Sjairo.balart@metempsy.com "icc_iar1", 176613531Sjairo.balart@metempsy.com "icc_igrpen0", 176713531Sjairo.balart@metempsy.com "icc_igrpen1", 176813531Sjairo.balart@metempsy.com "icc_igrpen1_ns", 176913531Sjairo.balart@metempsy.com "icc_igrpen1_s", 177013531Sjairo.balart@metempsy.com "icc_mctlr", 177113531Sjairo.balart@metempsy.com "icc_mgrpen1", 177213531Sjairo.balart@metempsy.com "icc_msre", 177313531Sjairo.balart@metempsy.com "icc_pmr", 177413531Sjairo.balart@metempsy.com "icc_rpr", 177513531Sjairo.balart@metempsy.com "icc_sgi0r", 177613531Sjairo.balart@metempsy.com "icc_sgi1r", 177713531Sjairo.balart@metempsy.com "icc_sre", 177813531Sjairo.balart@metempsy.com "icc_sre_ns", 177913531Sjairo.balart@metempsy.com "icc_sre_s", 178013531Sjairo.balart@metempsy.com 178113531Sjairo.balart@metempsy.com "ich_ap0r0", 178213531Sjairo.balart@metempsy.com "ich_ap0r1", 178313531Sjairo.balart@metempsy.com "ich_ap0r2", 178413531Sjairo.balart@metempsy.com "ich_ap0r3", 178513531Sjairo.balart@metempsy.com "ich_ap1r0", 178613531Sjairo.balart@metempsy.com "ich_ap1r1", 178713531Sjairo.balart@metempsy.com "ich_ap1r2", 178813531Sjairo.balart@metempsy.com "ich_ap1r3", 178913531Sjairo.balart@metempsy.com "ich_hcr", 179013531Sjairo.balart@metempsy.com "ich_vtr", 179113531Sjairo.balart@metempsy.com "ich_misr", 179213531Sjairo.balart@metempsy.com "ich_eisr", 179313531Sjairo.balart@metempsy.com "ich_elrsr", 179413531Sjairo.balart@metempsy.com "ich_vmcr", 179513531Sjairo.balart@metempsy.com "ich_lr0", 179613531Sjairo.balart@metempsy.com "ich_lr1", 179713531Sjairo.balart@metempsy.com "ich_lr2", 179813531Sjairo.balart@metempsy.com "ich_lr3", 179913531Sjairo.balart@metempsy.com "ich_lr4", 180013531Sjairo.balart@metempsy.com "ich_lr5", 180113531Sjairo.balart@metempsy.com "ich_lr6", 180213531Sjairo.balart@metempsy.com "ich_lr7", 180313531Sjairo.balart@metempsy.com "ich_lr8", 180413531Sjairo.balart@metempsy.com "ich_lr9", 180513531Sjairo.balart@metempsy.com "ich_lr10", 180613531Sjairo.balart@metempsy.com "ich_lr11", 180713531Sjairo.balart@metempsy.com "ich_lr12", 180813531Sjairo.balart@metempsy.com "ich_lr13", 180913531Sjairo.balart@metempsy.com "ich_lr14", 181013531Sjairo.balart@metempsy.com "ich_lr15", 181113531Sjairo.balart@metempsy.com "ich_lrc0", 181213531Sjairo.balart@metempsy.com "ich_lrc1", 181313531Sjairo.balart@metempsy.com "ich_lrc2", 181413531Sjairo.balart@metempsy.com "ich_lrc3", 181513531Sjairo.balart@metempsy.com "ich_lrc4", 181613531Sjairo.balart@metempsy.com "ich_lrc5", 181713531Sjairo.balart@metempsy.com "ich_lrc6", 181813531Sjairo.balart@metempsy.com "ich_lrc7", 181913531Sjairo.balart@metempsy.com "ich_lrc8", 182013531Sjairo.balart@metempsy.com "ich_lrc9", 182113531Sjairo.balart@metempsy.com "ich_lrc10", 182213531Sjairo.balart@metempsy.com "ich_lrc11", 182313531Sjairo.balart@metempsy.com "ich_lrc12", 182413531Sjairo.balart@metempsy.com "ich_lrc13", 182513531Sjairo.balart@metempsy.com "ich_lrc14", 182613531Sjairo.balart@metempsy.com "ich_lrc15", 182713531Sjairo.balart@metempsy.com 182812529Sgiacomo.travaglini@arm.com "freeslot2", 182912529Sgiacomo.travaglini@arm.com 183012529Sgiacomo.travaglini@arm.com "num_phys_regs", 183112529Sgiacomo.travaglini@arm.com 183210037SARM gem5 Developers // Dummy registers 183310037SARM gem5 Developers "nop", 183410037SARM gem5 Developers "raz", 183510037SARM gem5 Developers "cp14_unimpl", 183610037SARM gem5 Developers "cp15_unimpl", 183712530Sgiacomo.travaglini@arm.com "unknown", 183812815Sgiacomo.travaglini@arm.com "impl_defined", 183912815Sgiacomo.travaglini@arm.com "erridr_el1", 184012815Sgiacomo.travaglini@arm.com "errselr_el1", 184112815Sgiacomo.travaglini@arm.com "erxfr_el1", 184212815Sgiacomo.travaglini@arm.com "erxctlr_el1", 184312815Sgiacomo.travaglini@arm.com "erxstatus_el1", 184412815Sgiacomo.travaglini@arm.com "erxaddr_el1", 184512815Sgiacomo.travaglini@arm.com "erxmisc0_el1", 184612815Sgiacomo.travaglini@arm.com "erxmisc1_el1", 184712815Sgiacomo.travaglini@arm.com "disr_el1", 184812815Sgiacomo.travaglini@arm.com "vsesr_el2", 184912815Sgiacomo.travaglini@arm.com "vdisr_el2", 18506242Sgblack@eecs.umich.edu }; 18516242Sgblack@eecs.umich.edu 18529256SAndreas.Sandberg@arm.com static_assert(sizeof(miscRegName) / sizeof(*miscRegName) == NUM_MISCREGS, 18539256SAndreas.Sandberg@arm.com "The miscRegName array and NUM_MISCREGS are inconsistent."); 18549256SAndreas.Sandberg@arm.com 18556750Sgblack@eecs.umich.edu // This mask selects bits of the CPSR that actually go in the CondCodes 18566750Sgblack@eecs.umich.edu // integer register to allow renaming. 18578302SAli.Saidi@ARM.com static const uint32_t CondCodesMask = 0xF00F0000; 18588302SAli.Saidi@ARM.com static const uint32_t CpsrMaskQ = 0x08000000; 18596750Sgblack@eecs.umich.edu 186012762Sgiacomo.travaglini@arm.com // APSR (Application Program Status Register Mask). It is the user level 186112762Sgiacomo.travaglini@arm.com // alias for the CPSR. The APSR is a subset of the CPSR. Although 186212762Sgiacomo.travaglini@arm.com // bits[15:0] are UNKNOWN on reads, it is permitted that, on a read of 186312762Sgiacomo.travaglini@arm.com // APSR: 186412762Sgiacomo.travaglini@arm.com // Bit[9] returns the value of CPSR.E. 186512762Sgiacomo.travaglini@arm.com // Bits[8:6] return the value of CPSR.{A,I, F}, the mask bits. 186612762Sgiacomo.travaglini@arm.com static const uint32_t ApsrMask = CpsrMaskQ | CondCodesMask | 0x000001D0; 186712762Sgiacomo.travaglini@arm.com 186812762Sgiacomo.travaglini@arm.com // CPSR (Current Program Status Register Mask). 186912762Sgiacomo.travaglini@arm.com static const uint32_t CpsrMask = ApsrMask | 0x00F003DF; 187012762Sgiacomo.travaglini@arm.com 18717643Sgblack@eecs.umich.edu // This mask selects bits of the FPSCR that actually go in the FpCondCodes 18727643Sgblack@eecs.umich.edu // integer register to allow renaming. 18737783SGiacomo.Gabrielli@arm.com static const uint32_t FpCondCodesMask = 0xF0000000; 18747783SGiacomo.Gabrielli@arm.com // This mask selects the cumulative FP exception flags of the FPSCR. 18757783SGiacomo.Gabrielli@arm.com static const uint32_t FpscrExcMask = 0x0000009F; 18767783SGiacomo.Gabrielli@arm.com // This mask selects the cumulative saturation flag of the FPSCR. 18777783SGiacomo.Gabrielli@arm.com static const uint32_t FpscrQcMask = 0x08000000; 18787643Sgblack@eecs.umich.edu 187911939Snikos.nikoleris@arm.com /** 188011939Snikos.nikoleris@arm.com * Check for permission to read coprocessor registers. 188111939Snikos.nikoleris@arm.com * 188211939Snikos.nikoleris@arm.com * Checks whether an instruction at the current program mode has 188311939Snikos.nikoleris@arm.com * permissions to read the coprocessor registers. This function 188411939Snikos.nikoleris@arm.com * returns whether the check is undefined and if not whether the 188511939Snikos.nikoleris@arm.com * read access is permitted. 188611939Snikos.nikoleris@arm.com * 188711939Snikos.nikoleris@arm.com * @param the misc reg indicating the coprocessor 188811939Snikos.nikoleris@arm.com * @param the SCR 188911939Snikos.nikoleris@arm.com * @param the CPSR 189011939Snikos.nikoleris@arm.com * @return a tuple of booleans: can_read, undefined 189111939Snikos.nikoleris@arm.com */ 189211939Snikos.nikoleris@arm.com std::tuple<bool, bool> canReadCoprocReg(MiscRegIndex reg, SCR scr, 189311939Snikos.nikoleris@arm.com CPSR cpsr); 189410037SARM gem5 Developers 189511939Snikos.nikoleris@arm.com /** 189611939Snikos.nikoleris@arm.com * Check for permission to write coprocessor registers. 189711939Snikos.nikoleris@arm.com * 189811939Snikos.nikoleris@arm.com * Checks whether an instruction at the current program mode has 189911939Snikos.nikoleris@arm.com * permissions to write the coprocessor registers. This function 190011939Snikos.nikoleris@arm.com * returns whether the check is undefined and if not whether the 190111939Snikos.nikoleris@arm.com * write access is permitted. 190211939Snikos.nikoleris@arm.com * 190311939Snikos.nikoleris@arm.com * @param the misc reg indicating the coprocessor 190411939Snikos.nikoleris@arm.com * @param the SCR 190511939Snikos.nikoleris@arm.com * @param the CPSR 190611939Snikos.nikoleris@arm.com * @return a tuple of booleans: can_write, undefined 190711939Snikos.nikoleris@arm.com */ 190811939Snikos.nikoleris@arm.com std::tuple<bool, bool> canWriteCoprocReg(MiscRegIndex reg, SCR scr, 190911939Snikos.nikoleris@arm.com CPSR cpsr); 191010037SARM gem5 Developers 191110037SARM gem5 Developers // Checks read access permissions to AArch64 system registers 191210037SARM gem5 Developers bool canReadAArch64SysReg(MiscRegIndex reg, SCR scr, CPSR cpsr, 191310037SARM gem5 Developers ThreadContext *tc); 191410037SARM gem5 Developers 191510037SARM gem5 Developers // Checks write access permissions to AArch64 system registers 191610037SARM gem5 Developers bool canWriteAArch64SysReg(MiscRegIndex reg, SCR scr, CPSR cpsr, 191710037SARM gem5 Developers ThreadContext *tc); 191810037SARM gem5 Developers 191910037SARM gem5 Developers // Uses just the scr.ns bit to pre flatten the misc regs. This is useful 192010037SARM gem5 Developers // for MCR/MRC instructions 192110037SARM gem5 Developers int 192212499Sgiacomo.travaglini@arm.com snsBankedIndex(MiscRegIndex reg, ThreadContext *tc); 192310037SARM gem5 Developers 192410037SARM gem5 Developers // Flattens a misc reg index using the specified security state. This is 192510037SARM gem5 Developers // used for opperations (eg address translations) where the security 192610037SARM gem5 Developers // state of the register access may differ from the current state of the 192710037SARM gem5 Developers // processor 192810037SARM gem5 Developers int 192912499Sgiacomo.travaglini@arm.com snsBankedIndex(MiscRegIndex reg, ThreadContext *tc, bool ns); 193010037SARM gem5 Developers 193110037SARM gem5 Developers // Takes a misc reg index and returns the root reg if its one of a set of 193210037SARM gem5 Developers // banked registers 193310037SARM gem5 Developers void 193410037SARM gem5 Developers preUnflattenMiscReg(); 193510037SARM gem5 Developers 193610037SARM gem5 Developers int 193710037SARM gem5 Developers unflattenMiscReg(int reg); 193810037SARM gem5 Developers 19398902Sandreas.hansson@arm.com} 19406242Sgblack@eecs.umich.edu 19416242Sgblack@eecs.umich.edu#endif // __ARCH_ARM_MISCREGS_HH__ 1942