gic.cc revision 11842:5a766820e739 
1/*
2 * Copyright (c) 2015-2017 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions are
16 * met: redistributions of source code must retain the above copyright
17 * notice, this list of conditions and the following disclaimer;
18 * redistributions in binary form must reproduce the above copyright
19 * notice, this list of conditions and the following disclaimer in the
20 * documentation and/or other materials provided with the distribution;
21 * neither the name of the copyright holders nor the names of its
22 * contributors may be used to endorse or promote products derived from
23 * this software without specific prior written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
26 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
27 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
28 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
29 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
30 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
31 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
33 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
34 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
35 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
36 *
37 * Authors: Andreas Sandberg
38 *          Curtis Dunham
39 */
40
41#include "arch/arm/kvm/gic.hh"
42
43#include <linux/kvm.h>
44
45#include "arch/arm/kvm/base_cpu.hh"
46#include "debug/Interrupt.hh"
47#include "params/MuxingKvmGic.hh"
48
49KvmKernelGicV2::KvmKernelGicV2(KvmVM &_vm, Addr cpu_addr, Addr dist_addr,
50                               unsigned it_lines)
51    : cpuRange(RangeSize(cpu_addr, KVM_VGIC_V2_CPU_SIZE)),
52      distRange(RangeSize(dist_addr, KVM_VGIC_V2_DIST_SIZE)),
53      vm(_vm),
54      kdev(vm.createDevice(KVM_DEV_TYPE_ARM_VGIC_V2))
55{
56    kdev.setAttr<uint64_t>(
57        KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_DIST, dist_addr);
58    kdev.setAttr<uint64_t>(
59        KVM_DEV_ARM_VGIC_GRP_ADDR, KVM_VGIC_V2_ADDR_TYPE_CPU, cpu_addr);
60
61    kdev.setAttr<uint32_t>(KVM_DEV_ARM_VGIC_GRP_NR_IRQS, 0, it_lines);
62}
63
64KvmKernelGicV2::~KvmKernelGicV2()
65{
66}
67
68void
69KvmKernelGicV2::setSPI(unsigned spi)
70{
71    setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, spi, true);
72}
73
74void
75KvmKernelGicV2::clearSPI(unsigned spi)
76{
77    setIntState(KVM_ARM_IRQ_TYPE_SPI, 0, spi, false);
78}
79
80void
81KvmKernelGicV2::setPPI(unsigned vcpu, unsigned ppi)
82{
83    setIntState(KVM_ARM_IRQ_TYPE_PPI, vcpu, ppi, true);
84}
85
86void
87KvmKernelGicV2::clearPPI(unsigned vcpu, unsigned ppi)
88{
89    setIntState(KVM_ARM_IRQ_TYPE_PPI, vcpu, ppi, false);
90}
91
92void
93KvmKernelGicV2::setIntState(unsigned type, unsigned vcpu, unsigned irq,
94                            bool high)
95{
96    assert(type <= KVM_ARM_IRQ_TYPE_MASK);
97    assert(vcpu <= KVM_ARM_IRQ_VCPU_MASK);
98    assert(irq <= KVM_ARM_IRQ_NUM_MASK);
99    const uint32_t line(
100        (type << KVM_ARM_IRQ_TYPE_SHIFT) |
101        (vcpu << KVM_ARM_IRQ_VCPU_SHIFT) |
102        (irq << KVM_ARM_IRQ_NUM_SHIFT));
103
104    vm.setIRQLine(line, high);
105}
106
107
108MuxingKvmGic::MuxingKvmGic(const MuxingKvmGicParams *p)
109    : Pl390(p),
110      system(*p->system),
111      kernelGic(nullptr),
112      usingKvm(false)
113{
114    if (auto vm = system.getKvmVM()) {
115        kernelGic = new KvmKernelGicV2(*vm, p->cpu_addr, p->dist_addr,
116                                       p->it_lines);
117    }
118}
119
120MuxingKvmGic::~MuxingKvmGic()
121{
122}
123
124void
125MuxingKvmGic::startup()
126{
127    usingKvm = (kernelGic != nullptr) && validKvmEnvironment();
128}
129
130void
131MuxingKvmGic::drainResume()
132{
133    bool use_kvm = (kernelGic != nullptr) && validKvmEnvironment();
134    if (use_kvm != usingKvm) {
135        if (use_kvm) // from simulation to KVM emulation
136            fromPl390ToKvm();
137        else // from KVM emulation to simulation
138            fromKvmToPl390();
139
140        usingKvm = use_kvm;
141    }
142}
143
144void
145MuxingKvmGic::serialize(CheckpointOut &cp) const
146{
147    if (!usingKvm)
148        return Pl390::serialize(cp);
149
150    panic("Checkpointing unsupported\n");
151}
152
153void
154MuxingKvmGic::unserialize(CheckpointIn &cp)
155{
156    if (!usingKvm)
157        return Pl390::unserialize(cp);
158
159    panic("Checkpointing unsupported\n");
160}
161
162Tick
163MuxingKvmGic::read(PacketPtr pkt)
164{
165    if (!usingKvm)
166        return Pl390::read(pkt);
167
168    panic("MuxingKvmGic: PIO from gem5 is currently unsupported\n");
169}
170
171Tick
172MuxingKvmGic::write(PacketPtr pkt)
173{
174    if (!usingKvm)
175        return Pl390::write(pkt);
176
177    panic("MuxingKvmGic: PIO from gem5 is currently unsupported\n");
178}
179
180void
181MuxingKvmGic::sendInt(uint32_t num)
182{
183    if (!usingKvm)
184        return Pl390::sendInt(num);
185
186    DPRINTF(Interrupt, "Set SPI %d\n", num);
187    kernelGic->setSPI(num);
188}
189
190void
191MuxingKvmGic::clearInt(uint32_t num)
192{
193    if (!usingKvm)
194        return Pl390::clearInt(num);
195
196    DPRINTF(Interrupt, "Clear SPI %d\n", num);
197    kernelGic->clearSPI(num);
198}
199
200void
201MuxingKvmGic::sendPPInt(uint32_t num, uint32_t cpu)
202{
203    if (!usingKvm)
204        return Pl390::sendPPInt(num, cpu);
205    DPRINTF(Interrupt, "Set PPI %d:%d\n", cpu, num);
206    kernelGic->setPPI(cpu, num);
207}
208
209void
210MuxingKvmGic::clearPPInt(uint32_t num, uint32_t cpu)
211{
212    if (!usingKvm)
213        return Pl390::clearPPInt(num, cpu);
214
215    DPRINTF(Interrupt, "Clear PPI %d:%d\n", cpu, num);
216    kernelGic->clearPPI(cpu, num);
217}
218
219bool
220MuxingKvmGic::validKvmEnvironment() const
221{
222    if (system.threadContexts.empty())
223        return false;
224
225    for (auto tc : system.threadContexts) {
226        if (dynamic_cast<BaseArmKvmCPU*>(tc->getCpuPtr()) == nullptr) {
227            return false;
228        }
229    }
230    return true;
231}
232
233void
234MuxingKvmGic::fromPl390ToKvm()
235{
236    panic("Gic multiplexing not implemented.\n");
237}
238
239void
240MuxingKvmGic::fromKvmToPl390()
241{
242    panic("Gic multiplexing not implemented.\n");
243}
244
245MuxingKvmGic *
246MuxingKvmGicParams::create()
247{
248    return new MuxingKvmGic(this);
249}
250