base_cpu.hh revision 11168
110860Sandreas.sandberg@arm.com/* 210860Sandreas.sandberg@arm.com * Copyright (c) 2012, 2015 ARM Limited 310860Sandreas.sandberg@arm.com * All rights reserved 410860Sandreas.sandberg@arm.com * 510860Sandreas.sandberg@arm.com * The license below extends only to copyright in the software and shall 610860Sandreas.sandberg@arm.com * not be construed as granting a license to any other intellectual 710860Sandreas.sandberg@arm.com * property including but not limited to intellectual property relating 810860Sandreas.sandberg@arm.com * to a hardware implementation of the functionality of the software 910860Sandreas.sandberg@arm.com * licensed hereunder. You may use the software subject to the license 1010860Sandreas.sandberg@arm.com * terms below provided that you ensure that this notice is replicated 1110860Sandreas.sandberg@arm.com * unmodified and in its entirety in all distributions of the software, 1210860Sandreas.sandberg@arm.com * modified or unmodified, in source code or in binary form. 1310860Sandreas.sandberg@arm.com * 1410860Sandreas.sandberg@arm.com * Redistribution and use in source and binary forms, with or without 1510860Sandreas.sandberg@arm.com * modification, are permitted provided that the following conditions are 1610860Sandreas.sandberg@arm.com * met: redistributions of source code must retain the above copyright 1710860Sandreas.sandberg@arm.com * notice, this list of conditions and the following disclaimer; 1810860Sandreas.sandberg@arm.com * redistributions in binary form must reproduce the above copyright 1910860Sandreas.sandberg@arm.com * notice, this list of conditions and the following disclaimer in the 2010860Sandreas.sandberg@arm.com * documentation and/or other materials provided with the distribution; 2110860Sandreas.sandberg@arm.com * neither the name of the copyright holders nor the names of its 2210860Sandreas.sandberg@arm.com * contributors may be used to endorse or promote products derived from 2310860Sandreas.sandberg@arm.com * this software without specific prior written permission. 2410860Sandreas.sandberg@arm.com * 2510860Sandreas.sandberg@arm.com * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2610860Sandreas.sandberg@arm.com * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2710860Sandreas.sandberg@arm.com * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2810860Sandreas.sandberg@arm.com * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2910860Sandreas.sandberg@arm.com * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3010860Sandreas.sandberg@arm.com * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3110860Sandreas.sandberg@arm.com * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3210860Sandreas.sandberg@arm.com * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3310860Sandreas.sandberg@arm.com * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3410860Sandreas.sandberg@arm.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3510860Sandreas.sandberg@arm.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3610860Sandreas.sandberg@arm.com * 3710860Sandreas.sandberg@arm.com * Authors: Andreas Sandberg 3810860Sandreas.sandberg@arm.com */ 3910860Sandreas.sandberg@arm.com 4010860Sandreas.sandberg@arm.com#ifndef __ARCH_ARM_KVM_BASE_CPU_HH__ 4110860Sandreas.sandberg@arm.com#define __ARCH_ARM_KVM_BASE_CPU_HH__ 4210860Sandreas.sandberg@arm.com 4310860Sandreas.sandberg@arm.com#include <vector> 4410860Sandreas.sandberg@arm.com 4510860Sandreas.sandberg@arm.com#include "cpu/kvm/base.hh" 4610860Sandreas.sandberg@arm.com 4710860Sandreas.sandberg@arm.comstruct BaseArmKvmCPUParams; 4810860Sandreas.sandberg@arm.com 4910860Sandreas.sandberg@arm.comclass BaseArmKvmCPU : public BaseKvmCPU 5010860Sandreas.sandberg@arm.com{ 5110860Sandreas.sandberg@arm.com public: 5210860Sandreas.sandberg@arm.com BaseArmKvmCPU(BaseArmKvmCPUParams *params); 5310860Sandreas.sandberg@arm.com virtual ~BaseArmKvmCPU(); 5410860Sandreas.sandberg@arm.com 5511168Sandreas.hansson@arm.com void startup() override; 5610860Sandreas.sandberg@arm.com 5710860Sandreas.sandberg@arm.com protected: 5811168Sandreas.hansson@arm.com Tick kvmRun(Tick ticks) override; 5910860Sandreas.sandberg@arm.com 6010860Sandreas.sandberg@arm.com 6110860Sandreas.sandberg@arm.com /** Cached state of the IRQ line */ 6210860Sandreas.sandberg@arm.com bool irqAsserted; 6310860Sandreas.sandberg@arm.com /** Cached state of the FIQ line */ 6410860Sandreas.sandberg@arm.com bool fiqAsserted; 6510860Sandreas.sandberg@arm.com 6610860Sandreas.sandberg@arm.com protected: 6710860Sandreas.sandberg@arm.com typedef std::vector<uint64_t> RegIndexVector; 6810860Sandreas.sandberg@arm.com 6910860Sandreas.sandberg@arm.com /** 7010860Sandreas.sandberg@arm.com * Get a list of registers supported by getOneReg() and setOneReg(). 7110860Sandreas.sandberg@arm.com * 7210860Sandreas.sandberg@arm.com * This method returns a list of all registers supported by 7310860Sandreas.sandberg@arm.com * kvm. The actual list is only requested the first time this 7410860Sandreas.sandberg@arm.com * method is called. Subsequent calls return a cached copy of the 7510860Sandreas.sandberg@arm.com * register list. 7610860Sandreas.sandberg@arm.com * 7710860Sandreas.sandberg@arm.com * @return Vector of register indexes. 7810860Sandreas.sandberg@arm.com */ 7910860Sandreas.sandberg@arm.com const RegIndexVector &getRegList() const; 8010860Sandreas.sandberg@arm.com 8110860Sandreas.sandberg@arm.com /** 8210860Sandreas.sandberg@arm.com * Tell the kernel to initialize this CPU 8310860Sandreas.sandberg@arm.com * 8410860Sandreas.sandberg@arm.com * The kernel needs to know what type of the CPU that we want to 8510860Sandreas.sandberg@arm.com * emulate. The specified CPU type has to be compatible with the 8610860Sandreas.sandberg@arm.com * host CPU. In practice, we usually call 8710860Sandreas.sandberg@arm.com * KvmVM::kvmArmPreferredTarget() to discover the host CPU. 8810860Sandreas.sandberg@arm.com * 8910860Sandreas.sandberg@arm.com * @param target CPU type to emulate 9010860Sandreas.sandberg@arm.com */ 9110860Sandreas.sandberg@arm.com void kvmArmVCpuInit(const struct kvm_vcpu_init &init); 9210860Sandreas.sandberg@arm.com 9310860Sandreas.sandberg@arm.com private: 9410860Sandreas.sandberg@arm.com std::unique_ptr<struct kvm_reg_list> tryGetRegList(uint64_t nelem) const; 9510860Sandreas.sandberg@arm.com 9610860Sandreas.sandberg@arm.com /** 9710860Sandreas.sandberg@arm.com * Get a list of registers supported by getOneReg() and setOneReg(). 9810860Sandreas.sandberg@arm.com * 9910860Sandreas.sandberg@arm.com * @return False if the number of elements allocated in the list 10010860Sandreas.sandberg@arm.com * is too small to hold the complete register list (the required 10110860Sandreas.sandberg@arm.com * size is written to regs.n in this case). True on success. 10210860Sandreas.sandberg@arm.com */ 10310860Sandreas.sandberg@arm.com bool getRegList(struct kvm_reg_list ®s) const; 10410860Sandreas.sandberg@arm.com 10510860Sandreas.sandberg@arm.com /** 10610860Sandreas.sandberg@arm.com * Cached copy of the list of registers supported by KVM 10710860Sandreas.sandberg@arm.com */ 10810860Sandreas.sandberg@arm.com mutable RegIndexVector _regIndexList; 10910860Sandreas.sandberg@arm.com}; 11010860Sandreas.sandberg@arm.com 11110860Sandreas.sandberg@arm.com#endif // __ARCH_ARM_KVM_BASE_CPU_HH__ 112