isa_device.hh revision 12972
110461SAndreas.Sandberg@ARM.com/*
212972Sandreas.sandberg@arm.com * Copyright (c) 2014, 2017 ARM Limited
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410461SAndreas.Sandberg@ARM.com *
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710461SAndreas.Sandberg@ARM.com * property including but not limited to intellectual property relating
810461SAndreas.Sandberg@ARM.com * to a hardware implementation of the functionality of the software
910461SAndreas.Sandberg@ARM.com * licensed hereunder.  You may use the software subject to the license
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1510461SAndreas.Sandberg@ARM.com * modification, are permitted provided that the following conditions are
1610461SAndreas.Sandberg@ARM.com * met: redistributions of source code must retain the above copyright
1710461SAndreas.Sandberg@ARM.com * notice, this list of conditions and the following disclaimer;
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3410461SAndreas.Sandberg@ARM.com * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
3510461SAndreas.Sandberg@ARM.com * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
3610461SAndreas.Sandberg@ARM.com *
3710461SAndreas.Sandberg@ARM.com * Authors: Andreas Sandberg
3810461SAndreas.Sandberg@ARM.com */
3910461SAndreas.Sandberg@ARM.com
4010461SAndreas.Sandberg@ARM.com#ifndef __ARCH_ARM_ISA_DEVICE_HH__
4110461SAndreas.Sandberg@ARM.com#define __ARCH_ARM_ISA_DEVICE_HH__
4210461SAndreas.Sandberg@ARM.com
4310461SAndreas.Sandberg@ARM.com#include "arch/arm/registers.hh"
4410461SAndreas.Sandberg@ARM.com#include "base/compiler.hh"
4510461SAndreas.Sandberg@ARM.com
4612972Sandreas.sandberg@arm.comclass ThreadContext;
4712972Sandreas.sandberg@arm.com
4810461SAndreas.Sandberg@ARM.comnamespace ArmISA
4910461SAndreas.Sandberg@ARM.com{
5010461SAndreas.Sandberg@ARM.com
5110609Sandreas.sandberg@arm.comclass ISA;
5210609Sandreas.sandberg@arm.com
5310461SAndreas.Sandberg@ARM.com/**
5410461SAndreas.Sandberg@ARM.com * Base class for devices that use the MiscReg interfaces.
5510461SAndreas.Sandberg@ARM.com *
5610461SAndreas.Sandberg@ARM.com * This class provides a well-defined interface that the ArmISA class
5710461SAndreas.Sandberg@ARM.com * can use when forwarding MiscReg accesses to a device model (e.g., a
5810461SAndreas.Sandberg@ARM.com * PMU or GIC).
5910461SAndreas.Sandberg@ARM.com */
6010461SAndreas.Sandberg@ARM.comclass BaseISADevice
6110461SAndreas.Sandberg@ARM.com{
6210461SAndreas.Sandberg@ARM.com  public:
6310609Sandreas.sandberg@arm.com    BaseISADevice();
6410461SAndreas.Sandberg@ARM.com    virtual ~BaseISADevice() {}
6510461SAndreas.Sandberg@ARM.com
6610609Sandreas.sandberg@arm.com    virtual void setISA(ISA *isa);
6712972Sandreas.sandberg@arm.com    virtual void setThreadContext(ThreadContext *tc) {}
6810609Sandreas.sandberg@arm.com
6910461SAndreas.Sandberg@ARM.com    /**
7010461SAndreas.Sandberg@ARM.com     * Write to a system register belonging to this device.
7110461SAndreas.Sandberg@ARM.com     *
7210461SAndreas.Sandberg@ARM.com     * @param misc_reg Register number (see miscregs.hh)
7310461SAndreas.Sandberg@ARM.com     * @param val Value to store
7410461SAndreas.Sandberg@ARM.com     */
7510461SAndreas.Sandberg@ARM.com    virtual void setMiscReg(int misc_reg, MiscReg val) = 0;
7610461SAndreas.Sandberg@ARM.com
7710461SAndreas.Sandberg@ARM.com    /**
7810461SAndreas.Sandberg@ARM.com     * Read a system register belonging to this device.
7910461SAndreas.Sandberg@ARM.com     *
8010461SAndreas.Sandberg@ARM.com     * @param misc_reg Register number (see miscregs.hh)
8110461SAndreas.Sandberg@ARM.com     * @return Register value.
8210461SAndreas.Sandberg@ARM.com     */
8310461SAndreas.Sandberg@ARM.com    virtual MiscReg readMiscReg(int misc_reg) = 0;
8410609Sandreas.sandberg@arm.com
8510609Sandreas.sandberg@arm.com  protected:
8610609Sandreas.sandberg@arm.com    ISA *isa;
8710461SAndreas.Sandberg@ARM.com};
8810461SAndreas.Sandberg@ARM.com
8910461SAndreas.Sandberg@ARM.com/**
9010461SAndreas.Sandberg@ARM.com * Dummy device that prints a warning when it is accessed.
9110461SAndreas.Sandberg@ARM.com *
9210461SAndreas.Sandberg@ARM.com * This device can be used as a placeholder when a real device model
9310461SAndreas.Sandberg@ARM.com * is not present. For example, the ISA code uses it to avoid having
9410461SAndreas.Sandberg@ARM.com * to check for a PMU in the register access code.
9510461SAndreas.Sandberg@ARM.com */
9610461SAndreas.Sandberg@ARM.comclass DummyISADevice : public BaseISADevice
9710461SAndreas.Sandberg@ARM.com{
9810461SAndreas.Sandberg@ARM.com  public:
9910461SAndreas.Sandberg@ARM.com    DummyISADevice()
10010461SAndreas.Sandberg@ARM.com        : BaseISADevice() {}
10110461SAndreas.Sandberg@ARM.com    ~DummyISADevice() {}
10210461SAndreas.Sandberg@ARM.com
10311168Sandreas.hansson@arm.com    void setMiscReg(int misc_reg, MiscReg val) override;
10411168Sandreas.hansson@arm.com    MiscReg readMiscReg(int misc_reg) override;
10510461SAndreas.Sandberg@ARM.com};
10610461SAndreas.Sandberg@ARM.com
10710461SAndreas.Sandberg@ARM.com}
10810461SAndreas.Sandberg@ARM.com
10910461SAndreas.Sandberg@ARM.com#endif // __ARCH_ARM_ISA_DEVICE_HH__
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