vfp64.isa revision 10183
1// -*- mode:c++ -*- 2 3// Copyright (c) 2012, 2014 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating 9// to a hardware implementation of the functionality of the software 10// licensed hereunder. You may use the software subject to the license 11// terms below provided that you ensure that this notice is replicated 12// unmodified and in its entirety in all distributions of the software, 13// modified or unmodified, in source code or in binary form. 14// 15// Redistribution and use in source and binary forms, with or without 16// modification, are permitted provided that the following conditions are 17// met: redistributions of source code must retain the above copyright 18// notice, this list of conditions and the following disclaimer; 19// redistributions in binary form must reproduce the above copyright 20// notice, this list of conditions and the following disclaimer in the 21// documentation and/or other materials provided with the distribution; 22// neither the name of the copyright holders nor the names of its 23// contributors may be used to endorse or promote products derived from 24// this software without specific prior written permission. 25// 26// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 29// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 30// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 31// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 32// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 33// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37// 38// Authors: Thomas Grocutt 39 40def template AA64FpRegRegOpConstructor {{ 41 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 42 IntRegIndex _dest, IntRegIndex _op1, 43 VfpMicroMode mode) 44 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 45 _dest, _op1, mode) 46 { 47 %(constructor)s; 48 for (int x = 0; x < _numDestRegs; x++) { 49 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 50 } 51 } 52}}; 53 54def template AA64FpRegImmOpConstructor {{ 55 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 56 IntRegIndex _dest, uint64_t _imm, VfpMicroMode mode) 57 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 58 _dest, _imm, mode) 59 { 60 %(constructor)s; 61 for (int x = 0; x < _numDestRegs; x++) { 62 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 63 } 64 } 65}}; 66 67def template AA64FpRegRegImmOpConstructor {{ 68 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 69 IntRegIndex _dest, 70 IntRegIndex _op1, 71 uint64_t _imm, 72 VfpMicroMode mode) 73 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 74 _dest, _op1, _imm, mode) 75 { 76 %(constructor)s; 77 for (int x = 0; x < _numDestRegs; x++) { 78 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 79 } 80 } 81}}; 82 83def template AA64FpRegRegRegOpConstructor {{ 84 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 85 IntRegIndex _dest, 86 IntRegIndex _op1, 87 IntRegIndex _op2, 88 VfpMicroMode mode) 89 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 90 _dest, _op1, _op2, mode) 91 { 92 %(constructor)s; 93 for (int x = 0; x < _numDestRegs; x++) { 94 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 95 } 96 } 97}}; 98 99def template AA64FpRegRegRegRegOpDeclare {{ 100class %(class_name)s : public %(base_class)s 101{ 102 public: 103 // Constructor 104 %(class_name)s(ExtMachInst machInst, 105 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 106 IntRegIndex _op3, VfpMicroMode mode = VfpNotAMicroop); 107 %(BasicExecDeclare)s 108}; 109}}; 110 111def template AA64FpRegRegRegRegOpConstructor {{ 112 inline %(class_name)s::%(class_name)s(ExtMachInst machInst, 113 IntRegIndex _dest, 114 IntRegIndex _op1, 115 IntRegIndex _op2, 116 IntRegIndex _op3, 117 VfpMicroMode mode) 118 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 119 _dest, _op1, _op2, _op3, mode) 120 { 121 %(constructor)s; 122 for (int x = 0; x < _numDestRegs; x++) { 123 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 124 } 125 } 126}}; 127