vfp.isa revision 10474:799c8ee4ecba 
1// -*- mode:c++ -*-
2
3// Copyright (c) 2010-2013 ARM Limited
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5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
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16// modification, are permitted provided that the following conditions are
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37//
38// Authors: Gabe Black
39
40let {{
41    vfpEnabledCheckCode = '''
42        uint32_t issEnCheck;
43        bool trapEnCheck;
44        uint32_t seq;
45        if (!vfpNeonEnabled(seq,Hcptr, Nsacr, Cpacr, Cpsr, issEnCheck,
46                            trapEnCheck, xc->tcBase(), Fpexc))
47            {return disabledFault();}
48        if (trapEnCheck) {
49            CPSR cpsrEnCheck = Cpsr;
50            if (cpsrEnCheck.mode == MODE_HYP) {
51                return std::make_shared<UndefinedInstruction>(
52                                                machInst, issEnCheck,
53                                                EC_TRAPPED_HCPTR, mnemonic);
54            } else {
55                if (!inSecureState(Scr, Cpsr)) {
56                    return std::make_shared<HypervisorTrap>(
57                                              machInst, issEnCheck,
58                                              EC_TRAPPED_HCPTR);
59                }
60            }
61        }
62    '''
63
64    vfp64EnabledCheckCode = '''
65        CPSR cpsrEnCheck = Cpsr;
66        ExceptionLevel el = (ExceptionLevel) (uint8_t) cpsrEnCheck.el;
67        if (!vfpNeon64Enabled(Cpacr64, el))
68             return std::make_shared<SupervisorTrap>(machInst, 0x1E00000,
69                                       EC_TRAPPED_SIMD_FP);
70
71        if (ArmSystem::haveVirtualization(xc->tcBase()) && el <= EL2) {
72            HCPTR cptrEnCheck = xc->tcBase()->readMiscReg(MISCREG_CPTR_EL2);
73            if (cptrEnCheck.tfp)
74                return std::make_shared<HypervisorTrap>(machInst, 0x1E00000,
75                                          EC_TRAPPED_SIMD_FP);
76        }
77
78        if (ArmSystem::haveSecurity(xc->tcBase())) {
79            HCPTR cptrEnCheck = xc->tcBase()->readMiscReg(MISCREG_CPTR_EL3);
80            if (cptrEnCheck.tfp)
81                return std::make_shared<SecureMonitorTrap>(machInst, 0x1E00000,
82                                             EC_TRAPPED_SIMD_FP);
83        }
84    '''
85
86    vmsrEnabledCheckCode = '''
87        uint32_t issEnCheck;
88        bool trapEnCheck;
89        uint32_t seq;
90        if (!vfpNeonEnabled(seq,Hcptr, Nsacr, Cpacr, Cpsr, issEnCheck,
91                            trapEnCheck, xc->tcBase()))
92            if (dest != (int)MISCREG_FPEXC && dest != (int)MISCREG_FPSID)
93                {return disabledFault();}
94        if (!inPrivilegedMode(Cpsr))
95            if (dest != (int)MISCREG_FPSCR)
96                return disabledFault();
97        if (trapEnCheck) {
98            CPSR cpsrEnCheck = Cpsr;
99            if (cpsrEnCheck.mode == MODE_HYP) {
100                return std::make_shared<UndefinedInstruction>(
101                                                machInst, issEnCheck,
102                                                EC_TRAPPED_HCPTR, mnemonic);
103            } else {
104                if (!inSecureState(Scr, Cpsr)) {
105                    return std::make_shared<HypervisorTrap>(
106                                              machInst, issEnCheck,
107                                              EC_TRAPPED_HCPTR);
108                }
109            }
110        }
111    '''
112
113    vmrsEnabledCheckCode = '''
114        uint32_t issEnCheck;
115        bool trapEnCheck;
116        uint32_t seq;
117        if (!vfpNeonEnabled(seq,Hcptr, Nsacr, Cpacr, Cpsr, issEnCheck,
118                            trapEnCheck, xc->tcBase()))
119            if (op1 != (int)MISCREG_FPEXC && op1 != (int)MISCREG_FPSID &&
120                op1 != (int)MISCREG_MVFR0 && op1 != (int)MISCREG_MVFR1)
121                {return disabledFault();}
122        if (!inPrivilegedMode(Cpsr))
123            if (op1 != (int)MISCREG_FPSCR)
124                return disabledFault();
125        if (trapEnCheck) {
126            CPSR cpsrEnCheck = Cpsr;
127            if (cpsrEnCheck.mode == MODE_HYP) {
128                return std::make_shared<UndefinedInstruction>(
129                                                machInst, issEnCheck,
130                                                EC_TRAPPED_HCPTR, mnemonic);
131            } else {
132                if (!inSecureState(Scr, Cpsr)) {
133                    return std::make_shared<HypervisorTrap>(
134                                              machInst, issEnCheck,
135                                              EC_TRAPPED_HCPTR);
136                }
137            }
138        }
139    '''
140    vmrsApsrEnabledCheckCode = '''
141        uint32_t issEnCheck;
142        bool trapEnCheck;
143        uint32_t seq;
144        if (!vfpNeonEnabled(seq,Hcptr, Nsacr, Cpacr, Cpsr, issEnCheck,
145                            trapEnCheck, xc->tcBase()))
146            {return disabledFault();}
147        if (trapEnCheck) {
148            CPSR cpsrEnCheck = Cpsr;
149            if (cpsrEnCheck.mode == MODE_HYP) {
150                return std::make_shared<UndefinedInstruction>(
151                                                machInst, issEnCheck,
152                                                EC_TRAPPED_HCPTR, mnemonic);
153            } else {
154                if (!inSecureState(Scr, Cpsr)) {
155                    return std::make_shared<HypervisorTrap>(
156                                              machInst, issEnCheck,
157                                              EC_TRAPPED_HCPTR);
158                }
159            }
160        }
161    '''
162}};
163
164def template FpRegRegOpDeclare {{
165class %(class_name)s : public %(base_class)s
166{
167  public:
168    // Constructor
169    %(class_name)s(ExtMachInst machInst,
170                   IntRegIndex _dest, IntRegIndex _op1,
171                   VfpMicroMode mode = VfpNotAMicroop);
172    %(BasicExecDeclare)s
173};
174}};
175
176def template FpRegRegOpConstructor {{
177    %(class_name)s::%(class_name)s(ExtMachInst machInst,
178                                          IntRegIndex _dest, IntRegIndex _op1,
179                                          VfpMicroMode mode)
180        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
181                _dest, _op1, mode)
182    {
183        %(constructor)s;
184        if (!(condCode == COND_AL || condCode == COND_UC)) {
185            for (int x = 0; x < _numDestRegs; x++) {
186                _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
187            }
188        }
189    }
190}};
191
192def template FpRegImmOpDeclare {{
193class %(class_name)s : public %(base_class)s
194{
195  public:
196    // Constructor
197    %(class_name)s(ExtMachInst machInst, IntRegIndex _dest,
198            uint64_t _imm, VfpMicroMode mode = VfpNotAMicroop);
199    %(BasicExecDeclare)s
200};
201}};
202
203def template FpRegImmOpConstructor {{
204    %(class_name)s::%(class_name)s(ExtMachInst machInst,
205            IntRegIndex _dest, uint64_t _imm, VfpMicroMode mode)
206        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
207                _dest, _imm, mode)
208    {
209        %(constructor)s;
210        if (!(condCode == COND_AL || condCode == COND_UC)) {
211            for (int x = 0; x < _numDestRegs; x++) {
212                _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
213            }
214        }
215    }
216}};
217
218def template FpRegRegImmOpDeclare {{
219class %(class_name)s : public %(base_class)s
220{
221  public:
222    // Constructor
223    %(class_name)s(ExtMachInst machInst,
224                   IntRegIndex _dest, IntRegIndex _op1,
225                   uint64_t _imm, VfpMicroMode mode = VfpNotAMicroop);
226    %(BasicExecDeclare)s
227};
228}};
229
230def template FpRegRegImmOpConstructor {{
231    %(class_name)s::%(class_name)s(ExtMachInst machInst,
232                                          IntRegIndex _dest,
233                                          IntRegIndex _op1,
234                                          uint64_t _imm,
235                                          VfpMicroMode mode)
236        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
237                         _dest, _op1, _imm, mode)
238    {
239        %(constructor)s;
240        if (!(condCode == COND_AL || condCode == COND_UC)) {
241            for (int x = 0; x < _numDestRegs; x++) {
242                _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
243            }
244        }
245    }
246}};
247
248def template FpRegRegRegOpDeclare {{
249class %(class_name)s : public %(base_class)s
250{
251  public:
252    // Constructor
253    %(class_name)s(ExtMachInst machInst,
254                   IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
255                   VfpMicroMode mode = VfpNotAMicroop);
256    %(BasicExecDeclare)s
257};
258}};
259
260def template FpRegRegRegOpConstructor {{
261    %(class_name)s::%(class_name)s(ExtMachInst machInst,
262                                          IntRegIndex _dest,
263                                          IntRegIndex _op1,
264                                          IntRegIndex _op2,
265                                          VfpMicroMode mode)
266        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
267                         _dest, _op1, _op2, mode)
268    {
269        %(constructor)s;
270        if (!(condCode == COND_AL || condCode == COND_UC)) {
271            for (int x = 0; x < _numDestRegs; x++) {
272                _srcRegIdx[_numSrcRegs++] = _destRegIdx[x];
273            }
274        }
275    }
276}};
277