neon64.isa revision 12236:126ac9da6050 
1// -*- mode: c++ -*-
2
3// Copyright (c) 2012-2013 ARM Limited
4// All rights reserved
5//
6// The license below extends only to copyright in the software and shall
7// not be construed as granting a license to any other intellectual
8// property including but not limited to intellectual property relating
9// to a hardware implementation of the functionality of the software
10// licensed hereunder.  You may use the software subject to the license
11// terms below provided that you ensure that this notice is replicated
12// unmodified and in its entirety in all distributions of the software,
13// modified or unmodified, in source code or in binary form.
14//
15// Redistribution and use in source and binary forms, with or without
16// modification, are permitted provided that the following conditions are
17// met: redistributions of source code must retain the above copyright
18// notice, this list of conditions and the following disclaimer;
19// redistributions in binary form must reproduce the above copyright
20// notice, this list of conditions and the following disclaimer in the
21// documentation and/or other materials provided with the distribution;
22// neither the name of the copyright holders nor the names of its
23// contributors may be used to endorse or promote products derived from
24// this software without specific prior written permission.
25//
26// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
27// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
28// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
29// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
30// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
31// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
32// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
33// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
37//
38// Authors: Mbou Eyole
39//          Giacomo Gabrielli
40
41let {{
42    simd64EnabledCheckCode = vfp64EnabledCheckCode
43}};
44
45def template NeonX2RegOpDeclare {{
46template <class _Element>
47class %(class_name)s : public %(base_class)s
48{
49  protected:
50    typedef _Element Element;
51  public:
52    // Constructor
53    %(class_name)s(ExtMachInst machInst,
54                   IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2)
55        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
56                         _dest, _op1, _op2)
57    {
58        %(constructor)s;
59    }
60
61    Fault execute(ExecContext *, Trace::InstRecord *) const;
62};
63}};
64
65def template NeonX2RegImmOpDeclare {{
66template <class _Element>
67class %(class_name)s : public %(base_class)s
68{
69  protected:
70    typedef _Element Element;
71  public:
72    // Constructor
73    %(class_name)s(ExtMachInst machInst,
74                   IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2,
75                   uint64_t _imm)
76        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
77                         _dest, _op1, _op2, _imm)
78    {
79        %(constructor)s;
80    }
81
82    Fault execute(ExecContext *, Trace::InstRecord *) const;
83};
84}};
85
86def template NeonX1RegOpDeclare {{
87template <class _Element>
88class %(class_name)s : public %(base_class)s
89{
90  protected:
91    typedef _Element Element;
92  public:
93    // Constructor
94    %(class_name)s(ExtMachInst machInst,
95                   IntRegIndex _dest, IntRegIndex _op1)
96        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
97                         _dest, _op1)
98    {
99        %(constructor)s;
100    }
101
102    Fault execute(ExecContext *, Trace::InstRecord *) const;
103};
104}};
105
106def template NeonX1RegImmOpDeclare {{
107template <class _Element>
108class %(class_name)s : public %(base_class)s
109{
110  protected:
111    typedef _Element Element;
112  public:
113    // Constructor
114    %(class_name)s(ExtMachInst machInst,
115                   IntRegIndex _dest, IntRegIndex _op1, uint64_t _imm)
116        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
117                         _dest, _op1, _imm)
118    {
119        %(constructor)s;
120    }
121
122    Fault execute(ExecContext *, Trace::InstRecord *) const;
123};
124}};
125
126def template NeonX1Reg2ImmOpDeclare {{
127template <class _Element>
128class %(class_name)s : public %(base_class)s
129{
130  protected:
131    typedef _Element Element;
132  public:
133    // Constructor
134    %(class_name)s(ExtMachInst machInst,
135                   IntRegIndex _dest, IntRegIndex _op1, uint64_t _imm1,
136                   uint64_t _imm2)
137        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
138                         _dest, _op1, _imm1, _imm2)
139    {
140        %(constructor)s;
141    }
142
143    Fault execute(ExecContext *, Trace::InstRecord *) const;
144};
145}};
146
147def template NeonX1RegImmOnlyOpDeclare {{
148template <class _Element>
149class %(class_name)s : public %(base_class)s
150{
151  protected:
152    typedef _Element Element;
153  public:
154    // Constructor
155    %(class_name)s(ExtMachInst machInst,
156                   IntRegIndex _dest, uint64_t _imm)
157        : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
158                         _dest, _imm)
159    {
160        %(constructor)s;
161    }
162
163    Fault execute(ExecContext *, Trace::InstRecord *) const;
164};
165}};
166
167def template NeonXExecDeclare {{
168    template
169    Fault %(class_name)s<%(targs)s>::execute(
170            ExecContext *, Trace::InstRecord *) const;
171}};
172
173def template NeonXEqualRegOpExecute {{
174    template <class Element>
175    Fault %(class_name)s<Element>::execute(ExecContext *xc,
176            Trace::InstRecord *traceData) const
177    {
178        Fault fault = NoFault;
179        %(op_decl)s;
180        %(op_rd)s;
181
182        const unsigned rCount = %(r_count)d;
183        const unsigned eCount = rCount * sizeof(FloatRegBits) / sizeof(Element);
184        const unsigned eCountFull = 4 * sizeof(FloatRegBits) / sizeof(Element);
185
186        union RegVect {
187            FloatRegBits regs[rCount];
188            Element elements[eCount];
189        };
190
191        union FullRegVect {
192            FloatRegBits regs[4];
193            Element elements[eCountFull];
194        };
195
196        %(code)s;
197        if (fault == NoFault)
198        {
199            %(op_wb)s;
200        }
201
202        return fault;
203    }
204}};
205
206def template NeonXUnequalRegOpExecute {{
207    template <class Element>
208    Fault %(class_name)s<Element>::execute(ExecContext *xc,
209            Trace::InstRecord *traceData) const
210    {
211        typedef typename bigger_type_t<Element>::type BigElement;
212        Fault fault = NoFault;
213        %(op_decl)s;
214        %(op_rd)s;
215
216        const unsigned rCount = %(r_count)d;
217        const unsigned eCount = rCount * sizeof(FloatRegBits) / sizeof(Element);
218        const unsigned eCountFull = 4 * sizeof(FloatRegBits) / sizeof(Element);
219
220        union RegVect {
221            FloatRegBits regs[rCount];
222            Element elements[eCount];
223            BigElement bigElements[eCount / 2];
224        };
225
226        union BigRegVect {
227            FloatRegBits regs[2 * rCount];
228            BigElement elements[eCount];
229        };
230
231        union FullRegVect {
232            FloatRegBits regs[4];
233            Element elements[eCountFull];
234        };
235
236        %(code)s;
237        if (fault == NoFault)
238        {
239            %(op_wb)s;
240        }
241
242        return fault;
243    }
244}};
245
246def template MicroNeonMemDeclare64 {{
247    class %(class_name)s : public %(base_class)s
248    {
249      protected:
250        // True if the base register is SP (used for SP alignment checking)
251        bool baseIsSP;
252        // Access size in bytes
253        uint8_t accSize;
254        // Vector element size (0 -> 8-bit, 1 -> 16-bit, 2 -> 32-bit,
255        // 3 -> 64-bit)
256        uint8_t eSize;
257
258      public:
259        %(class_name)s(ExtMachInst machInst, RegIndex _dest, RegIndex _ura,
260                       uint32_t _imm, unsigned extraMemFlags, bool _baseIsSP,
261                       uint8_t _accSize, uint8_t _eSize)
262            : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest,
263                             _ura, _imm),
264            baseIsSP(_baseIsSP), accSize(_accSize), eSize(_eSize)
265        {
266            memAccessFlags |= extraMemFlags;
267            %(constructor)s;
268        }
269
270        Fault execute(ExecContext *, Trace::InstRecord *) const;
271        Fault initiateAcc(ExecContext *, Trace::InstRecord *) const;
272        Fault completeAcc(PacketPtr, ExecContext *, Trace::InstRecord *) const;
273    };
274}};
275
276def template NeonLoadExecute64 {{
277    Fault %(class_name)s::execute(
278        ExecContext *xc, Trace::InstRecord *traceData) const
279    {
280        Addr EA;
281        Fault fault = NoFault;
282
283        %(op_decl)s;
284        %(mem_decl)s;
285        %(op_rd)s;
286        %(ea_code)s;
287
288        MemUnion memUnion;
289        uint8_t *dataPtr = memUnion.bytes;
290
291        if (fault == NoFault) {
292            fault = xc->readMem(EA, dataPtr, accSize, memAccessFlags);
293            %(memacc_code)s;
294        }
295
296        if (fault == NoFault) {
297            %(op_wb)s;
298        }
299
300        return fault;
301    }
302}};
303
304def template NeonLoadInitiateAcc64 {{
305    Fault %(class_name)s::initiateAcc(
306        ExecContext *xc, Trace::InstRecord *traceData) const
307    {
308        Addr EA;
309        Fault fault = NoFault;
310
311        %(op_decl)s;
312        %(mem_decl)s;
313        %(op_rd)s;
314        %(ea_code)s;
315
316        if (fault == NoFault) {
317            fault = xc->initiateMemRead(EA, accSize, memAccessFlags);
318        }
319
320        return fault;
321    }
322}};
323
324def template NeonLoadCompleteAcc64 {{
325    Fault %(class_name)s::completeAcc(
326        PacketPtr pkt, ExecContext *xc, Trace::InstRecord *traceData) const
327    {
328        Fault fault = NoFault;
329
330        %(mem_decl)s;
331        %(op_decl)s;
332        %(op_rd)s;
333
334        MemUnion memUnion { { } };
335        memcpy(&memUnion, pkt->getPtr<uint8_t>(), pkt->getSize());
336
337        if (fault == NoFault) {
338            %(memacc_code)s;
339        }
340
341        if (fault == NoFault) {
342            %(op_wb)s;
343        }
344
345        return fault;
346    }
347}};
348
349def template NeonStoreExecute64 {{
350    Fault %(class_name)s::execute(
351        ExecContext *xc, Trace::InstRecord *traceData) const
352    {
353        Addr EA;
354        Fault fault = NoFault;
355
356        %(op_decl)s;
357        %(mem_decl)s;
358        %(op_rd)s;
359        %(ea_code)s;
360
361        MemUnion memUnion;
362        uint8_t *dataPtr = memUnion.bytes;
363
364        if (fault == NoFault) {
365            %(memacc_code)s;
366        }
367
368        if (fault == NoFault) {
369            fault = xc->writeMem(dataPtr, accSize, EA, memAccessFlags,
370                                 NULL);
371        }
372
373        if (fault == NoFault) {
374            %(op_wb)s;
375        }
376
377        return fault;
378    }
379}};
380
381def template NeonStoreInitiateAcc64 {{
382    Fault %(class_name)s::initiateAcc(
383        ExecContext *xc, Trace::InstRecord *traceData) const
384    {
385        Addr EA;
386        Fault fault = NoFault;
387
388        %(op_decl)s;
389        %(mem_decl)s;
390        %(op_rd)s;
391        %(ea_code)s;
392
393        MemUnion memUnion;
394        if (fault == NoFault) {
395            %(memacc_code)s;
396        }
397
398        if (fault == NoFault) {
399            fault = xc->writeMem(memUnion.bytes, accSize, EA, memAccessFlags,
400                                 NULL);
401        }
402
403        return fault;
404    }
405}};
406
407def template NeonStoreCompleteAcc64 {{
408    Fault %(class_name)s::completeAcc(
409        PacketPtr pkt, ExecContext *xc, Trace::InstRecord *traceData) const
410    {
411        return NoFault;
412    }
413}};
414
415def template VMemMultDeclare64 {{
416    class %(class_name)s : public %(base_class)s
417    {
418      public:
419        // Constructor
420        %(class_name)s(ExtMachInst machInst, RegIndex rn, RegIndex vd,
421                       RegIndex rm, uint8_t eSize, uint8_t dataSize,
422                       uint8_t numStructElems, uint8_t numRegs, bool wb);
423    };
424}};
425
426def template VMemSingleDeclare64 {{
427    class %(class_name)s : public %(base_class)s
428    {
429      public:
430        // Constructor
431        %(class_name)s(ExtMachInst machInst, RegIndex rn, RegIndex vd,
432                       RegIndex rm, uint8_t eSize, uint8_t dataSize,
433                       uint8_t numStructElems, uint8_t index, bool wb,
434                       bool replicate = false);
435    };
436}};
437
438def template VMemMultConstructor64 {{
439    %(class_name)s::%(class_name)s(
440        ExtMachInst machInst, RegIndex rn, RegIndex vd, RegIndex rm,
441        uint8_t _eSize, uint8_t _dataSize, uint8_t _numStructElems,
442        uint8_t _numRegs, bool _wb) :
443            %(base_class)s(
444                "%(mnemonic)s", machInst, %(op_class)s, rn, vd, rm,
445                _eSize, _dataSize, _numStructElems, _numRegs, _wb)
446    {
447        %(constructor)s;
448    }
449}};
450
451def template VMemSingleConstructor64 {{
452    %(class_name)s::%(class_name)s(
453        ExtMachInst machInst, RegIndex rn, RegIndex vd, RegIndex rm,
454        uint8_t _eSize, uint8_t _dataSize, uint8_t _numStructElems,
455        uint8_t _index, bool _wb, bool _replicate) :
456            %(base_class)s(
457                "%(mnemonic)s", machInst, %(op_class)s, rn, vd, rm,
458                _eSize, _dataSize, _numStructElems, _index, _wb,
459                _replicate)
460    {
461        %(constructor)s;
462    }
463}};
464
465def template MicroNeonMixDeclare64 {{
466    class %(class_name)s : public %(base_class)s
467    {
468      public:
469        %(class_name)s(ExtMachInst machInst, RegIndex _dest, RegIndex _op1,
470                       uint8_t _eSize, uint8_t _dataSize,
471                       uint8_t _numStructElems, uint8_t _numRegs,
472                       uint8_t _step) :
473            %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
474                           _dest, _op1, _eSize, _dataSize, _numStructElems,
475                           _numRegs, _step)
476        {
477            %(constructor)s;
478        }
479
480        Fault execute(ExecContext *, Trace::InstRecord *) const;
481    };
482}};
483
484def template MicroNeonMixLaneDeclare64 {{
485    class %(class_name)s : public %(base_class)s
486    {
487      public:
488        %(class_name)s(ExtMachInst machInst, RegIndex _dest, RegIndex _op1,
489                       uint8_t _eSize, uint8_t _dataSize,
490                       uint8_t _numStructElems, uint8_t _lane, uint8_t _step,
491                       bool _replicate = false) :
492            %(base_class)s("%(mnemonic)s", machInst, %(op_class)s,
493                           _dest, _op1, _eSize, _dataSize, _numStructElems,
494                           _lane, _step, _replicate)
495        {
496            %(constructor)s;
497        }
498
499        Fault execute(ExecContext *, Trace::InstRecord *) const;
500    };
501}};
502
503def template MicroNeonMixExecute64 {{
504    Fault %(class_name)s::execute(ExecContext *xc,
505            Trace::InstRecord *traceData) const
506    {
507        Fault fault = NoFault;
508        uint64_t resTemp = 0;
509        resTemp = resTemp;
510        %(op_decl)s;
511        %(op_rd)s;
512
513        %(code)s;
514        if (fault == NoFault)
515        {
516            %(op_wb)s;
517        }
518
519        return fault;
520    }
521}};
522