neon.isa revision 8902
1// -*- mode:c++ -*- 2 3// Copyright (c) 2010 ARM Limited 4// All rights reserved 5// 6// The license below extends only to copyright in the software and shall 7// not be construed as granting a license to any other intellectual 8// property including but not limited to intellectual property relating 9// to a hardware implementation of the functionality of the software 10// licensed hereunder. You may use the software subject to the license 11// terms below provided that you ensure that this notice is replicated 12// unmodified and in its entirety in all distributions of the software, 13// modified or unmodified, in source code or in binary form. 14// 15// Redistribution and use in source and binary forms, with or without 16// modification, are permitted provided that the following conditions are 17// met: redistributions of source code must retain the above copyright 18// notice, this list of conditions and the following disclaimer; 19// redistributions in binary form must reproduce the above copyright 20// notice, this list of conditions and the following disclaimer in the 21// documentation and/or other materials provided with the distribution; 22// neither the name of the copyright holders nor the names of its 23// contributors may be used to endorse or promote products derived from 24// this software without specific prior written permission. 25// 26// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 27// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 28// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 29// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 30// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 31// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 32// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 33// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 34// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 35// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 36// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 37// 38// Authors: Gabe Black 39 40let {{ 41 simdEnabledCheckCode = ''' 42 if (!neonEnabled(Cpacr, Cpsr, Fpexc)) 43 return disabledFault(); 44 ''' 45}}; 46 47 48def template NeonRegRegRegOpDeclare {{ 49template <class _Element> 50class %(class_name)s : public %(base_class)s 51{ 52 protected: 53 typedef _Element Element; 54 public: 55 // Constructor 56 %(class_name)s(ExtMachInst machInst, 57 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) 58 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 59 _dest, _op1, _op2) 60 { 61 %(constructor)s; 62 if (!(condCode == COND_AL || condCode == COND_UC)) { 63 for (int x = 0; x < _numDestRegs; x++) { 64 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 65 } 66 } 67 } 68 69 %(BasicExecDeclare)s 70}; 71}}; 72 73def template NeonRegRegRegImmOpDeclare {{ 74template <class _Element> 75class %(class_name)s : public %(base_class)s 76{ 77 protected: 78 typedef _Element Element; 79 public: 80 // Constructor 81 %(class_name)s(ExtMachInst machInst, 82 IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 83 uint64_t _imm) 84 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 85 _dest, _op1, _op2, _imm) 86 { 87 %(constructor)s; 88 if (!(condCode == COND_AL || condCode == COND_UC)) { 89 for (int x = 0; x < _numDestRegs; x++) { 90 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 91 } 92 } 93 } 94 95 %(BasicExecDeclare)s 96}; 97}}; 98 99def template NeonRegRegImmOpDeclare {{ 100template <class _Element> 101class %(class_name)s : public %(base_class)s 102{ 103 protected: 104 typedef _Element Element; 105 public: 106 // Constructor 107 %(class_name)s(ExtMachInst machInst, 108 IntRegIndex _dest, IntRegIndex _op1, uint64_t _imm) 109 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 110 _dest, _op1, _imm) 111 { 112 %(constructor)s; 113 if (!(condCode == COND_AL || condCode == COND_UC)) { 114 for (int x = 0; x < _numDestRegs; x++) { 115 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 116 } 117 } 118 } 119 120 %(BasicExecDeclare)s 121}; 122}}; 123 124def template NeonRegImmOpDeclare {{ 125template <class _Element> 126class %(class_name)s : public %(base_class)s 127{ 128 protected: 129 typedef _Element Element; 130 public: 131 // Constructor 132 %(class_name)s(ExtMachInst machInst, IntRegIndex _dest, uint64_t _imm) 133 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, _dest, _imm) 134 { 135 %(constructor)s; 136 if (!(condCode == COND_AL || condCode == COND_UC)) { 137 for (int x = 0; x < _numDestRegs; x++) { 138 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 139 } 140 } 141 } 142 143 %(BasicExecDeclare)s 144}; 145}}; 146 147def template NeonRegRegOpDeclare {{ 148template <class _Element> 149class %(class_name)s : public %(base_class)s 150{ 151 protected: 152 typedef _Element Element; 153 public: 154 // Constructor 155 %(class_name)s(ExtMachInst machInst, 156 IntRegIndex _dest, IntRegIndex _op1) 157 : %(base_class)s("%(mnemonic)s", machInst, %(op_class)s, 158 _dest, _op1) 159 { 160 %(constructor)s; 161 if (!(condCode == COND_AL || condCode == COND_UC)) { 162 for (int x = 0; x < _numDestRegs; x++) { 163 _srcRegIdx[_numSrcRegs++] = _destRegIdx[x]; 164 } 165 } 166 } 167 168 %(BasicExecDeclare)s 169}; 170}}; 171 172def template NeonExecDeclare {{ 173 template 174 Fault %(class_name)s<%(targs)s>::execute( 175 %(CPU_exec_context)s *, Trace::InstRecord *) const; 176}}; 177 178output header {{ 179 template <class T> 180 // Implement a less-than-zero function: ltz() 181 // this function exists because some versions of GCC complain when a 182 // comparison is done between a unsigned variable and 0 and for GCC 4.2 183 // there is no way to disable this warning 184 inline bool ltz(T t); 185 186 template <> 187 inline bool ltz(uint8_t) { return false; } 188 template <> 189 inline bool ltz(uint16_t) { return false; } 190 template <> 191 inline bool ltz(uint32_t) { return false; } 192 template <> 193 inline bool ltz(uint64_t) { return false; } 194 template <> 195 inline bool ltz(int8_t v) { return v < 0; } 196 template <> 197 inline bool ltz(int16_t v) { return v < 0; } 198 template <> 199 inline bool ltz(int32_t v) { return v < 0; } 200 template <> 201 inline bool ltz(int64_t v) { return v < 0; } 202}}; 203 204def template NeonEqualRegExecute {{ 205 template <class Element> 206 Fault %(class_name)s<Element>::execute(%(CPU_exec_context)s *xc, 207 Trace::InstRecord *traceData) const 208 { 209 Fault fault = NoFault; 210 %(op_decl)s; 211 %(op_rd)s; 212 213 const unsigned rCount = %(r_count)d; 214 const unsigned eCount = rCount * sizeof(FloatRegBits) / sizeof(Element); 215 216 union RegVect { 217 FloatRegBits regs[rCount]; 218 Element elements[eCount]; 219 }; 220 221 if (%(predicate_test)s) 222 { 223 %(code)s; 224 if (fault == NoFault) 225 { 226 %(op_wb)s; 227 } 228 } else { 229 xc->setPredicate(false); 230 } 231 232 return fault; 233 } 234}}; 235 236output header {{ 237 template <typename T> 238 struct bigger_type_t; 239 240 template<> struct bigger_type_t<uint8_t> { typedef uint16_t type; }; 241 template<> struct bigger_type_t<uint16_t> { typedef uint32_t type; }; 242 template<> struct bigger_type_t<uint32_t> { typedef uint64_t type; }; 243 244 template<> struct bigger_type_t<int8_t> { typedef int16_t type; }; 245 template<> struct bigger_type_t<int16_t> { typedef int32_t type; }; 246 template<> struct bigger_type_t<int32_t> { typedef int64_t type; }; 247}}; 248 249def template NeonUnequalRegExecute {{ 250 template <class Element> 251 Fault %(class_name)s<Element>::execute(%(CPU_exec_context)s *xc, 252 Trace::InstRecord *traceData) const 253 { 254 typedef typename bigger_type_t<Element>::type BigElement; 255 Fault fault = NoFault; 256 %(op_decl)s; 257 %(op_rd)s; 258 259 const unsigned rCount = %(r_count)d; 260 const unsigned eCount = rCount * sizeof(FloatRegBits) / sizeof(Element); 261 262 union RegVect { 263 FloatRegBits regs[rCount]; 264 Element elements[eCount]; 265 BigElement bigElements[eCount / 2]; 266 }; 267 268 union BigRegVect { 269 FloatRegBits regs[2 * rCount]; 270 BigElement elements[eCount]; 271 }; 272 273 if (%(predicate_test)s) 274 { 275 %(code)s; 276 if (fault == NoFault) 277 { 278 %(op_wb)s; 279 } 280 } else { 281 xc->setPredicate(false); 282 } 283 284 return fault; 285 } 286}}; 287