misc.isa revision 7422
17199Sgblack@eecs.umich.edu// -*- mode:c++ -*-
27199Sgblack@eecs.umich.edu
37199Sgblack@eecs.umich.edu// Copyright (c) 2010 ARM Limited
47199Sgblack@eecs.umich.edu// All rights reserved
57199Sgblack@eecs.umich.edu//
67199Sgblack@eecs.umich.edu// The license below extends only to copyright in the software and shall
77199Sgblack@eecs.umich.edu// not be construed as granting a license to any other intellectual
87199Sgblack@eecs.umich.edu// property including but not limited to intellectual property relating
97199Sgblack@eecs.umich.edu// to a hardware implementation of the functionality of the software
107199Sgblack@eecs.umich.edu// licensed hereunder.  You may use the software subject to the license
117199Sgblack@eecs.umich.edu// terms below provided that you ensure that this notice is replicated
127199Sgblack@eecs.umich.edu// unmodified and in its entirety in all distributions of the software,
137199Sgblack@eecs.umich.edu// modified or unmodified, in source code or in binary form.
147199Sgblack@eecs.umich.edu//
157199Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without
167199Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are
177199Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright
187199Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer;
197199Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright
207199Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the
217199Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution;
227199Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its
237199Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from
247199Sgblack@eecs.umich.edu// this software without specific prior written permission.
257199Sgblack@eecs.umich.edu//
267199Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
277199Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
287199Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
297199Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
307199Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
317199Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
327199Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
337199Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
347199Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
357199Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
367199Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
377199Sgblack@eecs.umich.edu//
387199Sgblack@eecs.umich.edu// Authors: Gabe Black
397199Sgblack@eecs.umich.edu
407199Sgblack@eecs.umich.edulet {{
417199Sgblack@eecs.umich.edu
427199Sgblack@eecs.umich.edu    svcCode = '''
437199Sgblack@eecs.umich.edu#if FULL_SYSTEM
447199Sgblack@eecs.umich.edu    fault = new SupervisorCall;
457199Sgblack@eecs.umich.edu#else
467199Sgblack@eecs.umich.edu    fault = new SupervisorCall(machInst);
477199Sgblack@eecs.umich.edu#endif
487199Sgblack@eecs.umich.edu    '''
497199Sgblack@eecs.umich.edu
507199Sgblack@eecs.umich.edu    svcIop = InstObjParams("svc", "Svc", "PredOp",
517199Sgblack@eecs.umich.edu                           { "code": svcCode,
527199Sgblack@eecs.umich.edu                             "predicate_test": predicateTest }, ["IsSyscall"])
537199Sgblack@eecs.umich.edu    header_output = BasicDeclare.subst(svcIop)
547199Sgblack@eecs.umich.edu    decoder_output = BasicConstructor.subst(svcIop)
557199Sgblack@eecs.umich.edu    exec_output = PredOpExecute.subst(svcIop)
567199Sgblack@eecs.umich.edu
577199Sgblack@eecs.umich.edu}};
587202Sgblack@eecs.umich.edu
597202Sgblack@eecs.umich.edulet {{
607202Sgblack@eecs.umich.edu
617202Sgblack@eecs.umich.edu    header_output = decoder_output = exec_output = ""
627202Sgblack@eecs.umich.edu
637202Sgblack@eecs.umich.edu    mrsCpsrCode = "Dest = (Cpsr | CondCodes) & 0xF8FF03DF"
647202Sgblack@eecs.umich.edu    mrsCpsrIop = InstObjParams("mrs", "MrsCpsr", "MrsOp",
657202Sgblack@eecs.umich.edu                               { "code": mrsCpsrCode,
667422Sgblack@eecs.umich.edu                                 "predicate_test": condPredicateTest }, [])
677202Sgblack@eecs.umich.edu    header_output += MrsDeclare.subst(mrsCpsrIop)
687202Sgblack@eecs.umich.edu    decoder_output += MrsConstructor.subst(mrsCpsrIop)
697202Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(mrsCpsrIop)
707202Sgblack@eecs.umich.edu
717202Sgblack@eecs.umich.edu    mrsSpsrCode = "Dest = Spsr"
727202Sgblack@eecs.umich.edu    mrsSpsrIop = InstObjParams("mrs", "MrsSpsr", "MrsOp",
737202Sgblack@eecs.umich.edu                               { "code": mrsSpsrCode,
747202Sgblack@eecs.umich.edu                                 "predicate_test": predicateTest }, [])
757202Sgblack@eecs.umich.edu    header_output += MrsDeclare.subst(mrsSpsrIop)
767202Sgblack@eecs.umich.edu    decoder_output += MrsConstructor.subst(mrsSpsrIop)
777202Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(mrsSpsrIop)
787202Sgblack@eecs.umich.edu
797202Sgblack@eecs.umich.edu    msrCpsrRegCode = '''
807400SAli.Saidi@ARM.com        SCTLR sctlr = Sctlr;
817202Sgblack@eecs.umich.edu        uint32_t newCpsr =
827400SAli.Saidi@ARM.com            cpsrWriteByInstr(Cpsr | CondCodes, Op1, byteMask, false, sctlr.nmfi);
837202Sgblack@eecs.umich.edu        Cpsr = ~CondCodesMask & newCpsr;
847202Sgblack@eecs.umich.edu        CondCodes = CondCodesMask & newCpsr;
857202Sgblack@eecs.umich.edu    '''
867202Sgblack@eecs.umich.edu    msrCpsrRegIop = InstObjParams("msr", "MsrCpsrReg", "MsrRegOp",
877202Sgblack@eecs.umich.edu                                  { "code": msrCpsrRegCode,
887422Sgblack@eecs.umich.edu                                    "predicate_test": condPredicateTest }, [])
897202Sgblack@eecs.umich.edu    header_output += MsrRegDeclare.subst(msrCpsrRegIop)
907202Sgblack@eecs.umich.edu    decoder_output += MsrRegConstructor.subst(msrCpsrRegIop)
917202Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(msrCpsrRegIop)
927202Sgblack@eecs.umich.edu
937202Sgblack@eecs.umich.edu    msrSpsrRegCode = "Spsr = spsrWriteByInstr(Spsr, Op1, byteMask, false);"
947202Sgblack@eecs.umich.edu    msrSpsrRegIop = InstObjParams("msr", "MsrSpsrReg", "MsrRegOp",
957202Sgblack@eecs.umich.edu                                  { "code": msrSpsrRegCode,
967202Sgblack@eecs.umich.edu                                    "predicate_test": predicateTest }, [])
977202Sgblack@eecs.umich.edu    header_output += MsrRegDeclare.subst(msrSpsrRegIop)
987202Sgblack@eecs.umich.edu    decoder_output += MsrRegConstructor.subst(msrSpsrRegIop)
997202Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(msrSpsrRegIop)
1007202Sgblack@eecs.umich.edu
1017202Sgblack@eecs.umich.edu    msrCpsrImmCode = '''
1027400SAli.Saidi@ARM.com        SCTLR sctlr = Sctlr;
1037202Sgblack@eecs.umich.edu        uint32_t newCpsr =
1047400SAli.Saidi@ARM.com            cpsrWriteByInstr(Cpsr | CondCodes, imm, byteMask, false, sctlr.nmfi);
1057202Sgblack@eecs.umich.edu        Cpsr = ~CondCodesMask & newCpsr;
1067202Sgblack@eecs.umich.edu        CondCodes = CondCodesMask & newCpsr;
1077202Sgblack@eecs.umich.edu    '''
1087202Sgblack@eecs.umich.edu    msrCpsrImmIop = InstObjParams("msr", "MsrCpsrImm", "MsrImmOp",
1097202Sgblack@eecs.umich.edu                                  { "code": msrCpsrImmCode,
1107422Sgblack@eecs.umich.edu                                    "predicate_test": condPredicateTest }, [])
1117202Sgblack@eecs.umich.edu    header_output += MsrImmDeclare.subst(msrCpsrImmIop)
1127202Sgblack@eecs.umich.edu    decoder_output += MsrImmConstructor.subst(msrCpsrImmIop)
1137202Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(msrCpsrImmIop)
1147202Sgblack@eecs.umich.edu
1157202Sgblack@eecs.umich.edu    msrSpsrImmCode = "Spsr = spsrWriteByInstr(Spsr, imm, byteMask, false);"
1167202Sgblack@eecs.umich.edu    msrSpsrImmIop = InstObjParams("msr", "MsrSpsrImm", "MsrImmOp",
1177202Sgblack@eecs.umich.edu                                  { "code": msrSpsrImmCode,
1187202Sgblack@eecs.umich.edu                                    "predicate_test": predicateTest }, [])
1197202Sgblack@eecs.umich.edu    header_output += MsrImmDeclare.subst(msrSpsrImmIop)
1207202Sgblack@eecs.umich.edu    decoder_output += MsrImmConstructor.subst(msrSpsrImmIop)
1217202Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(msrSpsrImmIop)
1227209Sgblack@eecs.umich.edu
1237209Sgblack@eecs.umich.edu    revCode = '''
1247209Sgblack@eecs.umich.edu    uint32_t val = Op1;
1257209Sgblack@eecs.umich.edu    Dest = swap_byte(val);
1267209Sgblack@eecs.umich.edu    '''
1277261Sgblack@eecs.umich.edu    revIop = InstObjParams("rev", "Rev", "RegRegOp",
1287209Sgblack@eecs.umich.edu                           { "code": revCode,
1297209Sgblack@eecs.umich.edu                             "predicate_test": predicateTest }, [])
1307261Sgblack@eecs.umich.edu    header_output += RegRegOpDeclare.subst(revIop)
1317261Sgblack@eecs.umich.edu    decoder_output += RegRegOpConstructor.subst(revIop)
1327209Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(revIop)
1337209Sgblack@eecs.umich.edu
1347209Sgblack@eecs.umich.edu    rev16Code = '''
1357209Sgblack@eecs.umich.edu    uint32_t val = Op1;
1367209Sgblack@eecs.umich.edu    Dest = (bits(val, 15, 8) << 0) |
1377209Sgblack@eecs.umich.edu           (bits(val, 7, 0) << 8) |
1387209Sgblack@eecs.umich.edu           (bits(val, 31, 24) << 16) |
1397209Sgblack@eecs.umich.edu           (bits(val, 23, 16) << 24);
1407209Sgblack@eecs.umich.edu    '''
1417261Sgblack@eecs.umich.edu    rev16Iop = InstObjParams("rev16", "Rev16", "RegRegOp",
1427209Sgblack@eecs.umich.edu                             { "code": rev16Code,
1437209Sgblack@eecs.umich.edu                               "predicate_test": predicateTest }, [])
1447261Sgblack@eecs.umich.edu    header_output += RegRegOpDeclare.subst(rev16Iop)
1457261Sgblack@eecs.umich.edu    decoder_output += RegRegOpConstructor.subst(rev16Iop)
1467209Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(rev16Iop)
1477209Sgblack@eecs.umich.edu
1487209Sgblack@eecs.umich.edu    revshCode = '''
1497209Sgblack@eecs.umich.edu    uint16_t val = Op1;
1507209Sgblack@eecs.umich.edu    Dest = sext<16>(swap_byte(val));
1517209Sgblack@eecs.umich.edu    '''
1527261Sgblack@eecs.umich.edu    revshIop = InstObjParams("revsh", "Revsh", "RegRegOp",
1537209Sgblack@eecs.umich.edu                             { "code": revshCode,
1547209Sgblack@eecs.umich.edu                               "predicate_test": predicateTest }, [])
1557261Sgblack@eecs.umich.edu    header_output += RegRegOpDeclare.subst(revshIop)
1567261Sgblack@eecs.umich.edu    decoder_output += RegRegOpConstructor.subst(revshIop)
1577209Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(revshIop)
1587226Sgblack@eecs.umich.edu
1597249Sgblack@eecs.umich.edu    rbitCode = '''
1607249Sgblack@eecs.umich.edu    uint8_t *opBytes = (uint8_t *)&Op1;
1617249Sgblack@eecs.umich.edu    uint32_t resTemp;
1627249Sgblack@eecs.umich.edu    uint8_t *destBytes = (uint8_t *)&resTemp;
1637249Sgblack@eecs.umich.edu    // This reverses the bytes and bits of the input, or so says the
1647249Sgblack@eecs.umich.edu    // internet.
1657249Sgblack@eecs.umich.edu    for (int i = 0; i < 4; i++) {
1667249Sgblack@eecs.umich.edu        uint32_t temp = opBytes[i];
1677249Sgblack@eecs.umich.edu        temp = (temp * 0x0802 & 0x22110) | (temp * 0x8020 & 0x88440);
1687249Sgblack@eecs.umich.edu        destBytes[3 - i] = (temp * 0x10101) >> 16;
1697249Sgblack@eecs.umich.edu    }
1707249Sgblack@eecs.umich.edu    Dest = resTemp;
1717249Sgblack@eecs.umich.edu    '''
1727261Sgblack@eecs.umich.edu    rbitIop = InstObjParams("rbit", "Rbit", "RegRegOp",
1737249Sgblack@eecs.umich.edu                            { "code": rbitCode,
1747249Sgblack@eecs.umich.edu                              "predicate_test": predicateTest }, [])
1757261Sgblack@eecs.umich.edu    header_output += RegRegOpDeclare.subst(rbitIop)
1767261Sgblack@eecs.umich.edu    decoder_output += RegRegOpConstructor.subst(rbitIop)
1777249Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(rbitIop)
1787249Sgblack@eecs.umich.edu
1797251Sgblack@eecs.umich.edu    clzCode = '''
1807251Sgblack@eecs.umich.edu        Dest = (Op1 == 0) ? 32 : (31 - findMsbSet(Op1));
1817251Sgblack@eecs.umich.edu    '''
1827261Sgblack@eecs.umich.edu    clzIop = InstObjParams("clz", "Clz", "RegRegOp",
1837251Sgblack@eecs.umich.edu                           { "code": clzCode,
1847251Sgblack@eecs.umich.edu                             "predicate_test": predicateTest }, [])
1857261Sgblack@eecs.umich.edu    header_output += RegRegOpDeclare.subst(clzIop)
1867261Sgblack@eecs.umich.edu    decoder_output += RegRegOpConstructor.subst(clzIop)
1877251Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(clzIop)
1887251Sgblack@eecs.umich.edu
1897226Sgblack@eecs.umich.edu    ssatCode = '''
1907226Sgblack@eecs.umich.edu        int32_t operand = shift_rm_imm(Op1, shiftAmt, shiftType, 0);
1917226Sgblack@eecs.umich.edu        int32_t res;
1927232Sgblack@eecs.umich.edu        if (satInt(res, operand, imm))
1937226Sgblack@eecs.umich.edu            CondCodes = CondCodes | (1 << 27);
1947226Sgblack@eecs.umich.edu        else
1957226Sgblack@eecs.umich.edu            CondCodes = CondCodes;
1967226Sgblack@eecs.umich.edu        Dest = res;
1977226Sgblack@eecs.umich.edu    '''
1987232Sgblack@eecs.umich.edu    ssatIop = InstObjParams("ssat", "Ssat", "RegImmRegShiftOp",
1997226Sgblack@eecs.umich.edu                            { "code": ssatCode,
2007422Sgblack@eecs.umich.edu                              "predicate_test": condPredicateTest }, [])
2017232Sgblack@eecs.umich.edu    header_output += RegImmRegShiftOpDeclare.subst(ssatIop)
2027232Sgblack@eecs.umich.edu    decoder_output += RegImmRegShiftOpConstructor.subst(ssatIop)
2037226Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(ssatIop)
2047226Sgblack@eecs.umich.edu
2057226Sgblack@eecs.umich.edu    usatCode = '''
2067226Sgblack@eecs.umich.edu        int32_t operand = shift_rm_imm(Op1, shiftAmt, shiftType, 0);
2077226Sgblack@eecs.umich.edu        int32_t res;
2087232Sgblack@eecs.umich.edu        if (uSatInt(res, operand, imm))
2097226Sgblack@eecs.umich.edu            CondCodes = CondCodes | (1 << 27);
2107226Sgblack@eecs.umich.edu        else
2117226Sgblack@eecs.umich.edu            CondCodes = CondCodes;
2127226Sgblack@eecs.umich.edu        Dest = res;
2137226Sgblack@eecs.umich.edu    '''
2147232Sgblack@eecs.umich.edu    usatIop = InstObjParams("usat", "Usat", "RegImmRegShiftOp",
2157226Sgblack@eecs.umich.edu                            { "code": usatCode,
2167422Sgblack@eecs.umich.edu                              "predicate_test": condPredicateTest }, [])
2177232Sgblack@eecs.umich.edu    header_output += RegImmRegShiftOpDeclare.subst(usatIop)
2187232Sgblack@eecs.umich.edu    decoder_output += RegImmRegShiftOpConstructor.subst(usatIop)
2197226Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(usatIop)
2207226Sgblack@eecs.umich.edu
2217226Sgblack@eecs.umich.edu    ssat16Code = '''
2227226Sgblack@eecs.umich.edu        int32_t res;
2237226Sgblack@eecs.umich.edu        uint32_t resTemp = 0;
2247226Sgblack@eecs.umich.edu        CondCodes = CondCodes;
2257226Sgblack@eecs.umich.edu        int32_t argLow = sext<16>(bits(Op1, 15, 0));
2267226Sgblack@eecs.umich.edu        int32_t argHigh = sext<16>(bits(Op1, 31, 16));
2277232Sgblack@eecs.umich.edu        if (satInt(res, argLow, imm))
2287226Sgblack@eecs.umich.edu            CondCodes = CondCodes | (1 << 27);
2297226Sgblack@eecs.umich.edu        replaceBits(resTemp, 15, 0, res);
2307232Sgblack@eecs.umich.edu        if (satInt(res, argHigh, imm))
2317226Sgblack@eecs.umich.edu            CondCodes = CondCodes | (1 << 27);
2327226Sgblack@eecs.umich.edu        replaceBits(resTemp, 31, 16, res);
2337226Sgblack@eecs.umich.edu        Dest = resTemp;
2347226Sgblack@eecs.umich.edu    '''
2357232Sgblack@eecs.umich.edu    ssat16Iop = InstObjParams("ssat16", "Ssat16", "RegImmRegOp",
2367226Sgblack@eecs.umich.edu                              { "code": ssat16Code,
2377422Sgblack@eecs.umich.edu                                "predicate_test": condPredicateTest }, [])
2387232Sgblack@eecs.umich.edu    header_output += RegImmRegOpDeclare.subst(ssat16Iop)
2397232Sgblack@eecs.umich.edu    decoder_output += RegImmRegOpConstructor.subst(ssat16Iop)
2407226Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(ssat16Iop)
2417226Sgblack@eecs.umich.edu
2427226Sgblack@eecs.umich.edu    usat16Code = '''
2437226Sgblack@eecs.umich.edu        int32_t res;
2447226Sgblack@eecs.umich.edu        uint32_t resTemp = 0;
2457226Sgblack@eecs.umich.edu        CondCodes = CondCodes;
2467226Sgblack@eecs.umich.edu        int32_t argLow = sext<16>(bits(Op1, 15, 0));
2477226Sgblack@eecs.umich.edu        int32_t argHigh = sext<16>(bits(Op1, 31, 16));
2487232Sgblack@eecs.umich.edu        if (uSatInt(res, argLow, imm))
2497226Sgblack@eecs.umich.edu            CondCodes = CondCodes | (1 << 27);
2507226Sgblack@eecs.umich.edu        replaceBits(resTemp, 15, 0, res);
2517232Sgblack@eecs.umich.edu        if (uSatInt(res, argHigh, imm))
2527226Sgblack@eecs.umich.edu            CondCodes = CondCodes | (1 << 27);
2537226Sgblack@eecs.umich.edu        replaceBits(resTemp, 31, 16, res);
2547226Sgblack@eecs.umich.edu        Dest = resTemp;
2557226Sgblack@eecs.umich.edu    '''
2567232Sgblack@eecs.umich.edu    usat16Iop = InstObjParams("usat16", "Usat16", "RegImmRegOp",
2577226Sgblack@eecs.umich.edu                              { "code": usat16Code,
2587422Sgblack@eecs.umich.edu                                "predicate_test": condPredicateTest }, [])
2597232Sgblack@eecs.umich.edu    header_output += RegImmRegOpDeclare.subst(usat16Iop)
2607232Sgblack@eecs.umich.edu    decoder_output += RegImmRegOpConstructor.subst(usat16Iop)
2617226Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(usat16Iop)
2627234Sgblack@eecs.umich.edu
2637234Sgblack@eecs.umich.edu    sxtbIop = InstObjParams("sxtb", "Sxtb", "RegImmRegOp",
2647234Sgblack@eecs.umich.edu                            { "code":
2657234Sgblack@eecs.umich.edu                              "Dest = sext<8>((uint8_t)(Op1.ud >> imm));",
2667234Sgblack@eecs.umich.edu                              "predicate_test": predicateTest }, [])
2677234Sgblack@eecs.umich.edu    header_output += RegImmRegOpDeclare.subst(sxtbIop)
2687234Sgblack@eecs.umich.edu    decoder_output += RegImmRegOpConstructor.subst(sxtbIop)
2697234Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(sxtbIop)
2707234Sgblack@eecs.umich.edu
2717234Sgblack@eecs.umich.edu    sxtabIop = InstObjParams("sxtab", "Sxtab", "RegRegRegImmOp",
2727234Sgblack@eecs.umich.edu                             { "code":
2737234Sgblack@eecs.umich.edu                               '''
2747234Sgblack@eecs.umich.edu                                   Dest = sext<8>((uint8_t)(Op2.ud >> imm)) +
2757234Sgblack@eecs.umich.edu                                          Op1;
2767234Sgblack@eecs.umich.edu                               ''',
2777234Sgblack@eecs.umich.edu                               "predicate_test": predicateTest }, [])
2787234Sgblack@eecs.umich.edu    header_output += RegRegRegImmOpDeclare.subst(sxtabIop)
2797234Sgblack@eecs.umich.edu    decoder_output += RegRegRegImmOpConstructor.subst(sxtabIop)
2807234Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(sxtabIop)
2817234Sgblack@eecs.umich.edu
2827234Sgblack@eecs.umich.edu    sxtb16Code = '''
2837234Sgblack@eecs.umich.edu    uint32_t resTemp = 0;
2847234Sgblack@eecs.umich.edu    replaceBits(resTemp, 15, 0, sext<8>(bits(Op1, imm + 7, imm)));
2857234Sgblack@eecs.umich.edu    replaceBits(resTemp, 31, 16,
2867234Sgblack@eecs.umich.edu                sext<8>(bits(Op1, (imm + 23) % 32, (imm + 16) % 32)));
2877234Sgblack@eecs.umich.edu    Dest = resTemp;
2887234Sgblack@eecs.umich.edu    '''
2897234Sgblack@eecs.umich.edu    sxtb16Iop = InstObjParams("sxtb16", "Sxtb16", "RegImmRegOp",
2907234Sgblack@eecs.umich.edu                              { "code": sxtb16Code,
2917234Sgblack@eecs.umich.edu                                "predicate_test": predicateTest }, [])
2927234Sgblack@eecs.umich.edu    header_output += RegImmRegOpDeclare.subst(sxtb16Iop)
2937234Sgblack@eecs.umich.edu    decoder_output += RegImmRegOpConstructor.subst(sxtb16Iop)
2947234Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(sxtb16Iop)
2957234Sgblack@eecs.umich.edu
2967234Sgblack@eecs.umich.edu    sxtab16Code = '''
2977234Sgblack@eecs.umich.edu    uint32_t resTemp = 0;
2987234Sgblack@eecs.umich.edu    replaceBits(resTemp, 15, 0, sext<8>(bits(Op2, imm + 7, imm)) +
2997234Sgblack@eecs.umich.edu                                        bits(Op1, 15, 0));
3007234Sgblack@eecs.umich.edu    replaceBits(resTemp, 31, 16,
3017234Sgblack@eecs.umich.edu                sext<8>(bits(Op2, (imm + 23) % 32, (imm + 16) % 32)) +
3027234Sgblack@eecs.umich.edu                bits(Op1, 31, 16));
3037234Sgblack@eecs.umich.edu    Dest = resTemp;
3047234Sgblack@eecs.umich.edu    '''
3057234Sgblack@eecs.umich.edu    sxtab16Iop = InstObjParams("sxtab16", "Sxtab16", "RegRegRegImmOp",
3067234Sgblack@eecs.umich.edu                               { "code": sxtab16Code,
3077234Sgblack@eecs.umich.edu                                 "predicate_test": predicateTest }, [])
3087234Sgblack@eecs.umich.edu    header_output += RegRegRegImmOpDeclare.subst(sxtab16Iop)
3097234Sgblack@eecs.umich.edu    decoder_output += RegRegRegImmOpConstructor.subst(sxtab16Iop)
3107234Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(sxtab16Iop)
3117234Sgblack@eecs.umich.edu
3127234Sgblack@eecs.umich.edu    sxthCode = '''
3137234Sgblack@eecs.umich.edu    uint64_t rotated = (uint32_t)Op1;
3147234Sgblack@eecs.umich.edu    rotated = (rotated | (rotated << 32)) >> imm;
3157234Sgblack@eecs.umich.edu    Dest = sext<16>((uint16_t)rotated);
3167234Sgblack@eecs.umich.edu    '''
3177234Sgblack@eecs.umich.edu    sxthIop = InstObjParams("sxth", "Sxth", "RegImmRegOp",
3187234Sgblack@eecs.umich.edu                              { "code": sxthCode,
3197234Sgblack@eecs.umich.edu                                "predicate_test": predicateTest }, [])
3207234Sgblack@eecs.umich.edu    header_output += RegImmRegOpDeclare.subst(sxthIop)
3217234Sgblack@eecs.umich.edu    decoder_output += RegImmRegOpConstructor.subst(sxthIop)
3227234Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(sxthIop)
3237234Sgblack@eecs.umich.edu
3247234Sgblack@eecs.umich.edu    sxtahCode = '''
3257234Sgblack@eecs.umich.edu    uint64_t rotated = (uint32_t)Op2;
3267234Sgblack@eecs.umich.edu    rotated = (rotated | (rotated << 32)) >> imm;
3277234Sgblack@eecs.umich.edu    Dest = sext<16>((uint16_t)rotated) + Op1;
3287234Sgblack@eecs.umich.edu    '''
3297234Sgblack@eecs.umich.edu    sxtahIop = InstObjParams("sxtah", "Sxtah", "RegRegRegImmOp",
3307234Sgblack@eecs.umich.edu                             { "code": sxtahCode,
3317234Sgblack@eecs.umich.edu                               "predicate_test": predicateTest }, [])
3327234Sgblack@eecs.umich.edu    header_output += RegRegRegImmOpDeclare.subst(sxtahIop)
3337234Sgblack@eecs.umich.edu    decoder_output += RegRegRegImmOpConstructor.subst(sxtahIop)
3347234Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(sxtahIop)
3357234Sgblack@eecs.umich.edu
3367234Sgblack@eecs.umich.edu    uxtbIop = InstObjParams("uxtb", "Uxtb", "RegImmRegOp",
3377234Sgblack@eecs.umich.edu                            { "code": "Dest = (uint8_t)(Op1.ud >> imm);",
3387234Sgblack@eecs.umich.edu                              "predicate_test": predicateTest }, [])
3397234Sgblack@eecs.umich.edu    header_output += RegImmRegOpDeclare.subst(uxtbIop)
3407234Sgblack@eecs.umich.edu    decoder_output += RegImmRegOpConstructor.subst(uxtbIop)
3417234Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(uxtbIop)
3427234Sgblack@eecs.umich.edu
3437234Sgblack@eecs.umich.edu    uxtabIop = InstObjParams("uxtab", "Uxtab", "RegRegRegImmOp",
3447234Sgblack@eecs.umich.edu                             { "code":
3457234Sgblack@eecs.umich.edu                               "Dest = (uint8_t)(Op2.ud >> imm) + Op1;",
3467234Sgblack@eecs.umich.edu                               "predicate_test": predicateTest }, [])
3477234Sgblack@eecs.umich.edu    header_output += RegRegRegImmOpDeclare.subst(uxtabIop)
3487234Sgblack@eecs.umich.edu    decoder_output += RegRegRegImmOpConstructor.subst(uxtabIop)
3497234Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(uxtabIop)
3507234Sgblack@eecs.umich.edu
3517234Sgblack@eecs.umich.edu    uxtb16Code = '''
3527234Sgblack@eecs.umich.edu    uint32_t resTemp = 0;
3537234Sgblack@eecs.umich.edu    replaceBits(resTemp, 15, 0, (uint8_t)(bits(Op1, imm + 7, imm)));
3547234Sgblack@eecs.umich.edu    replaceBits(resTemp, 31, 16,
3557234Sgblack@eecs.umich.edu                (uint8_t)(bits(Op1, (imm + 23) % 32, (imm + 16) % 32)));
3567234Sgblack@eecs.umich.edu    Dest = resTemp;
3577234Sgblack@eecs.umich.edu    '''
3587234Sgblack@eecs.umich.edu    uxtb16Iop = InstObjParams("uxtb16", "Uxtb16", "RegImmRegOp",
3597234Sgblack@eecs.umich.edu                              { "code": uxtb16Code,
3607234Sgblack@eecs.umich.edu                                "predicate_test": predicateTest }, [])
3617234Sgblack@eecs.umich.edu    header_output += RegImmRegOpDeclare.subst(uxtb16Iop)
3627234Sgblack@eecs.umich.edu    decoder_output += RegImmRegOpConstructor.subst(uxtb16Iop)
3637234Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(uxtb16Iop)
3647234Sgblack@eecs.umich.edu
3657234Sgblack@eecs.umich.edu    uxtab16Code = '''
3667234Sgblack@eecs.umich.edu    uint32_t resTemp = 0;
3677234Sgblack@eecs.umich.edu    replaceBits(resTemp, 15, 0, (uint8_t)(bits(Op2, imm + 7, imm)) +
3687234Sgblack@eecs.umich.edu                                        bits(Op1, 15, 0));
3697234Sgblack@eecs.umich.edu    replaceBits(resTemp, 31, 16,
3707234Sgblack@eecs.umich.edu                (uint8_t)(bits(Op2, (imm + 23) % 32, (imm + 16) % 32)) +
3717234Sgblack@eecs.umich.edu                bits(Op1, 31, 16));
3727234Sgblack@eecs.umich.edu    Dest = resTemp;
3737234Sgblack@eecs.umich.edu    '''
3747234Sgblack@eecs.umich.edu    uxtab16Iop = InstObjParams("uxtab16", "Uxtab16", "RegRegRegImmOp",
3757234Sgblack@eecs.umich.edu                               { "code": uxtab16Code,
3767234Sgblack@eecs.umich.edu                                 "predicate_test": predicateTest }, [])
3777234Sgblack@eecs.umich.edu    header_output += RegRegRegImmOpDeclare.subst(uxtab16Iop)
3787234Sgblack@eecs.umich.edu    decoder_output += RegRegRegImmOpConstructor.subst(uxtab16Iop)
3797234Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(uxtab16Iop)
3807234Sgblack@eecs.umich.edu
3817234Sgblack@eecs.umich.edu    uxthCode = '''
3827234Sgblack@eecs.umich.edu    uint64_t rotated = (uint32_t)Op1;
3837234Sgblack@eecs.umich.edu    rotated = (rotated | (rotated << 32)) >> imm;
3847234Sgblack@eecs.umich.edu    Dest = (uint16_t)rotated;
3857234Sgblack@eecs.umich.edu    '''
3867234Sgblack@eecs.umich.edu    uxthIop = InstObjParams("uxth", "Uxth", "RegImmRegOp",
3877234Sgblack@eecs.umich.edu                              { "code": uxthCode,
3887234Sgblack@eecs.umich.edu                                "predicate_test": predicateTest }, [])
3897234Sgblack@eecs.umich.edu    header_output += RegImmRegOpDeclare.subst(uxthIop)
3907234Sgblack@eecs.umich.edu    decoder_output += RegImmRegOpConstructor.subst(uxthIop)
3917234Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(uxthIop)
3927234Sgblack@eecs.umich.edu
3937234Sgblack@eecs.umich.edu    uxtahCode = '''
3947234Sgblack@eecs.umich.edu    uint64_t rotated = (uint32_t)Op2;
3957234Sgblack@eecs.umich.edu    rotated = (rotated | (rotated << 32)) >> imm;
3967234Sgblack@eecs.umich.edu    Dest = (uint16_t)rotated + Op1;
3977234Sgblack@eecs.umich.edu    '''
3987234Sgblack@eecs.umich.edu    uxtahIop = InstObjParams("uxtah", "Uxtah", "RegRegRegImmOp",
3997234Sgblack@eecs.umich.edu                             { "code": uxtahCode,
4007234Sgblack@eecs.umich.edu                               "predicate_test": predicateTest }, [])
4017234Sgblack@eecs.umich.edu    header_output += RegRegRegImmOpDeclare.subst(uxtahIop)
4027234Sgblack@eecs.umich.edu    decoder_output += RegRegRegImmOpConstructor.subst(uxtahIop)
4037234Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(uxtahIop)
4047239Sgblack@eecs.umich.edu
4057239Sgblack@eecs.umich.edu    selCode = '''
4067239Sgblack@eecs.umich.edu        uint32_t resTemp = 0;
4077239Sgblack@eecs.umich.edu        for (unsigned i = 0; i < 4; i++) {
4087239Sgblack@eecs.umich.edu            int low = i * 8;
4097239Sgblack@eecs.umich.edu            int high = low + 7;
4107239Sgblack@eecs.umich.edu            replaceBits(resTemp, high, low,
4117239Sgblack@eecs.umich.edu                        bits(CondCodes, 16 + i) ?
4127239Sgblack@eecs.umich.edu                            bits(Op1, high, low) : bits(Op2, high, low));
4137239Sgblack@eecs.umich.edu        }
4147239Sgblack@eecs.umich.edu        Dest = resTemp;
4157239Sgblack@eecs.umich.edu    '''
4167239Sgblack@eecs.umich.edu    selIop = InstObjParams("sel", "Sel", "RegRegRegOp",
4177239Sgblack@eecs.umich.edu                           { "code": selCode,
4187422Sgblack@eecs.umich.edu                             "predicate_test": condPredicateTest }, [])
4197239Sgblack@eecs.umich.edu    header_output += RegRegRegOpDeclare.subst(selIop)
4207239Sgblack@eecs.umich.edu    decoder_output += RegRegRegOpConstructor.subst(selIop)
4217239Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(selIop)
4227242Sgblack@eecs.umich.edu
4237242Sgblack@eecs.umich.edu    usad8Code = '''
4247242Sgblack@eecs.umich.edu        uint32_t resTemp = 0;
4257242Sgblack@eecs.umich.edu        for (unsigned i = 0; i < 4; i++) {
4267242Sgblack@eecs.umich.edu            int low = i * 8;
4277242Sgblack@eecs.umich.edu            int high = low + 7;
4287242Sgblack@eecs.umich.edu            int32_t diff = bits(Op1, high, low) -
4297242Sgblack@eecs.umich.edu                           bits(Op2, high, low);
4307242Sgblack@eecs.umich.edu            resTemp += ((diff < 0) ? -diff : diff);
4317242Sgblack@eecs.umich.edu        }
4327242Sgblack@eecs.umich.edu        Dest = resTemp;
4337242Sgblack@eecs.umich.edu    '''
4347242Sgblack@eecs.umich.edu    usad8Iop = InstObjParams("usad8", "Usad8", "RegRegRegOp",
4357242Sgblack@eecs.umich.edu                             { "code": usad8Code,
4367242Sgblack@eecs.umich.edu                               "predicate_test": predicateTest }, [])
4377242Sgblack@eecs.umich.edu    header_output += RegRegRegOpDeclare.subst(usad8Iop)
4387242Sgblack@eecs.umich.edu    decoder_output += RegRegRegOpConstructor.subst(usad8Iop)
4397242Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(usad8Iop)
4407242Sgblack@eecs.umich.edu
4417242Sgblack@eecs.umich.edu    usada8Code = '''
4427242Sgblack@eecs.umich.edu        uint32_t resTemp = 0;
4437242Sgblack@eecs.umich.edu        for (unsigned i = 0; i < 4; i++) {
4447242Sgblack@eecs.umich.edu            int low = i * 8;
4457242Sgblack@eecs.umich.edu            int high = low + 7;
4467242Sgblack@eecs.umich.edu            int32_t diff = bits(Op1, high, low) -
4477242Sgblack@eecs.umich.edu                           bits(Op2, high, low);
4487242Sgblack@eecs.umich.edu            resTemp += ((diff < 0) ? -diff : diff);
4497242Sgblack@eecs.umich.edu        }
4507242Sgblack@eecs.umich.edu        Dest = Op3 + resTemp;
4517242Sgblack@eecs.umich.edu    '''
4527242Sgblack@eecs.umich.edu    usada8Iop = InstObjParams("usada8", "Usada8", "RegRegRegRegOp",
4537242Sgblack@eecs.umich.edu                              { "code": usada8Code,
4547242Sgblack@eecs.umich.edu                                "predicate_test": predicateTest }, [])
4557242Sgblack@eecs.umich.edu    header_output += RegRegRegRegOpDeclare.subst(usada8Iop)
4567242Sgblack@eecs.umich.edu    decoder_output += RegRegRegRegOpConstructor.subst(usada8Iop)
4577242Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(usada8Iop)
4587247Sgblack@eecs.umich.edu
4597410Sgblack@eecs.umich.edu    bkptIop = InstObjParams("bkpt", "BkptInst", "ArmStaticInst",
4607410Sgblack@eecs.umich.edu            "return new PrefetchAbort(PC, ArmFault::DebugEvent);")
4617410Sgblack@eecs.umich.edu    header_output += BasicDeclare.subst(bkptIop)
4627410Sgblack@eecs.umich.edu    decoder_output += BasicConstructor.subst(bkptIop)
4637410Sgblack@eecs.umich.edu    exec_output += BasicExecute.subst(bkptIop)
4647410Sgblack@eecs.umich.edu
4657408Sgblack@eecs.umich.edu    nopIop = InstObjParams("nop", "NopInst", "PredOp", \
4667408Sgblack@eecs.umich.edu            { "code" : "", "predicate_test" : predicateTest })
4677247Sgblack@eecs.umich.edu    header_output += BasicDeclare.subst(nopIop)
4687247Sgblack@eecs.umich.edu    decoder_output += BasicConstructor.subst(nopIop)
4697408Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(nopIop)
4707408Sgblack@eecs.umich.edu
4717418Sgblack@eecs.umich.edu    yieldIop = InstObjParams("yield", "YieldInst", "PredOp", \
4727418Sgblack@eecs.umich.edu            { "code" : "", "predicate_test" : predicateTest })
4737418Sgblack@eecs.umich.edu    header_output += BasicDeclare.subst(yieldIop)
4747418Sgblack@eecs.umich.edu    decoder_output += BasicConstructor.subst(yieldIop)
4757418Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(yieldIop)
4767418Sgblack@eecs.umich.edu
4777418Sgblack@eecs.umich.edu    wfeCode = '''
4787418Sgblack@eecs.umich.edu#if FULL_SYSTEM
4797418Sgblack@eecs.umich.edu    if (SevMailbox)
4807418Sgblack@eecs.umich.edu        SevMailbox = 0;
4817418Sgblack@eecs.umich.edu    else
4827418Sgblack@eecs.umich.edu        PseudoInst::quiesce(xc->tcBase());
4837418Sgblack@eecs.umich.edu#endif
4847418Sgblack@eecs.umich.edu    '''
4857418Sgblack@eecs.umich.edu    wfeIop = InstObjParams("wfe", "WfeInst", "PredOp", \
4867418Sgblack@eecs.umich.edu            { "code" : wfeCode, "predicate_test" : predicateTest },
4877418Sgblack@eecs.umich.edu            ["IsNonSpeculative", "IsQuiesce"])
4887418Sgblack@eecs.umich.edu    header_output += BasicDeclare.subst(wfeIop)
4897418Sgblack@eecs.umich.edu    decoder_output += BasicConstructor.subst(wfeIop)
4907418Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(wfeIop)
4917418Sgblack@eecs.umich.edu
4927418Sgblack@eecs.umich.edu    wfiCode = '''
4937418Sgblack@eecs.umich.edu#if FULL_SYSTEM
4947418Sgblack@eecs.umich.edu    PseudoInst::quiesce(xc->tcBase());
4957418Sgblack@eecs.umich.edu#endif
4967418Sgblack@eecs.umich.edu    '''
4977418Sgblack@eecs.umich.edu    wfiIop = InstObjParams("wfi", "WfiInst", "PredOp", \
4987418Sgblack@eecs.umich.edu            { "code" : wfiCode, "predicate_test" : predicateTest },
4997418Sgblack@eecs.umich.edu            ["IsNonSpeculative", "IsQuiesce"])
5007418Sgblack@eecs.umich.edu    header_output += BasicDeclare.subst(wfiIop)
5017418Sgblack@eecs.umich.edu    decoder_output += BasicConstructor.subst(wfiIop)
5027418Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(wfiIop)
5037418Sgblack@eecs.umich.edu
5047418Sgblack@eecs.umich.edu    sevCode = '''
5057418Sgblack@eecs.umich.edu    // Need a way for O3 to not scoreboard these accesses as pipe flushes.
5067418Sgblack@eecs.umich.edu    System *sys = xc->tcBase()->getSystemPtr();
5077418Sgblack@eecs.umich.edu    for (int x = 0; x < sys->numContexts(); x++) {
5087418Sgblack@eecs.umich.edu        ThreadContext *oc = sys->getThreadContext(x);
5097418Sgblack@eecs.umich.edu        oc->setMiscReg(MISCREG_SEV_MAILBOX, 1);
5107418Sgblack@eecs.umich.edu    }
5117418Sgblack@eecs.umich.edu    '''
5127418Sgblack@eecs.umich.edu    sevIop = InstObjParams("sev", "SevInst", "PredOp", \
5137418Sgblack@eecs.umich.edu            { "code" : sevCode, "predicate_test" : predicateTest },
5147418Sgblack@eecs.umich.edu            ["IsNonSpeculative", "IsQuiesce"])
5157418Sgblack@eecs.umich.edu    header_output += BasicDeclare.subst(sevIop)
5167418Sgblack@eecs.umich.edu    decoder_output += BasicConstructor.subst(sevIop)
5177418Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(sevIop)
5187418Sgblack@eecs.umich.edu
5197408Sgblack@eecs.umich.edu    itIop = InstObjParams("it", "ItInst", "PredOp", \
5207408Sgblack@eecs.umich.edu            { "code" : "Itstate = machInst.newItstate;",
5217408Sgblack@eecs.umich.edu              "predicate_test" : predicateTest })
5227408Sgblack@eecs.umich.edu    header_output += BasicDeclare.subst(itIop)
5237408Sgblack@eecs.umich.edu    decoder_output += BasicConstructor.subst(itIop)
5247408Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(itIop)
5257409Sgblack@eecs.umich.edu    unknownCode = '''
5267409Sgblack@eecs.umich.edu#if FULL_SYSTEM
5277409Sgblack@eecs.umich.edu            return new UndefinedInstruction;
5287409Sgblack@eecs.umich.edu#else
5297409Sgblack@eecs.umich.edu            return new UndefinedInstruction(machInst, true);
5307409Sgblack@eecs.umich.edu#endif
5317409Sgblack@eecs.umich.edu    '''
5327409Sgblack@eecs.umich.edu    unknownIop = InstObjParams("unknown", "Unknown", "UnknownOp", \
5337409Sgblack@eecs.umich.edu                               { "code": unknownCode,
5347409Sgblack@eecs.umich.edu                                 "predicate_test": predicateTest })
5357409Sgblack@eecs.umich.edu    header_output += BasicDeclare.subst(unknownIop)
5367409Sgblack@eecs.umich.edu    decoder_output += BasicConstructor.subst(unknownIop)
5377409Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(unknownIop)
5387254Sgblack@eecs.umich.edu
5397254Sgblack@eecs.umich.edu    ubfxCode = '''
5407254Sgblack@eecs.umich.edu        Dest = bits(Op1, imm2, imm1);
5417254Sgblack@eecs.umich.edu    '''
5427254Sgblack@eecs.umich.edu    ubfxIop = InstObjParams("ubfx", "Ubfx", "RegRegImmImmOp",
5437254Sgblack@eecs.umich.edu                            { "code": ubfxCode,
5447254Sgblack@eecs.umich.edu                              "predicate_test": predicateTest }, [])
5457254Sgblack@eecs.umich.edu    header_output += RegRegImmImmOpDeclare.subst(ubfxIop)
5467254Sgblack@eecs.umich.edu    decoder_output += RegRegImmImmOpConstructor.subst(ubfxIop)
5477254Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(ubfxIop)
5487254Sgblack@eecs.umich.edu
5497254Sgblack@eecs.umich.edu    sbfxCode = '''
5507254Sgblack@eecs.umich.edu        int32_t resTemp = bits(Op1, imm2, imm1);
5517254Sgblack@eecs.umich.edu        Dest = resTemp | -(resTemp & (1 << (imm2 - imm1)));
5527254Sgblack@eecs.umich.edu    '''
5537254Sgblack@eecs.umich.edu    sbfxIop = InstObjParams("sbfx", "Sbfx", "RegRegImmImmOp",
5547254Sgblack@eecs.umich.edu                            { "code": sbfxCode,
5557254Sgblack@eecs.umich.edu                              "predicate_test": predicateTest }, [])
5567254Sgblack@eecs.umich.edu    header_output += RegRegImmImmOpDeclare.subst(sbfxIop)
5577254Sgblack@eecs.umich.edu    decoder_output += RegRegImmImmOpConstructor.subst(sbfxIop)
5587254Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(sbfxIop)
5597257Sgblack@eecs.umich.edu
5607257Sgblack@eecs.umich.edu    bfcCode = '''
5617257Sgblack@eecs.umich.edu        Dest = Op1 & ~(mask(imm2 - imm1 + 1) << imm1);
5627257Sgblack@eecs.umich.edu    '''
5637257Sgblack@eecs.umich.edu    bfcIop = InstObjParams("bfc", "Bfc", "RegRegImmImmOp",
5647257Sgblack@eecs.umich.edu                           { "code": bfcCode,
5657257Sgblack@eecs.umich.edu                             "predicate_test": predicateTest }, [])
5667257Sgblack@eecs.umich.edu    header_output += RegRegImmImmOpDeclare.subst(bfcIop)
5677257Sgblack@eecs.umich.edu    decoder_output += RegRegImmImmOpConstructor.subst(bfcIop)
5687257Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(bfcIop)
5697257Sgblack@eecs.umich.edu
5707257Sgblack@eecs.umich.edu    bfiCode = '''
5717257Sgblack@eecs.umich.edu        uint32_t bitMask = (mask(imm2 - imm1 + 1) << imm1);
5727257Sgblack@eecs.umich.edu        Dest = ((Op1 << imm1) & bitMask) | (Dest & ~bitMask);
5737257Sgblack@eecs.umich.edu    '''
5747257Sgblack@eecs.umich.edu    bfiIop = InstObjParams("bfi", "Bfi", "RegRegImmImmOp",
5757257Sgblack@eecs.umich.edu                           { "code": bfiCode,
5767257Sgblack@eecs.umich.edu                             "predicate_test": predicateTest }, [])
5777257Sgblack@eecs.umich.edu    header_output += RegRegImmImmOpDeclare.subst(bfiIop)
5787257Sgblack@eecs.umich.edu    decoder_output += RegRegImmImmOpConstructor.subst(bfiIop)
5797257Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(bfiIop)
5807262Sgblack@eecs.umich.edu
5817347SAli.Saidi@ARM.com    mrc15code = '''
5827347SAli.Saidi@ARM.com    CPSR cpsr = Cpsr;
5837347SAli.Saidi@ARM.com    if (cpsr.mode == MODE_USER)
5847347SAli.Saidi@ARM.com#if FULL_SYSTEM
5857347SAli.Saidi@ARM.com        return new UndefinedInstruction;
5867347SAli.Saidi@ARM.com#else
5877347SAli.Saidi@ARM.com        return new UndefinedInstruction(false, mnemonic);
5887347SAli.Saidi@ARM.com#endif
5897347SAli.Saidi@ARM.com    Dest = MiscOp1;
5907347SAli.Saidi@ARM.com    '''
5917347SAli.Saidi@ARM.com
5927262Sgblack@eecs.umich.edu    mrc15Iop = InstObjParams("mrc", "Mrc15", "RegRegOp",
5937347SAli.Saidi@ARM.com                             { "code": mrc15code,
5947262Sgblack@eecs.umich.edu                               "predicate_test": predicateTest }, [])
5957262Sgblack@eecs.umich.edu    header_output += RegRegOpDeclare.subst(mrc15Iop)
5967262Sgblack@eecs.umich.edu    decoder_output += RegRegOpConstructor.subst(mrc15Iop)
5977262Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(mrc15Iop)
5987262Sgblack@eecs.umich.edu
5997347SAli.Saidi@ARM.com
6007347SAli.Saidi@ARM.com    mcr15code = '''
6017347SAli.Saidi@ARM.com    CPSR cpsr = Cpsr;
6027347SAli.Saidi@ARM.com    if (cpsr.mode == MODE_USER)
6037347SAli.Saidi@ARM.com#if FULL_SYSTEM
6047347SAli.Saidi@ARM.com        return new UndefinedInstruction;
6057347SAli.Saidi@ARM.com#else
6067347SAli.Saidi@ARM.com        return new UndefinedInstruction(false, mnemonic);
6077347SAli.Saidi@ARM.com#endif
6087347SAli.Saidi@ARM.com    MiscDest = Op1;
6097347SAli.Saidi@ARM.com    '''
6107262Sgblack@eecs.umich.edu    mcr15Iop = InstObjParams("mcr", "Mcr15", "RegRegOp",
6117347SAli.Saidi@ARM.com                             { "code": mcr15code,
6127262Sgblack@eecs.umich.edu                               "predicate_test": predicateTest }, [])
6137262Sgblack@eecs.umich.edu    header_output += RegRegOpDeclare.subst(mcr15Iop)
6147262Sgblack@eecs.umich.edu    decoder_output += RegRegOpConstructor.subst(mcr15Iop)
6157262Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(mcr15Iop)
6167283Sgblack@eecs.umich.edu
6177420Sgblack@eecs.umich.edu    mrc15UserIop = InstObjParams("mrc", "Mrc15User", "RegRegOp",
6187420Sgblack@eecs.umich.edu                                 { "code": "Dest = MiscOp1;",
6197420Sgblack@eecs.umich.edu                                   "predicate_test": predicateTest }, [])
6207420Sgblack@eecs.umich.edu    header_output += RegRegOpDeclare.subst(mrc15UserIop)
6217420Sgblack@eecs.umich.edu    decoder_output += RegRegOpConstructor.subst(mrc15UserIop)
6227420Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(mrc15UserIop)
6237420Sgblack@eecs.umich.edu
6247420Sgblack@eecs.umich.edu    mcr15UserIop = InstObjParams("mcr", "Mcr15User", "RegRegOp",
6257420Sgblack@eecs.umich.edu                                 { "code": "MiscDest = Op1",
6267420Sgblack@eecs.umich.edu                                   "predicate_test": predicateTest }, [])
6277420Sgblack@eecs.umich.edu    header_output += RegRegOpDeclare.subst(mcr15UserIop)
6287420Sgblack@eecs.umich.edu    decoder_output += RegRegOpConstructor.subst(mcr15UserIop)
6297420Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(mcr15UserIop)
6307420Sgblack@eecs.umich.edu
6317283Sgblack@eecs.umich.edu    enterxCode = '''
6327283Sgblack@eecs.umich.edu        FNPC = NPC | (1ULL << PcJBitShift) | (1ULL << PcTBitShift);
6337283Sgblack@eecs.umich.edu    '''
6347283Sgblack@eecs.umich.edu    enterxIop = InstObjParams("enterx", "Enterx", "PredOp",
6357283Sgblack@eecs.umich.edu                              { "code": enterxCode,
6367283Sgblack@eecs.umich.edu                                "predicate_test": predicateTest }, [])
6377283Sgblack@eecs.umich.edu    header_output += BasicDeclare.subst(enterxIop)
6387283Sgblack@eecs.umich.edu    decoder_output += BasicConstructor.subst(enterxIop)
6397283Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(enterxIop)
6407283Sgblack@eecs.umich.edu
6417283Sgblack@eecs.umich.edu    leavexCode = '''
6427283Sgblack@eecs.umich.edu        FNPC = (NPC & ~(1ULL << PcJBitShift)) | (1ULL << PcTBitShift);
6437283Sgblack@eecs.umich.edu    '''
6447283Sgblack@eecs.umich.edu    leavexIop = InstObjParams("leavex", "Leavex", "PredOp",
6457283Sgblack@eecs.umich.edu                              { "code": leavexCode,
6467283Sgblack@eecs.umich.edu                                "predicate_test": predicateTest }, [])
6477283Sgblack@eecs.umich.edu    header_output += BasicDeclare.subst(leavexIop)
6487283Sgblack@eecs.umich.edu    decoder_output += BasicConstructor.subst(leavexIop)
6497283Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(leavexIop)
6507307Sgblack@eecs.umich.edu
6517307Sgblack@eecs.umich.edu    setendCode = '''
6527307Sgblack@eecs.umich.edu        CPSR cpsr = Cpsr;
6537307Sgblack@eecs.umich.edu        cpsr.e = imm;
6547307Sgblack@eecs.umich.edu        Cpsr = cpsr;
6557307Sgblack@eecs.umich.edu    '''
6567307Sgblack@eecs.umich.edu    setendIop = InstObjParams("setend", "Setend", "ImmOp",
6577307Sgblack@eecs.umich.edu                              { "code": setendCode,
6587307Sgblack@eecs.umich.edu                                "predicate_test": predicateTest }, [])
6597307Sgblack@eecs.umich.edu    header_output += ImmOpDeclare.subst(setendIop)
6607307Sgblack@eecs.umich.edu    decoder_output += ImmOpConstructor.subst(setendIop)
6617307Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(setendIop)
6627315Sgblack@eecs.umich.edu
6637315Sgblack@eecs.umich.edu    cpsCode = '''
6647315Sgblack@eecs.umich.edu    uint32_t mode = bits(imm, 4, 0);
6657315Sgblack@eecs.umich.edu    uint32_t f = bits(imm, 5);
6667315Sgblack@eecs.umich.edu    uint32_t i = bits(imm, 6);
6677315Sgblack@eecs.umich.edu    uint32_t a = bits(imm, 7);
6687315Sgblack@eecs.umich.edu    bool setMode = bits(imm, 8);
6697315Sgblack@eecs.umich.edu    bool enable = bits(imm, 9);
6707315Sgblack@eecs.umich.edu    CPSR cpsr = Cpsr;
6717400SAli.Saidi@ARM.com    SCTLR sctlr = Sctlr;
6727315Sgblack@eecs.umich.edu    if (cpsr.mode != MODE_USER) {
6737315Sgblack@eecs.umich.edu        if (enable) {
6747315Sgblack@eecs.umich.edu            if (f) cpsr.f = 0;
6757315Sgblack@eecs.umich.edu            if (i) cpsr.i = 0;
6767315Sgblack@eecs.umich.edu            if (a) cpsr.a = 0;
6777315Sgblack@eecs.umich.edu        } else {
6787400SAli.Saidi@ARM.com            if (f && !sctlr.nmfi) cpsr.f = 1;
6797315Sgblack@eecs.umich.edu            if (i) cpsr.i = 1;
6807315Sgblack@eecs.umich.edu            if (a) cpsr.a = 1;
6817315Sgblack@eecs.umich.edu        }
6827315Sgblack@eecs.umich.edu        if (setMode) {
6837315Sgblack@eecs.umich.edu            cpsr.mode = mode;
6847315Sgblack@eecs.umich.edu        }
6857315Sgblack@eecs.umich.edu    }
6867315Sgblack@eecs.umich.edu    Cpsr = cpsr;
6877315Sgblack@eecs.umich.edu    '''
6887315Sgblack@eecs.umich.edu    cpsIop = InstObjParams("cps", "Cps", "ImmOp",
6897315Sgblack@eecs.umich.edu                           { "code": cpsCode,
6907315Sgblack@eecs.umich.edu                             "predicate_test": predicateTest }, [])
6917315Sgblack@eecs.umich.edu    header_output += ImmOpDeclare.subst(cpsIop)
6927315Sgblack@eecs.umich.edu    decoder_output += ImmOpConstructor.subst(cpsIop)
6937315Sgblack@eecs.umich.edu    exec_output += PredOpExecute.subst(cpsIop)
6947202Sgblack@eecs.umich.edu}};
695