data.isa revision 8305:a624d67b642c
18839Sandreas.hansson@arm.com// -*- mode:c++ -*- 28839Sandreas.hansson@arm.com 38839Sandreas.hansson@arm.com// Copyright (c) 2010 ARM Limited 48839Sandreas.hansson@arm.com// All rights reserved 58839Sandreas.hansson@arm.com// 68839Sandreas.hansson@arm.com// The license below extends only to copyright in the software and shall 78839Sandreas.hansson@arm.com// not be construed as granting a license to any other intellectual 88839Sandreas.hansson@arm.com// property including but not limited to intellectual property relating 98839Sandreas.hansson@arm.com// to a hardware implementation of the functionality of the software 108839Sandreas.hansson@arm.com// licensed hereunder. You may use the software subject to the license 118839Sandreas.hansson@arm.com// terms below provided that you ensure that this notice is replicated 128839Sandreas.hansson@arm.com// unmodified and in its entirety in all distributions of the software, 133101Sstever@eecs.umich.edu// modified or unmodified, in source code or in binary form. 148579Ssteve.reinhardt@amd.com// 153101Sstever@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 163101Sstever@eecs.umich.edu// modification, are permitted provided that the following conditions are 173101Sstever@eecs.umich.edu// met: redistributions of source code must retain the above copyright 183101Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 193101Sstever@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 203101Sstever@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 213101Sstever@eecs.umich.edu// documentation and/or other materials provided with the distribution; 223101Sstever@eecs.umich.edu// neither the name of the copyright holders nor the names of its 233101Sstever@eecs.umich.edu// contributors may be used to endorse or promote products derived from 243101Sstever@eecs.umich.edu// this software without specific prior written permission. 253101Sstever@eecs.umich.edu// 263101Sstever@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 273101Sstever@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 283101Sstever@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 293101Sstever@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 303101Sstever@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 313101Sstever@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 323101Sstever@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 333101Sstever@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 343101Sstever@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 353101Sstever@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 363101Sstever@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 373101Sstever@eecs.umich.edu// 383101Sstever@eecs.umich.edu// Authors: Gabe Black 393101Sstever@eecs.umich.edu 403101Sstever@eecs.umich.edulet {{ 413101Sstever@eecs.umich.edu 427778Sgblack@eecs.umich.edu header_output = "" 438839Sandreas.hansson@arm.com decoder_output = "" 443101Sstever@eecs.umich.edu exec_output = "" 453101Sstever@eecs.umich.edu 463101Sstever@eecs.umich.edu calcGECode = ''' 473101Sstever@eecs.umich.edu CondCodesGE = resTemp; 483101Sstever@eecs.umich.edu ''' 493101Sstever@eecs.umich.edu 503101Sstever@eecs.umich.edu calcQCode = ''' 513101Sstever@eecs.umich.edu CpsrQ = (resTemp & 1) << 27; 523101Sstever@eecs.umich.edu ''' 533101Sstever@eecs.umich.edu 543101Sstever@eecs.umich.edu def createCcCode(negBit, carry, overflow): 553101Sstever@eecs.umich.edu code = "" 563101Sstever@eecs.umich.edu code += ''' 573101Sstever@eecs.umich.edu uint16_t _iz, _in; 583101Sstever@eecs.umich.edu _in = (resTemp >> %d) & 1; 593101Sstever@eecs.umich.edu _iz = (resTemp == 0); 603101Sstever@eecs.umich.edu CondCodesNZ = (_in << 1) | _iz; 613101Sstever@eecs.umich.edu DPRINTF(Arm, "(in, iz) = (%%d, %%d)\\n", _in, _iz); 623885Sbinkertn@umich.edu ''' % negBit 633885Sbinkertn@umich.edu if overflow and overflow != "none": 644762Snate@binkert.org code += ''' 653885Sbinkertn@umich.edu uint16_t _iv; 663885Sbinkertn@umich.edu _iv = %s & 1; 677528Ssteve.reinhardt@amd.com CondCodesV = _iv; 683885Sbinkertn@umich.edu DPRINTF(Arm, "(iv) = (%%d)\\n", _iv); 694380Sbinkertn@umich.edu ''' % overflow 704167Sbinkertn@umich.edu if carry and carry != "none": 713102Sstever@eecs.umich.edu code += ''' 723101Sstever@eecs.umich.edu uint16_t _ic; 734762Snate@binkert.org _ic = %s & 1; 744762Snate@binkert.org CondCodesC = _ic; 754762Snate@binkert.org DPRINTF(Arm, "(ic) = (%%d)\\n", _ic); 764762Snate@binkert.org ''' % carry 774762Snate@binkert.org return code 784762Snate@binkert.org 794762Snate@binkert.org # Dict of code to set the carry flag. (imm, reg, reg-reg) 804762Snate@binkert.org oldC = 'CondCodesC' 814762Snate@binkert.org carryCode = { 825033Smilesck@eecs.umich.edu "none": ("none", "none", "none"), 835033Smilesck@eecs.umich.edu "llbit": ("none", "none", "none"), 845033Smilesck@eecs.umich.edu "saturate": ('0', '0', '0'), 855033Smilesck@eecs.umich.edu "overflow": ('0', '0', '0'), 865033Smilesck@eecs.umich.edu "ge": ('0', '0', '0'), 875033Smilesck@eecs.umich.edu "add": ('findCarry(32, resTemp, Op1, secondOp)', 885033Smilesck@eecs.umich.edu 'findCarry(32, resTemp, Op1, secondOp)', 895033Smilesck@eecs.umich.edu 'findCarry(32, resTemp, Op1, secondOp)'), 905033Smilesck@eecs.umich.edu "sub": ('findCarry(32, resTemp, Op1, ~secondOp)', 915033Smilesck@eecs.umich.edu 'findCarry(32, resTemp, Op1, ~secondOp)', 923101Sstever@eecs.umich.edu 'findCarry(32, resTemp, Op1, ~secondOp)'), 933101Sstever@eecs.umich.edu "rsb": ('findCarry(32, resTemp, secondOp, ~Op1)', 943101Sstever@eecs.umich.edu 'findCarry(32, resTemp, secondOp, ~Op1)', 955033Smilesck@eecs.umich.edu 'findCarry(32, resTemp, secondOp, ~Op1)'), 963101Sstever@eecs.umich.edu "logic": ('(rotC ? bits(secondOp, 31) : %s)' % oldC, 978596Ssteve.reinhardt@amd.com 'shift_carry_imm(Op2, shiftAmt, shiftType, %s)' % oldC, 988596Ssteve.reinhardt@amd.com 'shift_carry_rs(Op2, Shift<7:0>, shiftType, %s)' % oldC) 998596Ssteve.reinhardt@amd.com } 1008596Ssteve.reinhardt@amd.com # Dict of code to set the overflow flag. 1017673Snate@binkert.org overflowCode = { 1027673Snate@binkert.org "none": "none", 1037673Snate@binkert.org "llbit": "none", 1047673Snate@binkert.org "saturate": '0', 1058596Ssteve.reinhardt@amd.com "overflow": '0', 1068596Ssteve.reinhardt@amd.com "ge": '0', 1078596Ssteve.reinhardt@amd.com "add": 'findOverflow(32, resTemp, Op1, secondOp)', 1087673Snate@binkert.org "sub": 'findOverflow(32, resTemp, Op1, ~secondOp)', 1097673Snate@binkert.org "rsb": 'findOverflow(32, resTemp, secondOp, ~Op1)', 1107673Snate@binkert.org "logic": "none" 1113101Sstever@eecs.umich.edu } 1123101Sstever@eecs.umich.edu 1133101Sstever@eecs.umich.edu secondOpRe = re.compile("secondOp") 1143101Sstever@eecs.umich.edu immOp2 = "imm" 1153101Sstever@eecs.umich.edu regOp2 = "shift_rm_imm(Op2, shiftAmt, shiftType, OptShiftRmCondCodesC)" 1163101Sstever@eecs.umich.edu regRegOp2 = "shift_rm_rs(Op2, Shift<7:0>, shiftType, 0)" 1173101Sstever@eecs.umich.edu 1183101Sstever@eecs.umich.edu def buildImmDataInst(mnem, code, flagType = "logic", suffix = "Imm", \ 1193101Sstever@eecs.umich.edu buildCc = True, buildNonCc = True, instFlags = []): 1203101Sstever@eecs.umich.edu cCode = carryCode[flagType] 1213101Sstever@eecs.umich.edu vCode = overflowCode[flagType] 1223101Sstever@eecs.umich.edu negBit = 31 1233101Sstever@eecs.umich.edu if flagType == "llbit": 1243101Sstever@eecs.umich.edu negBit = 63 1253101Sstever@eecs.umich.edu if flagType == "saturate": 1263101Sstever@eecs.umich.edu immCcCode = calcQCode 1273101Sstever@eecs.umich.edu elif flagType == "ge": 1283101Sstever@eecs.umich.edu immCcCode = calcGECode 1293101Sstever@eecs.umich.edu else: 1303101Sstever@eecs.umich.edu immCcCode = createCcCode(negBit, secondOpRe.sub(immOp2, cCode[0]), 1313101Sstever@eecs.umich.edu secondOpRe.sub(immOp2, vCode)) 1323101Sstever@eecs.umich.edu 1333101Sstever@eecs.umich.edu immCode = secondOpRe.sub(immOp2, code) 1343101Sstever@eecs.umich.edu immIop = InstObjParams(mnem, mnem.capitalize() + suffix, "DataImmOp", 1353101Sstever@eecs.umich.edu {"code" : immCode, 1363101Sstever@eecs.umich.edu "predicate_test": pickPredicate(immCode)}, instFlags) 1373101Sstever@eecs.umich.edu immIopCc = InstObjParams(mnem + "s", mnem.capitalize() + suffix + "Cc", 1383101Sstever@eecs.umich.edu "DataImmOp", 1393101Sstever@eecs.umich.edu {"code" : immCode + immCcCode, 1403101Sstever@eecs.umich.edu "predicate_test": pickPredicate(immCode + immCcCode)}, instFlags) 1413101Sstever@eecs.umich.edu 1423101Sstever@eecs.umich.edu def subst(iop): 1433101Sstever@eecs.umich.edu global header_output, decoder_output, exec_output 1443101Sstever@eecs.umich.edu header_output += DataImmDeclare.subst(iop) 1453101Sstever@eecs.umich.edu decoder_output += DataImmConstructor.subst(iop) 1463101Sstever@eecs.umich.edu exec_output += PredOpExecute.subst(iop) 1473101Sstever@eecs.umich.edu 1483101Sstever@eecs.umich.edu if buildNonCc: 1493101Sstever@eecs.umich.edu subst(immIop) 1503101Sstever@eecs.umich.edu if buildCc: 1513101Sstever@eecs.umich.edu subst(immIopCc) 1523101Sstever@eecs.umich.edu 1533101Sstever@eecs.umich.edu def buildRegDataInst(mnem, code, flagType = "logic", suffix = "Reg", \ 1543101Sstever@eecs.umich.edu buildCc = True, buildNonCc = True, isRasPop = "0", \ 1553101Sstever@eecs.umich.edu isBranch = "0", instFlags = []): 1563101Sstever@eecs.umich.edu cCode = carryCode[flagType] 1575033Smilesck@eecs.umich.edu vCode = overflowCode[flagType] 1586656Snate@binkert.org negBit = 31 1595033Smilesck@eecs.umich.edu regCcCode = "" 1605033Smilesck@eecs.umich.edu if flagType == "llbit": 1615033Smilesck@eecs.umich.edu negBit = 63 1623101Sstever@eecs.umich.edu if flagType == "saturate": 1633101Sstever@eecs.umich.edu regCcCode = calcQCode 1643101Sstever@eecs.umich.edu elif flagType == "ge": 1653101Sstever@eecs.umich.edu regCcCode = calcGECode 1663101Sstever@eecs.umich.edu else: 1673101Sstever@eecs.umich.edu regCcCode = createCcCode(negBit,secondOpRe.sub(regOp2, cCode[1]), 1683101Sstever@eecs.umich.edu secondOpRe.sub(regOp2, vCode)) 1693101Sstever@eecs.umich.edu 1703101Sstever@eecs.umich.edu regCode = secondOpRe.sub(regOp2, code) 1713101Sstever@eecs.umich.edu 1723101Sstever@eecs.umich.edu # If we end up needing CondCodesC then remove any trace of the OptShift 1733101Sstever@eecs.umich.edu if re.search('(?<!OptShiftRm)CondCodesC(?!.*=)', regCode + regCcCode): 1743101Sstever@eecs.umich.edu regCode = re.sub('OptShiftRmCondCodesC', 'CondCodesC', regCode) 1753102Sstever@eecs.umich.edu regCcCode = re.sub('OptShiftRmCondCodesC', 'CondCodesC', regCcCode) 1763101Sstever@eecs.umich.edu 1773101Sstever@eecs.umich.edu regIop = InstObjParams(mnem, mnem.capitalize() + suffix, "DataRegOp", 1783101Sstever@eecs.umich.edu {"code" : regCode, "is_ras_pop" : isRasPop, 1797673Snate@binkert.org "is_branch" : isBranch, 1808607Sgblack@eecs.umich.edu "predicate_test": pickPredicate(regCode)}, instFlags) 1817673Snate@binkert.org regIopCc = InstObjParams(mnem + "s", mnem.capitalize() + suffix + "Cc", 1823101Sstever@eecs.umich.edu "DataRegOp", 1837673Snate@binkert.org {"code" : regCode + regCcCode, 1847673Snate@binkert.org "predicate_test": pickPredicate(regCode + regCcCode), 1853101Sstever@eecs.umich.edu "is_ras_pop" : isRasPop, 1867673Snate@binkert.org "is_branch" : isBranch}, instFlags) 1877673Snate@binkert.org 1883101Sstever@eecs.umich.edu def subst(iop): 1893101Sstever@eecs.umich.edu global header_output, decoder_output, exec_output 1903101Sstever@eecs.umich.edu header_output += DataRegDeclare.subst(iop) 1913101Sstever@eecs.umich.edu decoder_output += DataRegConstructor.subst(iop) 1923101Sstever@eecs.umich.edu exec_output += PredOpExecute.subst(iop) 1933101Sstever@eecs.umich.edu 1945033Smilesck@eecs.umich.edu if buildNonCc: 1955475Snate@binkert.org subst(regIop) 1965475Snate@binkert.org if buildCc: 1975475Snate@binkert.org subst(regIopCc) 1985475Snate@binkert.org 1993101Sstever@eecs.umich.edu def buildRegRegDataInst(mnem, code, flagType = "logic", \ 2003101Sstever@eecs.umich.edu suffix = "RegReg", \ 2013101Sstever@eecs.umich.edu buildCc = True, buildNonCc = True): 2024762Snate@binkert.org cCode = carryCode[flagType] 2034762Snate@binkert.org vCode = overflowCode[flagType] 2044762Snate@binkert.org negBit = 31 2053101Sstever@eecs.umich.edu if flagType == "llbit": 2068460SAli.Saidi@ARM.com negBit = 63 2078459SAli.Saidi@ARM.com if flagType == "saturate": 2088459SAli.Saidi@ARM.com regRegCcCode = calcQCode 2098459SAli.Saidi@ARM.com elif flagType == "ge": 2103101Sstever@eecs.umich.edu regRegCcCode = calcGECode 2117528Ssteve.reinhardt@amd.com else: 2127528Ssteve.reinhardt@amd.com regRegCcCode = createCcCode(negBit, 2137528Ssteve.reinhardt@amd.com secondOpRe.sub(regRegOp2, cCode[2]), 2147528Ssteve.reinhardt@amd.com secondOpRe.sub(regRegOp2, vCode)) 2157528Ssteve.reinhardt@amd.com 2167528Ssteve.reinhardt@amd.com regRegCode = secondOpRe.sub(regRegOp2, code) 2173101Sstever@eecs.umich.edu regRegIop = InstObjParams(mnem, mnem.capitalize() + suffix, 2187528Ssteve.reinhardt@amd.com "DataRegRegOp", 2197528Ssteve.reinhardt@amd.com {"code" : regRegCode, 2207528Ssteve.reinhardt@amd.com "predicate_test": pickPredicate(regRegCode)}) 2217528Ssteve.reinhardt@amd.com regRegIopCc = InstObjParams(mnem + "s", 2227528Ssteve.reinhardt@amd.com mnem.capitalize() + suffix + "Cc", 2237528Ssteve.reinhardt@amd.com "DataRegRegOp", 2247528Ssteve.reinhardt@amd.com {"code" : regRegCode + regRegCcCode, 2257528Ssteve.reinhardt@amd.com "predicate_test": pickPredicate(regRegCode + regRegCcCode)}) 2267528Ssteve.reinhardt@amd.com 2277528Ssteve.reinhardt@amd.com def subst(iop): 2288321Ssteve.reinhardt@amd.com global header_output, decoder_output, exec_output 2298321Ssteve.reinhardt@amd.com header_output += DataRegRegDeclare.subst(iop) 2307528Ssteve.reinhardt@amd.com decoder_output += DataRegRegConstructor.subst(iop) 2317528Ssteve.reinhardt@amd.com exec_output += PredOpExecute.subst(iop) 2327528Ssteve.reinhardt@amd.com 2337528Ssteve.reinhardt@amd.com if buildNonCc: 2347528Ssteve.reinhardt@amd.com subst(regRegIop) 2357528Ssteve.reinhardt@amd.com if buildCc: 2367528Ssteve.reinhardt@amd.com subst(regRegIopCc) 2377528Ssteve.reinhardt@amd.com 2387528Ssteve.reinhardt@amd.com def buildDataInst(mnem, code, flagType = "logic", \ 2397528Ssteve.reinhardt@amd.com aiw = True, regRegAiw = True, 2407528Ssteve.reinhardt@amd.com subsPcLr = True, isRasPop = "0", isBranch = "0"): 2417528Ssteve.reinhardt@amd.com regRegCode = instCode = code 2427528Ssteve.reinhardt@amd.com if aiw: 2433101Sstever@eecs.umich.edu instCode = "AIW" + instCode 2448664SAli.Saidi@ARM.com if regRegAiw: 2458664SAli.Saidi@ARM.com regRegCode = "AIW" + regRegCode 2468664SAli.Saidi@ARM.com 2478664SAli.Saidi@ARM.com buildImmDataInst(mnem, instCode, flagType) 2488664SAli.Saidi@ARM.com buildRegDataInst(mnem, instCode, flagType, 2498664SAli.Saidi@ARM.com isRasPop = isRasPop, isBranch = isBranch) 2503101Sstever@eecs.umich.edu buildRegRegDataInst(mnem, regRegCode, flagType) 2513101Sstever@eecs.umich.edu if subsPcLr: 2523101Sstever@eecs.umich.edu code += ''' 2533101Sstever@eecs.umich.edu SCTLR sctlr = Sctlr; 2543101Sstever@eecs.umich.edu CPSR old_cpsr = Cpsr; 2553101Sstever@eecs.umich.edu 2563101Sstever@eecs.umich.edu CPSR new_cpsr = 2573101Sstever@eecs.umich.edu cpsrWriteByInstr(old_cpsr, Spsr, 0xF, true, sctlr.nmfi); 2584762Snate@binkert.org Cpsr = ~CondCodesMask & new_cpsr; 2594762Snate@binkert.org CondCodesNZ = new_cpsr.nz; 2604762Snate@binkert.org CondCodesC = new_cpsr.c; 2614762Snate@binkert.org CondCodesV = new_cpsr.v; 2627528Ssteve.reinhardt@amd.com CondCodesGE = new_cpsr.ge; 2634762Snate@binkert.org 2644762Snate@binkert.org NextThumb = (new_cpsr).t; 2654762Snate@binkert.org NextJazelle = (new_cpsr).j; 2668596Ssteve.reinhardt@amd.com NextItState = (((new_cpsr).it2 << 2) & 0xFC) 2678596Ssteve.reinhardt@amd.com | ((new_cpsr).it1 & 0x3); 2688596Ssteve.reinhardt@amd.com SevMailbox = 1; 2697673Snate@binkert.org ''' 2708596Ssteve.reinhardt@amd.com buildImmDataInst(mnem + 's', code, flagType, 2714762Snate@binkert.org suffix = "ImmPclr", buildCc = False, 2727673Snate@binkert.org instFlags = ["IsSerializeAfter","IsNonSpeculative"]) 2738596Ssteve.reinhardt@amd.com buildRegDataInst(mnem + 's', code, flagType, 2747675Snate@binkert.org suffix = "RegPclr", buildCc = False, 2757675Snate@binkert.org instFlags = ["IsSerializeAfter","IsNonSpeculative"]) 2767675Snate@binkert.org 2777675Snate@binkert.org buildDataInst("and", "Dest = resTemp = Op1 & secondOp;") 2788656Sandreas.hansson@arm.com buildDataInst("eor", "Dest = resTemp = Op1 ^ secondOp;") 2798656Sandreas.hansson@arm.com buildDataInst("sub", "Dest = resTemp = Op1 - secondOp;", "sub") 2808656Sandreas.hansson@arm.com buildDataInst("rsb", "Dest = resTemp = secondOp - Op1;", "rsb") 2817675Snate@binkert.org buildDataInst("add", "Dest = resTemp = Op1 + secondOp;", "add") 2827675Snate@binkert.org buildImmDataInst("adr", ''' 2837673Snate@binkert.org Dest = resTemp = (PC & ~0x3) + 2847675Snate@binkert.org (op1 ? secondOp : -secondOp); 2857675Snate@binkert.org ''') 2867675Snate@binkert.org buildDataInst("adc", "Dest = resTemp = Op1 + secondOp + %s;" % oldC, "add") 2877675Snate@binkert.org buildDataInst("sbc", "Dest = resTemp = Op1 - secondOp - !%s;" % oldC, "sub") 2887675Snate@binkert.org buildDataInst("rsc", "Dest = resTemp = secondOp - Op1 - !%s;" % oldC, "rsb") 2897673Snate@binkert.org buildDataInst("tst", "resTemp = Op1 & secondOp;", aiw = False) 2907675Snate@binkert.org buildDataInst("teq", "resTemp = Op1 ^ secondOp;", aiw = False) 2917675Snate@binkert.org buildDataInst("cmp", "resTemp = Op1 - secondOp;", "sub", aiw = False) 2927675Snate@binkert.org buildDataInst("cmn", "resTemp = Op1 + secondOp;", "add", aiw = False) 2937675Snate@binkert.org buildDataInst("orr", "Dest = resTemp = Op1 | secondOp;") 2947675Snate@binkert.org buildDataInst("orn", "Dest = resTemp = Op1 | ~secondOp;", aiw = False) 2957675Snate@binkert.org buildDataInst("mov", "Dest = resTemp = secondOp;", regRegAiw = False, 2967675Snate@binkert.org isRasPop = "op1 == INTREG_LR", isBranch = "dest == INTREG_PC") 2977675Snate@binkert.org buildDataInst("bic", "Dest = resTemp = Op1 & ~secondOp;") 2987675Snate@binkert.org buildDataInst("mvn", "Dest = resTemp = ~secondOp;") 2997675Snate@binkert.org buildDataInst("movt", 3007675Snate@binkert.org "Dest = resTemp = insertBits(Op1, 31, 16, secondOp);", 3017675Snate@binkert.org aiw = False) 3027675Snate@binkert.org 3037675Snate@binkert.org buildRegDataInst("qadd", ''' 3047675Snate@binkert.org int32_t midRes; 3057675Snate@binkert.org resTemp = saturateOp<32>(midRes, Op1.sw, Op2.sw); 3067673Snate@binkert.org Dest = midRes; 3077673Snate@binkert.org ''', flagType="saturate", buildNonCc=False) 3083101Sstever@eecs.umich.edu buildRegDataInst("qadd16", ''' 3097675Snate@binkert.org int32_t midRes; 3107675Snate@binkert.org for (unsigned i = 0; i < 2; i++) { 3117673Snate@binkert.org int high = (i + 1) * 16 - 1; 3127673Snate@binkert.org int low = i * 16; 3137673Snate@binkert.org int64_t arg1 = sext<16>(bits(Op1.sw, high, low)); 3143101Sstever@eecs.umich.edu int64_t arg2 = sext<16>(bits(Op2.sw, high, low)); 3157673Snate@binkert.org saturateOp<16>(midRes, arg1, arg2); 3167673Snate@binkert.org replaceBits(resTemp, high, low, midRes); 3173101Sstever@eecs.umich.edu } 3183101Sstever@eecs.umich.edu Dest = resTemp; 3193101Sstever@eecs.umich.edu ''', flagType="none", buildCc=False) 3203101Sstever@eecs.umich.edu buildRegDataInst("qadd8", ''' 3213101Sstever@eecs.umich.edu int32_t midRes; 3223101Sstever@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 3233101Sstever@eecs.umich.edu int high = (i + 1) * 8 - 1; 3243101Sstever@eecs.umich.edu int low = i * 8; 3253101Sstever@eecs.umich.edu int64_t arg1 = sext<8>(bits(Op1.sw, high, low)); 3263101Sstever@eecs.umich.edu int64_t arg2 = sext<8>(bits(Op2.sw, high, low)); 3273101Sstever@eecs.umich.edu saturateOp<8>(midRes, arg1, arg2); 3283101Sstever@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 3293101Sstever@eecs.umich.edu } 3303101Sstever@eecs.umich.edu Dest = resTemp; 3313101Sstever@eecs.umich.edu ''', flagType="none", buildCc=False) 3325033Smilesck@eecs.umich.edu buildRegDataInst("qdadd", ''' 3335033Smilesck@eecs.umich.edu int32_t midRes; 3343101Sstever@eecs.umich.edu resTemp = saturateOp<32>(midRes, Op2.sw, Op2.sw) | 3353101Sstever@eecs.umich.edu saturateOp<32>(midRes, Op1.sw, midRes); 3363101Sstever@eecs.umich.edu Dest = midRes; 3373101Sstever@eecs.umich.edu ''', flagType="saturate", buildNonCc=False) 3383101Sstever@eecs.umich.edu buildRegDataInst("qsub", ''' 3393101Sstever@eecs.umich.edu int32_t midRes; 3403101Sstever@eecs.umich.edu resTemp = saturateOp<32>(midRes, Op1.sw, Op2.sw, true); 3413101Sstever@eecs.umich.edu Dest = midRes; 3423101Sstever@eecs.umich.edu ''', flagType="saturate") 3433101Sstever@eecs.umich.edu buildRegDataInst("qsub16", ''' 3443101Sstever@eecs.umich.edu int32_t midRes; 3453101Sstever@eecs.umich.edu for (unsigned i = 0; i < 2; i++) { 3463101Sstever@eecs.umich.edu int high = (i + 1) * 16 - 1; 3473101Sstever@eecs.umich.edu int low = i * 16; 3483101Sstever@eecs.umich.edu int64_t arg1 = sext<16>(bits(Op1.sw, high, low)); 3493101Sstever@eecs.umich.edu int64_t arg2 = sext<16>(bits(Op2.sw, high, low)); 3503101Sstever@eecs.umich.edu saturateOp<16>(midRes, arg1, arg2, true); 3513101Sstever@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 3523101Sstever@eecs.umich.edu } 3533101Sstever@eecs.umich.edu Dest = resTemp; 3543101Sstever@eecs.umich.edu ''', flagType="none", buildCc=False) 3553101Sstever@eecs.umich.edu buildRegDataInst("qsub8", ''' 3563101Sstever@eecs.umich.edu int32_t midRes; 3573101Sstever@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 3583101Sstever@eecs.umich.edu int high = (i + 1) * 8 - 1; 3597673Snate@binkert.org int low = i * 8; 3607673Snate@binkert.org int64_t arg1 = sext<8>(bits(Op1.sw, high, low)); 3617673Snate@binkert.org int64_t arg2 = sext<8>(bits(Op2.sw, high, low)); 3627673Snate@binkert.org saturateOp<8>(midRes, arg1, arg2, true); 3637673Snate@binkert.org replaceBits(resTemp, high, low, midRes); 3647673Snate@binkert.org } 3657673Snate@binkert.org Dest = resTemp; 3667673Snate@binkert.org ''', flagType="none", buildCc=False) 3674762Snate@binkert.org buildRegDataInst("qdsub", ''' 3684762Snate@binkert.org int32_t midRes; 3694762Snate@binkert.org resTemp = saturateOp<32>(midRes, Op2.sw, Op2.sw) | 3703101Sstever@eecs.umich.edu saturateOp<32>(midRes, Op1.sw, midRes, true); 3713101Sstever@eecs.umich.edu Dest = midRes; 3723101Sstever@eecs.umich.edu ''', flagType="saturate", buildNonCc=False) 3733101Sstever@eecs.umich.edu buildRegDataInst("qasx", ''' 3743101Sstever@eecs.umich.edu int32_t midRes; 3753101Sstever@eecs.umich.edu int64_t arg1Low = sext<16>(bits(Op1.sw, 15, 0)); 3763101Sstever@eecs.umich.edu int64_t arg1High = sext<16>(bits(Op1.sw, 31, 16)); 3773101Sstever@eecs.umich.edu int64_t arg2Low = sext<16>(bits(Op2.sw, 15, 0)); 3783101Sstever@eecs.umich.edu int64_t arg2High = sext<16>(bits(Op2.sw, 31, 16)); 3793101Sstever@eecs.umich.edu saturateOp<16>(midRes, arg1Low, arg2High, true); 3803101Sstever@eecs.umich.edu replaceBits(resTemp, 15, 0, midRes); 3813714Sstever@eecs.umich.edu saturateOp<16>(midRes, arg1High, arg2Low); 3823714Sstever@eecs.umich.edu replaceBits(resTemp, 31, 16, midRes); 3833714Sstever@eecs.umich.edu Dest = resTemp; 3843714Sstever@eecs.umich.edu ''', flagType="none", buildCc=False) 3853714Sstever@eecs.umich.edu buildRegDataInst("qsax", ''' 3863714Sstever@eecs.umich.edu int32_t midRes; 3873101Sstever@eecs.umich.edu int64_t arg1Low = sext<16>(bits(Op1.sw, 15, 0)); 3883101Sstever@eecs.umich.edu int64_t arg1High = sext<16>(bits(Op1.sw, 31, 16)); 3893101Sstever@eecs.umich.edu int64_t arg2Low = sext<16>(bits(Op2.sw, 15, 0)); 3903101Sstever@eecs.umich.edu int64_t arg2High = sext<16>(bits(Op2.sw, 31, 16)); 3913101Sstever@eecs.umich.edu saturateOp<16>(midRes, arg1Low, arg2High); 3923101Sstever@eecs.umich.edu replaceBits(resTemp, 15, 0, midRes); 3933101Sstever@eecs.umich.edu saturateOp<16>(midRes, arg1High, arg2Low, true); 3943101Sstever@eecs.umich.edu replaceBits(resTemp, 31, 16, midRes); 3953101Sstever@eecs.umich.edu Dest = resTemp; 3963101Sstever@eecs.umich.edu ''', flagType="none", buildCc=False) 3973101Sstever@eecs.umich.edu 3983101Sstever@eecs.umich.edu buildRegDataInst("sadd8", ''' 3993101Sstever@eecs.umich.edu uint32_t geBits = 0; 4003101Sstever@eecs.umich.edu resTemp = 0; 4013101Sstever@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 4023101Sstever@eecs.umich.edu int high = (i + 1) * 8 - 1; 4033101Sstever@eecs.umich.edu int low = i * 8; 4043101Sstever@eecs.umich.edu int32_t midRes = sext<8>(bits(Op1.sw, high, low)) + 4053101Sstever@eecs.umich.edu sext<8>(bits(Op2.sw, high, low)); 4063101Sstever@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 4073101Sstever@eecs.umich.edu if (midRes >= 0) { 4083101Sstever@eecs.umich.edu geBits = geBits | (1 << i); 4093101Sstever@eecs.umich.edu } 4103101Sstever@eecs.umich.edu } 4113101Sstever@eecs.umich.edu Dest = resTemp; 4125033Smilesck@eecs.umich.edu resTemp = geBits; 4133101Sstever@eecs.umich.edu ''', flagType="ge", buildNonCc=False) 4143101Sstever@eecs.umich.edu buildRegDataInst("sadd16", ''' 4153101Sstever@eecs.umich.edu uint32_t geBits = 0; 4163101Sstever@eecs.umich.edu resTemp = 0; 4173101Sstever@eecs.umich.edu for (unsigned i = 0; i < 2; i++) { 4183101Sstever@eecs.umich.edu int high = (i + 1) * 16 - 1; 4193101Sstever@eecs.umich.edu int low = i * 16; 4203101Sstever@eecs.umich.edu int32_t midRes = sext<16>(bits(Op1.sw, high, low)) + 4213101Sstever@eecs.umich.edu sext<16>(bits(Op2.sw, high, low)); 4223101Sstever@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 4233101Sstever@eecs.umich.edu if (midRes >= 0) { 4243101Sstever@eecs.umich.edu geBits = geBits | (0x3 << (i * 2)); 4255822Ssaidi@eecs.umich.edu } 4265822Ssaidi@eecs.umich.edu } 4273101Sstever@eecs.umich.edu Dest = resTemp; 4283101Sstever@eecs.umich.edu resTemp = geBits; 4293101Sstever@eecs.umich.edu ''', flagType="ge", buildNonCc=False) 4303101Sstever@eecs.umich.edu 4313101Sstever@eecs.umich.edu buildRegDataInst("ssub8", ''' 4323101Sstever@eecs.umich.edu uint32_t geBits = 0; 4333101Sstever@eecs.umich.edu resTemp = 0; 4343101Sstever@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 4353101Sstever@eecs.umich.edu int high = (i + 1) * 8 - 1; 4363101Sstever@eecs.umich.edu int low = i * 8; 4373101Sstever@eecs.umich.edu int32_t midRes = sext<8>(bits(Op1.sw, high, low)) - 4383101Sstever@eecs.umich.edu sext<8>(bits(Op2.sw, high, low)); 4393101Sstever@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 4403101Sstever@eecs.umich.edu if (midRes >= 0) { 4413101Sstever@eecs.umich.edu geBits = geBits | (1 << i); 4423101Sstever@eecs.umich.edu } 4433101Sstever@eecs.umich.edu } 4443101Sstever@eecs.umich.edu Dest = resTemp; 4453101Sstever@eecs.umich.edu resTemp = geBits; 4463101Sstever@eecs.umich.edu ''', flagType="ge", buildNonCc=False) 4473101Sstever@eecs.umich.edu buildRegDataInst("ssub16", ''' 4483102Sstever@eecs.umich.edu uint32_t geBits = 0; 4493714Sstever@eecs.umich.edu resTemp = 0; 4503101Sstever@eecs.umich.edu for (unsigned i = 0; i < 2; i++) { 4513714Sstever@eecs.umich.edu int high = (i + 1) * 16 - 1; 4523714Sstever@eecs.umich.edu int low = i * 16; 4533714Sstever@eecs.umich.edu int32_t midRes = sext<16>(bits(Op1.sw, high, low)) - 4543101Sstever@eecs.umich.edu sext<16>(bits(Op2.sw, high, low)); 4553101Sstever@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 4567673Snate@binkert.org if (midRes >= 0) { 4577673Snate@binkert.org geBits = geBits | (0x3 << (i * 2)); 4587673Snate@binkert.org } 4597673Snate@binkert.org } 4607673Snate@binkert.org Dest = resTemp; 4617673Snate@binkert.org resTemp = geBits; 4627673Snate@binkert.org ''', flagType="ge", buildNonCc=False) 4637673Snate@binkert.org buildRegDataInst("sasx", ''' 4647673Snate@binkert.org int32_t midRes, geBits = 0; 4657673Snate@binkert.org resTemp = 0; 4667673Snate@binkert.org int64_t arg1Low = sext<16>(bits(Op1.sw, 15, 0)); 4674762Snate@binkert.org int64_t arg1High = sext<16>(bits(Op1.sw, 31, 16)); 4684762Snate@binkert.org int64_t arg2Low = sext<16>(bits(Op2.sw, 15, 0)); 4694762Snate@binkert.org int64_t arg2High = sext<16>(bits(Op2.sw, 31, 16)); 4703101Sstever@eecs.umich.edu midRes = arg1Low - arg2High; 4713101Sstever@eecs.umich.edu if (midRes >= 0) { 4723101Sstever@eecs.umich.edu geBits = geBits | 0x3; 4733101Sstever@eecs.umich.edu } 4743101Sstever@eecs.umich.edu replaceBits(resTemp, 15, 0, midRes); 4753101Sstever@eecs.umich.edu midRes = arg1High + arg2Low; 4763101Sstever@eecs.umich.edu if (midRes >= 0) { 4773101Sstever@eecs.umich.edu geBits = geBits | 0xc; 4783101Sstever@eecs.umich.edu } 4793101Sstever@eecs.umich.edu replaceBits(resTemp, 31, 16, midRes); 4803101Sstever@eecs.umich.edu Dest = resTemp; 4813101Sstever@eecs.umich.edu resTemp = geBits; 4823101Sstever@eecs.umich.edu ''', flagType="ge", buildNonCc=True) 4833101Sstever@eecs.umich.edu buildRegDataInst("ssax", ''' 4843101Sstever@eecs.umich.edu int32_t midRes, geBits = 0; 4853101Sstever@eecs.umich.edu resTemp = 0; 4863101Sstever@eecs.umich.edu int64_t arg1Low = sext<16>(bits(Op1.sw, 15, 0)); 4873101Sstever@eecs.umich.edu int64_t arg1High = sext<16>(bits(Op1.sw, 31, 16)); 4883101Sstever@eecs.umich.edu int64_t arg2Low = sext<16>(bits(Op2.sw, 15, 0)); 4893101Sstever@eecs.umich.edu int64_t arg2High = sext<16>(bits(Op2.sw, 31, 16)); 4904446Sbinkertn@umich.edu midRes = arg1Low + arg2High; 4913101Sstever@eecs.umich.edu if (midRes >= 0) { 4925468Snate@binkert.org geBits = geBits | 0x3; 4935468Snate@binkert.org } 4945468Snate@binkert.org replaceBits(resTemp, 15, 0, midRes); 4955468Snate@binkert.org midRes = arg1High - arg2Low; 4965468Snate@binkert.org if (midRes >= 0) { 4975468Snate@binkert.org geBits = geBits | 0xc; 4985468Snate@binkert.org } 4994762Snate@binkert.org replaceBits(resTemp, 31, 16, midRes); 5004762Snate@binkert.org Dest = resTemp; 5014762Snate@binkert.org resTemp = geBits; 5023101Sstever@eecs.umich.edu ''', flagType="ge", buildNonCc=True) 5033101Sstever@eecs.umich.edu 5043101Sstever@eecs.umich.edu buildRegDataInst("shadd8", ''' 5053101Sstever@eecs.umich.edu resTemp = 0; 5063101Sstever@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 5073101Sstever@eecs.umich.edu int high = (i + 1) * 8 - 1; 5083101Sstever@eecs.umich.edu int low = i * 8; 5093101Sstever@eecs.umich.edu int32_t midRes = 5103102Sstever@eecs.umich.edu (uint64_t)(sext<8>(bits(Op1.sw, high, low)) + 5113101Sstever@eecs.umich.edu sext<8>(bits(Op2.sw, high, low))) >> 1; 5123101Sstever@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 5133101Sstever@eecs.umich.edu } 5144168Sbinkertn@umich.edu Dest = resTemp; 5153101Sstever@eecs.umich.edu ''', flagType="none", buildCc=False) 5163101Sstever@eecs.umich.edu buildRegDataInst("shadd16", ''' 5173101Sstever@eecs.umich.edu resTemp = 0; 5183101Sstever@eecs.umich.edu for (unsigned i = 0; i < 2; i++) { 5193101Sstever@eecs.umich.edu int high = (i + 1) * 16 - 1; 5203101Sstever@eecs.umich.edu int low = i * 16; 5213102Sstever@eecs.umich.edu int32_t midRes = 5223101Sstever@eecs.umich.edu (uint64_t)(sext<16>(bits(Op1.sw, high, low)) + 5233101Sstever@eecs.umich.edu sext<16>(bits(Op2.sw, high, low))) >> 1; 5243101Sstever@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 5253101Sstever@eecs.umich.edu } 5263101Sstever@eecs.umich.edu Dest = resTemp; 5273101Sstever@eecs.umich.edu ''', flagType="none", buildCc=False) 5283101Sstever@eecs.umich.edu buildRegDataInst("shsub8", ''' 5293101Sstever@eecs.umich.edu resTemp = 0; 5303101Sstever@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 5313101Sstever@eecs.umich.edu int high = (i + 1) * 8 - 1; 5323101Sstever@eecs.umich.edu int low = i * 8; 5333102Sstever@eecs.umich.edu int32_t midRes = 5343101Sstever@eecs.umich.edu (uint64_t)(sext<8>(bits(Op1.sw, high, low)) - 5353101Sstever@eecs.umich.edu sext<8>(bits(Op2.sw, high, low))) >> 1; 5363101Sstever@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 5373584Ssaidi@eecs.umich.edu } 5383584Ssaidi@eecs.umich.edu Dest = resTemp; 5393584Ssaidi@eecs.umich.edu ''', flagType="none", buildCc=False) 5403584Ssaidi@eecs.umich.edu buildRegDataInst("shsub16", ''' 5413584Ssaidi@eecs.umich.edu resTemp = 0; 5423101Sstever@eecs.umich.edu for (unsigned i = 0; i < 2; i++) { 5433101Sstever@eecs.umich.edu int high = (i + 1) * 16 - 1; 5445033Smilesck@eecs.umich.edu int low = i * 16; 5453101Sstever@eecs.umich.edu int32_t midRes = 5463101Sstever@eecs.umich.edu (uint64_t)(sext<16>(bits(Op1.sw, high, low)) - 5473101Sstever@eecs.umich.edu sext<16>(bits(Op2.sw, high, low))) >> 1; 5483101Sstever@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 5493101Sstever@eecs.umich.edu } 5503101Sstever@eecs.umich.edu Dest = resTemp; 5513101Sstever@eecs.umich.edu ''', flagType="none", buildCc=False) 5523101Sstever@eecs.umich.edu buildRegDataInst("shasx", ''' 5533101Sstever@eecs.umich.edu int32_t midRes; 5543101Sstever@eecs.umich.edu resTemp = 0; 5553101Sstever@eecs.umich.edu int64_t arg1Low = sext<16>(bits(Op1.sw, 15, 0)); 5563101Sstever@eecs.umich.edu int64_t arg1High = sext<16>(bits(Op1.sw, 31, 16)); 5573101Sstever@eecs.umich.edu int64_t arg2Low = sext<16>(bits(Op2.sw, 15, 0)); 5583101Sstever@eecs.umich.edu int64_t arg2High = sext<16>(bits(Op2.sw, 31, 16)); 5593101Sstever@eecs.umich.edu midRes = (uint64_t)(arg1Low - arg2High) >> 1; 5603101Sstever@eecs.umich.edu replaceBits(resTemp, 15, 0, midRes); 5613101Sstever@eecs.umich.edu midRes = (arg1High + arg2Low) >> 1; 5623101Sstever@eecs.umich.edu replaceBits(resTemp, 31, 16, midRes); 5633101Sstever@eecs.umich.edu Dest = resTemp; 5643101Sstever@eecs.umich.edu ''', flagType="none", buildCc=True) 5653101Sstever@eecs.umich.edu buildRegDataInst("shsax", ''' 5663101Sstever@eecs.umich.edu int32_t midRes; 5673101Sstever@eecs.umich.edu resTemp = 0; 5683101Sstever@eecs.umich.edu int64_t arg1Low = sext<16>(bits(Op1.sw, 15, 0)); 5693101Sstever@eecs.umich.edu int64_t arg1High = sext<16>(bits(Op1.sw, 31, 16)); 5703101Sstever@eecs.umich.edu int64_t arg2Low = sext<16>(bits(Op2.sw, 15, 0)); 5713101Sstever@eecs.umich.edu int64_t arg2High = sext<16>(bits(Op2.sw, 31, 16)); 5723101Sstever@eecs.umich.edu midRes = (uint64_t)(arg1Low + arg2High) >> 1; 5733101Sstever@eecs.umich.edu replaceBits(resTemp, 15, 0, midRes); 5745219Ssaidi@eecs.umich.edu midRes = (uint64_t)(arg1High - arg2Low) >> 1; 5755219Ssaidi@eecs.umich.edu replaceBits(resTemp, 31, 16, midRes); 5765219Ssaidi@eecs.umich.edu Dest = resTemp; 5773101Sstever@eecs.umich.edu ''', flagType="none", buildCc=True) 5783101Sstever@eecs.umich.edu 5793101Sstever@eecs.umich.edu buildRegDataInst("uqadd16", ''' 5803101Sstever@eecs.umich.edu uint32_t midRes; 5813101Sstever@eecs.umich.edu for (unsigned i = 0; i < 2; i++) { 5823101Sstever@eecs.umich.edu int high = (i + 1) * 16 - 1; 5833101Sstever@eecs.umich.edu int low = i * 16; 5843101Sstever@eecs.umich.edu uint64_t arg1 = bits(Op1, high, low); 5853101Sstever@eecs.umich.edu uint64_t arg2 = bits(Op2, high, low); 5863101Sstever@eecs.umich.edu uSaturateOp<16>(midRes, arg1, arg2); 5873101Sstever@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 5883101Sstever@eecs.umich.edu } 5893101Sstever@eecs.umich.edu Dest = resTemp; 5903101Sstever@eecs.umich.edu ''', flagType="none", buildCc=False) 5913101Sstever@eecs.umich.edu buildRegDataInst("uqadd8", ''' 5923101Sstever@eecs.umich.edu uint32_t midRes; 5937673Snate@binkert.org for (unsigned i = 0; i < 4; i++) { 5947673Snate@binkert.org int high = (i + 1) * 8 - 1; 5957675Snate@binkert.org int low = i * 8; 5967673Snate@binkert.org uint64_t arg1 = bits(Op1, high, low); 5977675Snate@binkert.org uint64_t arg2 = bits(Op2, high, low); 5987675Snate@binkert.org uSaturateOp<8>(midRes, arg1, arg2); 5997675Snate@binkert.org replaceBits(resTemp, high, low, midRes); 6007675Snate@binkert.org } 6017675Snate@binkert.org Dest = resTemp; 6027673Snate@binkert.org ''', flagType="none", buildCc=False) 6033101Sstever@eecs.umich.edu buildRegDataInst("uqsub16", ''' 6043101Sstever@eecs.umich.edu uint32_t midRes; 6057673Snate@binkert.org for (unsigned i = 0; i < 2; i++) { 6064762Snate@binkert.org int high = (i + 1) * 16 - 1; 6077675Snate@binkert.org int low = i * 16; 6084762Snate@binkert.org uint64_t arg1 = bits(Op1, high, low); 6094762Snate@binkert.org uint64_t arg2 = bits(Op2, high, low); 6104762Snate@binkert.org uSaturateOp<16>(midRes, arg1, arg2, true); 6114762Snate@binkert.org replaceBits(resTemp, high, low, midRes); 6124762Snate@binkert.org } 6133101Sstever@eecs.umich.edu Dest = resTemp; 6143101Sstever@eecs.umich.edu ''', flagType="none", buildCc=False) 6153101Sstever@eecs.umich.edu buildRegDataInst("uqsub8", ''' 6167673Snate@binkert.org uint32_t midRes; 6174762Snate@binkert.org for (unsigned i = 0; i < 4; i++) { 6187675Snate@binkert.org int high = (i + 1) * 8 - 1; 6194762Snate@binkert.org int low = i * 8; 6204762Snate@binkert.org uint64_t arg1 = bits(Op1, high, low); 6214762Snate@binkert.org uint64_t arg2 = bits(Op2, high, low); 6224762Snate@binkert.org uSaturateOp<8>(midRes, arg1, arg2, true); 6234762Snate@binkert.org replaceBits(resTemp, high, low, midRes); 6243101Sstever@eecs.umich.edu } 6253101Sstever@eecs.umich.edu Dest = resTemp; 6263101Sstever@eecs.umich.edu ''', flagType="none", buildCc=False) 6273101Sstever@eecs.umich.edu buildRegDataInst("uqasx", ''' 6283101Sstever@eecs.umich.edu uint32_t midRes; 6293101Sstever@eecs.umich.edu uint64_t arg1Low = bits(Op1.sw, 15, 0); 6303101Sstever@eecs.umich.edu uint64_t arg1High = bits(Op1.sw, 31, 16); 6313101Sstever@eecs.umich.edu uint64_t arg2Low = bits(Op2.sw, 15, 0); 6323102Sstever@eecs.umich.edu uint64_t arg2High = bits(Op2.sw, 31, 16); 6333101Sstever@eecs.umich.edu uSaturateOp<16>(midRes, arg1Low, arg2High, true); 6343101Sstever@eecs.umich.edu replaceBits(resTemp, 15, 0, midRes); 6353101Sstever@eecs.umich.edu uSaturateOp<16>(midRes, arg1High, arg2Low); 6364762Snate@binkert.org replaceBits(resTemp, 31, 16, midRes); 6374762Snate@binkert.org Dest = resTemp; 6384762Snate@binkert.org ''', flagType="none", buildCc=False) 6393101Sstever@eecs.umich.edu buildRegDataInst("uqsax", ''' 6403101Sstever@eecs.umich.edu uint32_t midRes; 6413101Sstever@eecs.umich.edu uint64_t arg1Low = bits(Op1.sw, 15, 0); 6428934SBrad.Beckmann@amd.com uint64_t arg1High = bits(Op1.sw, 31, 16); 6438934SBrad.Beckmann@amd.com uint64_t arg2Low = bits(Op2.sw, 15, 0); 6448934SBrad.Beckmann@amd.com uint64_t arg2High = bits(Op2.sw, 31, 16); 6458934SBrad.Beckmann@amd.com uSaturateOp<16>(midRes, arg1Low, arg2High); 6468934SBrad.Beckmann@amd.com replaceBits(resTemp, 15, 0, midRes); 6473101Sstever@eecs.umich.edu uSaturateOp<16>(midRes, arg1High, arg2Low, true); 6483101Sstever@eecs.umich.edu replaceBits(resTemp, 31, 16, midRes); 6493101Sstever@eecs.umich.edu Dest = resTemp; 6503101Sstever@eecs.umich.edu ''', flagType="none", buildCc=False) 6513101Sstever@eecs.umich.edu 6523101Sstever@eecs.umich.edu buildRegDataInst("uadd16", ''' 6533101Sstever@eecs.umich.edu uint32_t geBits = 0; 6543101Sstever@eecs.umich.edu resTemp = 0; 6553101Sstever@eecs.umich.edu for (unsigned i = 0; i < 2; i++) { 6563101Sstever@eecs.umich.edu int high = (i + 1) * 16 - 1; 6573101Sstever@eecs.umich.edu int low = i * 16; 6583101Sstever@eecs.umich.edu int32_t midRes = bits(Op1, high, low) + 6593101Sstever@eecs.umich.edu bits(Op2, high, low); 6603101Sstever@eecs.umich.edu if (midRes >= 0x10000) { 6613101Sstever@eecs.umich.edu geBits = geBits | (0x3 << (i * 2)); 6623101Sstever@eecs.umich.edu } 6633101Sstever@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 6644380Sbinkertn@umich.edu } 6654380Sbinkertn@umich.edu Dest = resTemp; 6664380Sbinkertn@umich.edu resTemp = geBits; 6673101Sstever@eecs.umich.edu ''', flagType="ge", buildNonCc=False) 6684380Sbinkertn@umich.edu buildRegDataInst("uadd8", ''' 6694380Sbinkertn@umich.edu uint32_t geBits = 0; 6704380Sbinkertn@umich.edu resTemp = 0; 6713101Sstever@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 6723101Sstever@eecs.umich.edu int high = (i + 1) * 8 - 1; 6733101Sstever@eecs.umich.edu int low = i * 8; 6747673Snate@binkert.org int32_t midRes = bits(Op1, high, low) + 6757673Snate@binkert.org bits(Op2, high, low); 6767673Snate@binkert.org if (midRes >= 0x100) { 6777673Snate@binkert.org geBits = geBits | (1 << i); 6787673Snate@binkert.org } 6797673Snate@binkert.org replaceBits(resTemp, high, low, midRes); 6807673Snate@binkert.org } 6817673Snate@binkert.org Dest = resTemp; 6827673Snate@binkert.org resTemp = geBits; 6833101Sstever@eecs.umich.edu ''', flagType="ge", buildNonCc=False) 6843101Sstever@eecs.umich.edu buildRegDataInst("usub16", ''' 6853101Sstever@eecs.umich.edu uint32_t geBits = 0; 6863101Sstever@eecs.umich.edu resTemp = 0; 6873101Sstever@eecs.umich.edu for (unsigned i = 0; i < 2; i++) { 6883101Sstever@eecs.umich.edu int high = (i + 1) * 16 - 1; 6893101Sstever@eecs.umich.edu int low = i * 16; 6903101Sstever@eecs.umich.edu int32_t midRes = bits(Op1, high, low) - 6913101Sstever@eecs.umich.edu bits(Op2, high, low); 6923101Sstever@eecs.umich.edu if (midRes >= 0) { 6933101Sstever@eecs.umich.edu geBits = geBits | (0x3 << (i * 2)); 6943101Sstever@eecs.umich.edu } 6953101Sstever@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 6967743Sgblack@eecs.umich.edu } 6973101Sstever@eecs.umich.edu Dest = resTemp; 6983101Sstever@eecs.umich.edu resTemp = geBits; 6993101Sstever@eecs.umich.edu ''', flagType="ge", buildNonCc=False) 7003101Sstever@eecs.umich.edu buildRegDataInst("usub8", ''' 7013101Sstever@eecs.umich.edu uint32_t geBits = 0; 7023101Sstever@eecs.umich.edu resTemp = 0; 7034380Sbinkertn@umich.edu for (unsigned i = 0; i < 4; i++) { 7043101Sstever@eecs.umich.edu int high = (i + 1) * 8 - 1; 7053101Sstever@eecs.umich.edu int low = i * 8; 7064762Snate@binkert.org int32_t midRes = bits(Op1, high, low) - 7077677Snate@binkert.org bits(Op2, high, low); 7084762Snate@binkert.org if (midRes >= 0) { 7094762Snate@binkert.org geBits = geBits | (1 << i); 7104380Sbinkertn@umich.edu } 7114380Sbinkertn@umich.edu replaceBits(resTemp, high, low, midRes); 7123101Sstever@eecs.umich.edu } 7137777Sgblack@eecs.umich.edu Dest = resTemp; 7147777Sgblack@eecs.umich.edu resTemp = geBits; 7157777Sgblack@eecs.umich.edu ''', flagType="ge", buildNonCc=False) 7167777Sgblack@eecs.umich.edu buildRegDataInst("uasx", ''' 7177777Sgblack@eecs.umich.edu int32_t midRes, geBits = 0; 7187777Sgblack@eecs.umich.edu resTemp = 0; 7197777Sgblack@eecs.umich.edu int64_t arg1Low = bits(Op1.sw, 15, 0); 7207777Sgblack@eecs.umich.edu int64_t arg1High = bits(Op1.sw, 31, 16); 7217777Sgblack@eecs.umich.edu int64_t arg2Low = bits(Op2.sw, 15, 0); 7227777Sgblack@eecs.umich.edu int64_t arg2High = bits(Op2.sw, 31, 16); 7237777Sgblack@eecs.umich.edu midRes = arg1Low - arg2High; 7247777Sgblack@eecs.umich.edu if (midRes >= 0) { 7257777Sgblack@eecs.umich.edu geBits = geBits | 0x3; 7267777Sgblack@eecs.umich.edu } 7277777Sgblack@eecs.umich.edu replaceBits(resTemp, 15, 0, midRes); 7287777Sgblack@eecs.umich.edu midRes = arg1High + arg2Low; 7297777Sgblack@eecs.umich.edu if (midRes >= 0x10000) { 7307777Sgblack@eecs.umich.edu geBits = geBits | 0xc; 7317777Sgblack@eecs.umich.edu } 7327777Sgblack@eecs.umich.edu replaceBits(resTemp, 31, 16, midRes); 7337777Sgblack@eecs.umich.edu Dest = resTemp; 7347777Sgblack@eecs.umich.edu resTemp = geBits; 7357777Sgblack@eecs.umich.edu ''', flagType="ge", buildNonCc=False) 7368579Ssteve.reinhardt@amd.com buildRegDataInst("usax", ''' 7378579Ssteve.reinhardt@amd.com int32_t midRes, geBits = 0; 7388579Ssteve.reinhardt@amd.com resTemp = 0; 7398579Ssteve.reinhardt@amd.com int64_t arg1Low = bits(Op1.sw, 15, 0); 7408579Ssteve.reinhardt@amd.com int64_t arg1High = bits(Op1.sw, 31, 16); 7418579Ssteve.reinhardt@amd.com int64_t arg2Low = bits(Op2.sw, 15, 0); 7428579Ssteve.reinhardt@amd.com int64_t arg2High = bits(Op2.sw, 31, 16); 7438579Ssteve.reinhardt@amd.com midRes = arg1Low + arg2High; 7448579Ssteve.reinhardt@amd.com if (midRes >= 0x10000) { 7458579Ssteve.reinhardt@amd.com geBits = geBits | 0x3; 7468579Ssteve.reinhardt@amd.com } 7478579Ssteve.reinhardt@amd.com replaceBits(resTemp, 15, 0, midRes); 7488579Ssteve.reinhardt@amd.com midRes = arg1High - arg2Low; 7498579Ssteve.reinhardt@amd.com if (midRes >= 0) { 7508579Ssteve.reinhardt@amd.com geBits = geBits | 0xc; 7518579Ssteve.reinhardt@amd.com } 7528579Ssteve.reinhardt@amd.com replaceBits(resTemp, 31, 16, midRes); 7538579Ssteve.reinhardt@amd.com Dest = resTemp; 7547777Sgblack@eecs.umich.edu resTemp = geBits; 7557777Sgblack@eecs.umich.edu ''', flagType="ge", buildNonCc=False) 7567798Sgblack@eecs.umich.edu 7577777Sgblack@eecs.umich.edu buildRegDataInst("uhadd16", ''' 7587777Sgblack@eecs.umich.edu resTemp = 0; 7597777Sgblack@eecs.umich.edu for (unsigned i = 0; i < 2; i++) { 7607777Sgblack@eecs.umich.edu int high = (i + 1) * 16 - 1; 7617777Sgblack@eecs.umich.edu int low = i * 16; 7627777Sgblack@eecs.umich.edu int32_t midRes = (bits(Op1, high, low) + 7637777Sgblack@eecs.umich.edu bits(Op2, high, low)) >> 1; 7647777Sgblack@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 7657777Sgblack@eecs.umich.edu } 7667777Sgblack@eecs.umich.edu Dest = resTemp; 7677777Sgblack@eecs.umich.edu ''', flagType="none", buildCc=False) 7687777Sgblack@eecs.umich.edu buildRegDataInst("uhadd8", ''' 7697777Sgblack@eecs.umich.edu resTemp = 0; 7707777Sgblack@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 7717777Sgblack@eecs.umich.edu int high = (i + 1) * 8 - 1; 7727777Sgblack@eecs.umich.edu int low = i * 8; 7737777Sgblack@eecs.umich.edu int32_t midRes = (bits(Op1, high, low) + 7747777Sgblack@eecs.umich.edu bits(Op2, high, low)) >> 1; 7757777Sgblack@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 7767777Sgblack@eecs.umich.edu } 7777777Sgblack@eecs.umich.edu Dest = resTemp; 7787777Sgblack@eecs.umich.edu ''', flagType="none", buildCc=False) 7797777Sgblack@eecs.umich.edu buildRegDataInst("uhsub16", ''' 7807777Sgblack@eecs.umich.edu resTemp = 0; 7817777Sgblack@eecs.umich.edu for (unsigned i = 0; i < 2; i++) { 7827777Sgblack@eecs.umich.edu int high = (i + 1) * 16 - 1; 7837777Sgblack@eecs.umich.edu int low = i * 16; 7847777Sgblack@eecs.umich.edu int32_t midRes = (bits(Op1, high, low) - 7857777Sgblack@eecs.umich.edu bits(Op2, high, low)) >> 1; 7867777Sgblack@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 7877777Sgblack@eecs.umich.edu } 7887777Sgblack@eecs.umich.edu Dest = resTemp; 7897777Sgblack@eecs.umich.edu ''', flagType="none", buildCc=False) 7907777Sgblack@eecs.umich.edu buildRegDataInst("uhsub8", ''' 7917777Sgblack@eecs.umich.edu resTemp = 0; 7927777Sgblack@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 7937777Sgblack@eecs.umich.edu int high = (i + 1) * 8 - 1; 7947777Sgblack@eecs.umich.edu int low = i * 8; 7957777Sgblack@eecs.umich.edu int32_t midRes = (bits(Op1, high, low) - 7967777Sgblack@eecs.umich.edu bits(Op2, high, low)) >> 1; 7977777Sgblack@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 7987777Sgblack@eecs.umich.edu } 7997777Sgblack@eecs.umich.edu Dest = resTemp; 8007777Sgblack@eecs.umich.edu ''', flagType="none", buildCc=False) 8017777Sgblack@eecs.umich.edu buildRegDataInst("uhasx", ''' 8027777Sgblack@eecs.umich.edu int32_t midRes; 8037777Sgblack@eecs.umich.edu resTemp = 0; 8047777Sgblack@eecs.umich.edu int64_t arg1Low = bits(Op1.sw, 15, 0); 8057777Sgblack@eecs.umich.edu int64_t arg1High = bits(Op1.sw, 31, 16); 8067777Sgblack@eecs.umich.edu int64_t arg2Low = bits(Op2.sw, 15, 0); 8077777Sgblack@eecs.umich.edu int64_t arg2High = bits(Op2.sw, 31, 16); 8087777Sgblack@eecs.umich.edu midRes = (arg1Low - arg2High) >> 1; 8097777Sgblack@eecs.umich.edu replaceBits(resTemp, 15, 0, midRes); 8107777Sgblack@eecs.umich.edu midRes = (arg1High + arg2Low) >> 1; 8117777Sgblack@eecs.umich.edu replaceBits(resTemp, 31, 16, midRes); 8128579Ssteve.reinhardt@amd.com Dest = resTemp; 8138579Ssteve.reinhardt@amd.com ''', flagType="none", buildCc=False) 8148579Ssteve.reinhardt@amd.com buildRegDataInst("uhsax", ''' 8158579Ssteve.reinhardt@amd.com int32_t midRes; 8168579Ssteve.reinhardt@amd.com resTemp = 0; 8178579Ssteve.reinhardt@amd.com int64_t arg1Low = bits(Op1.sw, 15, 0); 8188579Ssteve.reinhardt@amd.com int64_t arg1High = bits(Op1.sw, 31, 16); 8198579Ssteve.reinhardt@amd.com int64_t arg2Low = bits(Op2.sw, 15, 0); 8208579Ssteve.reinhardt@amd.com int64_t arg2High = bits(Op2.sw, 31, 16); 8218579Ssteve.reinhardt@amd.com midRes = (arg1Low + arg2High) >> 1; 8228579Ssteve.reinhardt@amd.com replaceBits(resTemp, 15, 0, midRes); 8238579Ssteve.reinhardt@amd.com midRes = (arg1High - arg2Low) >> 1; 8248579Ssteve.reinhardt@amd.com replaceBits(resTemp, 31, 16, midRes); 8258579Ssteve.reinhardt@amd.com Dest = resTemp; 8267777Sgblack@eecs.umich.edu ''', flagType="none", buildCc=False) 8277777Sgblack@eecs.umich.edu 8287777Sgblack@eecs.umich.edu buildRegDataInst("pkhbt", ''' 8297777Sgblack@eecs.umich.edu uint32_t resTemp = 0; 8307777Sgblack@eecs.umich.edu uint16_t arg1Low = bits(Op1, 15, 0); 8317777Sgblack@eecs.umich.edu uint16_t arg2High = bits(secondOp, 31, 16); 8327777Sgblack@eecs.umich.edu replaceBits(resTemp, 15, 0, arg1Low); 8337777Sgblack@eecs.umich.edu replaceBits(resTemp, 31, 16, arg2High); 8347777Sgblack@eecs.umich.edu Dest = resTemp; 8357777Sgblack@eecs.umich.edu ''', flagType="none", buildCc=False) 8367777Sgblack@eecs.umich.edu buildRegDataInst("pkhtb", ''' 8377777Sgblack@eecs.umich.edu uint32_t resTemp = 0; 8387777Sgblack@eecs.umich.edu uint16_t arg1High = bits(Op1, 31, 16); 8397777Sgblack@eecs.umich.edu uint16_t arg2Low = bits(secondOp, 15, 0); 8407777Sgblack@eecs.umich.edu replaceBits(resTemp, 15, 0, arg2Low); 8417777Sgblack@eecs.umich.edu replaceBits(resTemp, 31, 16, arg1High); 8427777Sgblack@eecs.umich.edu Dest = resTemp; 8437777Sgblack@eecs.umich.edu ''', flagType="none", buildCc=False) 8447777Sgblack@eecs.umich.edu}}; 8457777Sgblack@eecs.umich.edu