data.isa revision 7214
17138Sgblack@eecs.umich.edu// -*- mode:c++ -*- 27138Sgblack@eecs.umich.edu 37138Sgblack@eecs.umich.edu// Copyright (c) 2010 ARM Limited 47138Sgblack@eecs.umich.edu// All rights reserved 57138Sgblack@eecs.umich.edu// 67138Sgblack@eecs.umich.edu// The license below extends only to copyright in the software and shall 77138Sgblack@eecs.umich.edu// not be construed as granting a license to any other intellectual 87138Sgblack@eecs.umich.edu// property including but not limited to intellectual property relating 97138Sgblack@eecs.umich.edu// to a hardware implementation of the functionality of the software 107138Sgblack@eecs.umich.edu// licensed hereunder. You may use the software subject to the license 117138Sgblack@eecs.umich.edu// terms below provided that you ensure that this notice is replicated 127138Sgblack@eecs.umich.edu// unmodified and in its entirety in all distributions of the software, 137138Sgblack@eecs.umich.edu// modified or unmodified, in source code or in binary form. 147138Sgblack@eecs.umich.edu// 157138Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 167138Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 177138Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 187138Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 197138Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 207138Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 217138Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 227138Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 237138Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 247138Sgblack@eecs.umich.edu// this software without specific prior written permission. 257138Sgblack@eecs.umich.edu// 267138Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 277138Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 287138Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 297138Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 307138Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 317138Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 327138Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 337138Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 347138Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 357138Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 367138Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 377138Sgblack@eecs.umich.edu// 387138Sgblack@eecs.umich.edu// Authors: Gabe Black 397138Sgblack@eecs.umich.edu 407138Sgblack@eecs.umich.edulet {{ 417138Sgblack@eecs.umich.edu 427138Sgblack@eecs.umich.edu header_output = "" 437138Sgblack@eecs.umich.edu decoder_output = "" 447138Sgblack@eecs.umich.edu exec_output = "" 457138Sgblack@eecs.umich.edu 467214Sgblack@eecs.umich.edu calcGECode = ''' 477214Sgblack@eecs.umich.edu CondCodes = insertBits(CondCodes, 19, 16, resTemp); 487214Sgblack@eecs.umich.edu ''' 497214Sgblack@eecs.umich.edu 507138Sgblack@eecs.umich.edu calcQCode = ''' 517193Sgblack@eecs.umich.edu CondCodes = CondCodes | ((resTemp & 1) << 27); 527138Sgblack@eecs.umich.edu ''' 537138Sgblack@eecs.umich.edu 547138Sgblack@eecs.umich.edu calcCcCode = ''' 557138Sgblack@eecs.umich.edu uint16_t _ic, _iv, _iz, _in; 567138Sgblack@eecs.umich.edu _in = (resTemp >> %(negBit)d) & 1; 577138Sgblack@eecs.umich.edu _iz = (resTemp == 0); 587138Sgblack@eecs.umich.edu _iv = %(ivValue)s & 1; 597138Sgblack@eecs.umich.edu _ic = %(icValue)s & 1; 607138Sgblack@eecs.umich.edu 617138Sgblack@eecs.umich.edu CondCodes = _in << 31 | _iz << 30 | _ic << 29 | _iv << 28 | 627138Sgblack@eecs.umich.edu (CondCodes & 0x0FFFFFFF); 637138Sgblack@eecs.umich.edu 647138Sgblack@eecs.umich.edu DPRINTF(Arm, "(in, iz, ic, iv) = (%%d, %%d, %%d, %%d)\\n", 657138Sgblack@eecs.umich.edu _in, _iz, _ic, _iv); 667138Sgblack@eecs.umich.edu ''' 677138Sgblack@eecs.umich.edu 687138Sgblack@eecs.umich.edu # Dict of code to set the carry flag. (imm, reg, reg-reg) 697138Sgblack@eecs.umich.edu oldC = 'CondCodes<29:>' 707138Sgblack@eecs.umich.edu oldV = 'CondCodes<28:>' 717138Sgblack@eecs.umich.edu carryCode = { 727138Sgblack@eecs.umich.edu "none": (oldC, oldC, oldC), 737138Sgblack@eecs.umich.edu "llbit": (oldC, oldC, oldC), 747193Sgblack@eecs.umich.edu "saturate": ('0', '0', '0'), 757138Sgblack@eecs.umich.edu "overflow": ('0', '0', '0'), 767138Sgblack@eecs.umich.edu "add": ('findCarry(32, resTemp, Op1, secondOp)', 777138Sgblack@eecs.umich.edu 'findCarry(32, resTemp, Op1, secondOp)', 787138Sgblack@eecs.umich.edu 'findCarry(32, resTemp, Op1, secondOp)'), 797138Sgblack@eecs.umich.edu "sub": ('findCarry(32, resTemp, Op1, ~secondOp)', 807138Sgblack@eecs.umich.edu 'findCarry(32, resTemp, Op1, ~secondOp)', 817138Sgblack@eecs.umich.edu 'findCarry(32, resTemp, Op1, ~secondOp)'), 827138Sgblack@eecs.umich.edu "rsb": ('findCarry(32, resTemp, secondOp, ~Op1)', 837138Sgblack@eecs.umich.edu 'findCarry(32, resTemp, secondOp, ~Op1)', 847138Sgblack@eecs.umich.edu 'findCarry(32, resTemp, secondOp, ~Op1)'), 857138Sgblack@eecs.umich.edu "logic": ('(rotC ? bits(secondOp, 31) : %s)' % oldC, 867138Sgblack@eecs.umich.edu 'shift_carry_imm(Op2, shiftAmt, shiftType, %s)' % oldC, 877138Sgblack@eecs.umich.edu 'shift_carry_rs(Op2, Shift<7:0>, shiftType, %s)' % oldC) 887138Sgblack@eecs.umich.edu } 897138Sgblack@eecs.umich.edu # Dict of code to set the overflow flag. 907138Sgblack@eecs.umich.edu overflowCode = { 917138Sgblack@eecs.umich.edu "none": oldV, 927138Sgblack@eecs.umich.edu "llbit": oldV, 937193Sgblack@eecs.umich.edu "saturate": '0', 947138Sgblack@eecs.umich.edu "overflow": '0', 957138Sgblack@eecs.umich.edu "add": 'findOverflow(32, resTemp, Op1, secondOp)', 967138Sgblack@eecs.umich.edu "sub": 'findOverflow(32, resTemp, Op1, ~secondOp)', 977138Sgblack@eecs.umich.edu "rsb": 'findOverflow(32, resTemp, secondOp, ~Op1)', 987138Sgblack@eecs.umich.edu "logic": oldV 997138Sgblack@eecs.umich.edu } 1007138Sgblack@eecs.umich.edu 1017138Sgblack@eecs.umich.edu secondOpRe = re.compile("secondOp") 1027138Sgblack@eecs.umich.edu immOp2 = "imm" 1037138Sgblack@eecs.umich.edu regOp2 = "shift_rm_imm(Op2, shiftAmt, shiftType, CondCodes<29:>)" 1047181Sgblack@eecs.umich.edu regRegOp2 = "shift_rm_rs(Op2, Shift<7:0>, shiftType, CondCodes<29:>)" 1057138Sgblack@eecs.umich.edu 1067193Sgblack@eecs.umich.edu def buildImmDataInst(mnem, code, flagType = "logic", suffix = "Imm", \ 1077193Sgblack@eecs.umich.edu buildCc = True, buildNonCc = True): 1087138Sgblack@eecs.umich.edu cCode = carryCode[flagType] 1097138Sgblack@eecs.umich.edu vCode = overflowCode[flagType] 1107138Sgblack@eecs.umich.edu negBit = 31 1117138Sgblack@eecs.umich.edu if flagType == "llbit": 1127138Sgblack@eecs.umich.edu negBit = 63 1137193Sgblack@eecs.umich.edu if flagType == "saturate": 1147184Sgblack@eecs.umich.edu immCcCode = calcQCode 1157214Sgblack@eecs.umich.edu elif flagType == "ge": 1167214Sgblack@eecs.umich.edu immCcCode = calcGECode 1177138Sgblack@eecs.umich.edu else: 1187138Sgblack@eecs.umich.edu immCcCode = calcCcCode % { 1197138Sgblack@eecs.umich.edu "icValue": secondOpRe.sub(immOp2, cCode[0]), 1207138Sgblack@eecs.umich.edu "ivValue": secondOpRe.sub(immOp2, vCode), 1217138Sgblack@eecs.umich.edu "negBit": negBit 1227138Sgblack@eecs.umich.edu } 1237184Sgblack@eecs.umich.edu immCode = secondOpRe.sub(immOp2, code) 1247188Sgblack@eecs.umich.edu immIop = InstObjParams(mnem, mnem.capitalize() + suffix, "DataImmOp", 1257184Sgblack@eecs.umich.edu {"code" : immCode, 1267184Sgblack@eecs.umich.edu "predicate_test": predicateTest}) 1277188Sgblack@eecs.umich.edu immIopCc = InstObjParams(mnem + "s", mnem.capitalize() + suffix + "Cc", 1287184Sgblack@eecs.umich.edu "DataImmOp", 1297184Sgblack@eecs.umich.edu {"code" : immCode + immCcCode, 1307184Sgblack@eecs.umich.edu "predicate_test": predicateTest}) 1317184Sgblack@eecs.umich.edu 1327188Sgblack@eecs.umich.edu def subst(iop): 1337188Sgblack@eecs.umich.edu global header_output, decoder_output, exec_output 1347188Sgblack@eecs.umich.edu header_output += DataImmDeclare.subst(iop) 1357188Sgblack@eecs.umich.edu decoder_output += DataImmConstructor.subst(iop) 1367188Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(iop) 1377188Sgblack@eecs.umich.edu 1387193Sgblack@eecs.umich.edu if buildNonCc: 1397193Sgblack@eecs.umich.edu subst(immIop) 1407188Sgblack@eecs.umich.edu if buildCc: 1417188Sgblack@eecs.umich.edu subst(immIopCc) 1427188Sgblack@eecs.umich.edu 1437193Sgblack@eecs.umich.edu def buildRegDataInst(mnem, code, flagType = "logic", suffix = "Reg", \ 1447193Sgblack@eecs.umich.edu buildCc = True, buildNonCc = True): 1457184Sgblack@eecs.umich.edu cCode = carryCode[flagType] 1467184Sgblack@eecs.umich.edu vCode = overflowCode[flagType] 1477184Sgblack@eecs.umich.edu negBit = 31 1487184Sgblack@eecs.umich.edu if flagType == "llbit": 1497184Sgblack@eecs.umich.edu negBit = 63 1507193Sgblack@eecs.umich.edu if flagType == "saturate": 1517184Sgblack@eecs.umich.edu regCcCode = calcQCode 1527214Sgblack@eecs.umich.edu elif flagType == "ge": 1537214Sgblack@eecs.umich.edu immCcCode = calcGECode 1547184Sgblack@eecs.umich.edu else: 1557138Sgblack@eecs.umich.edu regCcCode = calcCcCode % { 1567138Sgblack@eecs.umich.edu "icValue": secondOpRe.sub(regOp2, cCode[1]), 1577138Sgblack@eecs.umich.edu "ivValue": secondOpRe.sub(regOp2, vCode), 1587138Sgblack@eecs.umich.edu "negBit": negBit 1597138Sgblack@eecs.umich.edu } 1607184Sgblack@eecs.umich.edu regCode = secondOpRe.sub(regOp2, code) 1617188Sgblack@eecs.umich.edu regIop = InstObjParams(mnem, mnem.capitalize() + suffix, "DataRegOp", 1627184Sgblack@eecs.umich.edu {"code" : regCode, 1637184Sgblack@eecs.umich.edu "predicate_test": predicateTest}) 1647188Sgblack@eecs.umich.edu regIopCc = InstObjParams(mnem + "s", mnem.capitalize() + suffix + "Cc", 1657184Sgblack@eecs.umich.edu "DataRegOp", 1667184Sgblack@eecs.umich.edu {"code" : regCode + regCcCode, 1677184Sgblack@eecs.umich.edu "predicate_test": predicateTest}) 1687184Sgblack@eecs.umich.edu 1697188Sgblack@eecs.umich.edu def subst(iop): 1707188Sgblack@eecs.umich.edu global header_output, decoder_output, exec_output 1717188Sgblack@eecs.umich.edu header_output += DataRegDeclare.subst(iop) 1727188Sgblack@eecs.umich.edu decoder_output += DataRegConstructor.subst(iop) 1737188Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(iop) 1747188Sgblack@eecs.umich.edu 1757193Sgblack@eecs.umich.edu if buildNonCc: 1767193Sgblack@eecs.umich.edu subst(regIop) 1777188Sgblack@eecs.umich.edu if buildCc: 1787188Sgblack@eecs.umich.edu subst(regIopCc) 1797188Sgblack@eecs.umich.edu 1807188Sgblack@eecs.umich.edu def buildRegRegDataInst(mnem, code, flagType = "logic", \ 1817193Sgblack@eecs.umich.edu suffix = "RegReg", \ 1827193Sgblack@eecs.umich.edu buildCc = True, buildNonCc = True): 1837184Sgblack@eecs.umich.edu cCode = carryCode[flagType] 1847184Sgblack@eecs.umich.edu vCode = overflowCode[flagType] 1857184Sgblack@eecs.umich.edu negBit = 31 1867184Sgblack@eecs.umich.edu if flagType == "llbit": 1877184Sgblack@eecs.umich.edu negBit = 63 1887193Sgblack@eecs.umich.edu if flagType == "saturate": 1897184Sgblack@eecs.umich.edu regRegCcCode = calcQCode 1907214Sgblack@eecs.umich.edu elif flagType == "ge": 1917214Sgblack@eecs.umich.edu immCcCode = calcGECode 1927184Sgblack@eecs.umich.edu else: 1937138Sgblack@eecs.umich.edu regRegCcCode = calcCcCode % { 1947138Sgblack@eecs.umich.edu "icValue": secondOpRe.sub(regRegOp2, cCode[2]), 1957138Sgblack@eecs.umich.edu "ivValue": secondOpRe.sub(regRegOp2, vCode), 1967138Sgblack@eecs.umich.edu "negBit": negBit 1977138Sgblack@eecs.umich.edu } 1987138Sgblack@eecs.umich.edu regRegCode = secondOpRe.sub(regRegOp2, code) 1997188Sgblack@eecs.umich.edu regRegIop = InstObjParams(mnem, mnem.capitalize() + suffix, 2007138Sgblack@eecs.umich.edu "DataRegRegOp", 2017138Sgblack@eecs.umich.edu {"code" : regRegCode, 2027138Sgblack@eecs.umich.edu "predicate_test": predicateTest}) 2037138Sgblack@eecs.umich.edu regRegIopCc = InstObjParams(mnem + "s", 2047188Sgblack@eecs.umich.edu mnem.capitalize() + suffix + "Cc", 2057138Sgblack@eecs.umich.edu "DataRegRegOp", 2067138Sgblack@eecs.umich.edu {"code" : regRegCode + regRegCcCode, 2077138Sgblack@eecs.umich.edu "predicate_test": predicateTest}) 2087138Sgblack@eecs.umich.edu 2097188Sgblack@eecs.umich.edu def subst(iop): 2107188Sgblack@eecs.umich.edu global header_output, decoder_output, exec_output 2117188Sgblack@eecs.umich.edu header_output += DataRegRegDeclare.subst(iop) 2127188Sgblack@eecs.umich.edu decoder_output += DataRegRegConstructor.subst(iop) 2137188Sgblack@eecs.umich.edu exec_output += PredOpExecute.subst(iop) 2147184Sgblack@eecs.umich.edu 2157193Sgblack@eecs.umich.edu if buildNonCc: 2167193Sgblack@eecs.umich.edu subst(regRegIop) 2177188Sgblack@eecs.umich.edu if buildCc: 2187188Sgblack@eecs.umich.edu subst(regRegIopCc) 2197188Sgblack@eecs.umich.edu 2207188Sgblack@eecs.umich.edu def buildDataInst(mnem, code, flagType = "logic", \ 2217188Sgblack@eecs.umich.edu aiw = True, regRegAiw = True, 2227188Sgblack@eecs.umich.edu subsPcLr = True): 2237188Sgblack@eecs.umich.edu regRegCode = instCode = code 2247188Sgblack@eecs.umich.edu if aiw: 2257188Sgblack@eecs.umich.edu instCode = "AIW" + instCode 2267188Sgblack@eecs.umich.edu if regRegAiw: 2277188Sgblack@eecs.umich.edu regRegCode = "AIW" + regRegCode 2287188Sgblack@eecs.umich.edu 2297188Sgblack@eecs.umich.edu buildImmDataInst(mnem, instCode, flagType) 2307188Sgblack@eecs.umich.edu buildRegDataInst(mnem, instCode, flagType) 2317188Sgblack@eecs.umich.edu buildRegRegDataInst(mnem, regRegCode, flagType) 2327188Sgblack@eecs.umich.edu if subsPcLr: 2337188Sgblack@eecs.umich.edu code += ''' 2347188Sgblack@eecs.umich.edu uint32_t newCpsr = 2357188Sgblack@eecs.umich.edu cpsrWriteByInstr(Cpsr | CondCodes, Spsr, 0xF, true); 2367188Sgblack@eecs.umich.edu Cpsr = ~CondCodesMask & newCpsr; 2377188Sgblack@eecs.umich.edu CondCodes = CondCodesMask & newCpsr; 2387188Sgblack@eecs.umich.edu ''' 2397188Sgblack@eecs.umich.edu buildImmDataInst(mnem + 's', code, flagType, 2407188Sgblack@eecs.umich.edu suffix = "ImmPclr", buildCc = False) 2417188Sgblack@eecs.umich.edu buildRegDataInst(mnem + 's', code, flagType, 2427188Sgblack@eecs.umich.edu suffix = "RegPclr", buildCc = False) 2437188Sgblack@eecs.umich.edu 2447188Sgblack@eecs.umich.edu buildDataInst("and", "Dest = resTemp = Op1 & secondOp;") 2457188Sgblack@eecs.umich.edu buildDataInst("eor", "Dest = resTemp = Op1 ^ secondOp;") 2467188Sgblack@eecs.umich.edu buildDataInst("sub", "Dest = resTemp = Op1 - secondOp;", "sub") 2477188Sgblack@eecs.umich.edu buildDataInst("rsb", "Dest = resTemp = secondOp - Op1;", "rsb") 2487188Sgblack@eecs.umich.edu buildDataInst("add", "Dest = resTemp = Op1 + secondOp;", "add") 2497185Sgblack@eecs.umich.edu buildImmDataInst("adr", ''' 2507188Sgblack@eecs.umich.edu Dest = resTemp = (readPC(xc) & ~0x3) + 2517185Sgblack@eecs.umich.edu (op1 ? secondOp : -secondOp); 2527185Sgblack@eecs.umich.edu ''') 2537188Sgblack@eecs.umich.edu buildDataInst("adc", "Dest = resTemp = Op1 + secondOp + %s;" % oldC, "add") 2547188Sgblack@eecs.umich.edu buildDataInst("sbc", "Dest = resTemp = Op1 - secondOp - !%s;" % oldC, "sub") 2557188Sgblack@eecs.umich.edu buildDataInst("rsc", "Dest = resTemp = secondOp - Op1 - !%s;" % oldC, "rsb") 2567188Sgblack@eecs.umich.edu buildDataInst("tst", "resTemp = Op1 & secondOp;", aiw = False) 2577188Sgblack@eecs.umich.edu buildDataInst("teq", "resTemp = Op1 ^ secondOp;", aiw = False) 2587188Sgblack@eecs.umich.edu buildDataInst("cmp", "resTemp = Op1 - secondOp;", "sub", aiw = False) 2597188Sgblack@eecs.umich.edu buildDataInst("cmn", "resTemp = Op1 + secondOp;", "add", aiw = False) 2607188Sgblack@eecs.umich.edu buildDataInst("orr", "Dest = resTemp = Op1 | secondOp;") 2617188Sgblack@eecs.umich.edu buildDataInst("orn", "Dest = resTemp = Op1 | ~secondOp;", aiw = False) 2627188Sgblack@eecs.umich.edu buildDataInst("mov", "Dest = resTemp = secondOp;", regRegAiw = False) 2637188Sgblack@eecs.umich.edu buildDataInst("bic", "Dest = resTemp = Op1 & ~secondOp;") 2647188Sgblack@eecs.umich.edu buildDataInst("mvn", "Dest = resTemp = ~secondOp;") 2657156Sgblack@eecs.umich.edu buildDataInst("movt", 2667188Sgblack@eecs.umich.edu "Dest = resTemp = insertBits(Op1, 31, 16, secondOp);", 2677188Sgblack@eecs.umich.edu aiw = False) 2687193Sgblack@eecs.umich.edu 2697193Sgblack@eecs.umich.edu buildRegDataInst("qadd", ''' 2707193Sgblack@eecs.umich.edu int32_t midRes; 2717193Sgblack@eecs.umich.edu resTemp = saturateOp<32>(midRes, Op1.sw, Op2.sw); 2727193Sgblack@eecs.umich.edu Dest = midRes; 2737193Sgblack@eecs.umich.edu ''', flagType="saturate", buildNonCc=False) 2747193Sgblack@eecs.umich.edu buildRegDataInst("qadd16", ''' 2757193Sgblack@eecs.umich.edu int32_t midRes; 2767193Sgblack@eecs.umich.edu for (unsigned i = 0; i < 2; i++) { 2777193Sgblack@eecs.umich.edu int high = (i + 1) * 16 - 1; 2787193Sgblack@eecs.umich.edu int low = i * 16; 2797193Sgblack@eecs.umich.edu int64_t arg1 = sext<16>(bits(Op1.sw, high, low)); 2807193Sgblack@eecs.umich.edu int64_t arg2 = sext<16>(bits(Op2.sw, high, low)); 2817193Sgblack@eecs.umich.edu saturateOp<16>(midRes, arg1, arg2); 2827193Sgblack@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 2837193Sgblack@eecs.umich.edu } 2847193Sgblack@eecs.umich.edu Dest = resTemp; 2857193Sgblack@eecs.umich.edu ''', flagType="none", buildCc=False) 2867193Sgblack@eecs.umich.edu buildRegDataInst("qadd8", ''' 2877193Sgblack@eecs.umich.edu int32_t midRes; 2887193Sgblack@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 2897193Sgblack@eecs.umich.edu int high = (i + 1) * 8 - 1; 2907193Sgblack@eecs.umich.edu int low = i * 8; 2917193Sgblack@eecs.umich.edu int64_t arg1 = sext<8>(bits(Op1.sw, high, low)); 2927193Sgblack@eecs.umich.edu int64_t arg2 = sext<8>(bits(Op2.sw, high, low)); 2937193Sgblack@eecs.umich.edu saturateOp<8>(midRes, arg1, arg2); 2947193Sgblack@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 2957193Sgblack@eecs.umich.edu } 2967193Sgblack@eecs.umich.edu Dest = resTemp; 2977193Sgblack@eecs.umich.edu ''', flagType="none", buildCc=False) 2987193Sgblack@eecs.umich.edu buildRegDataInst("qdadd", ''' 2997193Sgblack@eecs.umich.edu int32_t midRes; 3007193Sgblack@eecs.umich.edu resTemp = saturateOp<32>(midRes, Op2.sw, Op2.sw) | 3017193Sgblack@eecs.umich.edu saturateOp<32>(midRes, Op1.sw, midRes); 3027193Sgblack@eecs.umich.edu Dest = midRes; 3037193Sgblack@eecs.umich.edu ''', flagType="saturate", buildNonCc=False) 3047193Sgblack@eecs.umich.edu buildRegDataInst("qsub", ''' 3057193Sgblack@eecs.umich.edu int32_t midRes; 3067193Sgblack@eecs.umich.edu resTemp = saturateOp<32>(midRes, Op1.sw, Op2.sw, true); 3077193Sgblack@eecs.umich.edu Dest = midRes; 3087193Sgblack@eecs.umich.edu ''', flagType="saturate") 3097193Sgblack@eecs.umich.edu buildRegDataInst("qsub16", ''' 3107193Sgblack@eecs.umich.edu int32_t midRes; 3117193Sgblack@eecs.umich.edu for (unsigned i = 0; i < 2; i++) { 3127193Sgblack@eecs.umich.edu int high = (i + 1) * 16 - 1; 3137193Sgblack@eecs.umich.edu int low = i * 16; 3147193Sgblack@eecs.umich.edu int64_t arg1 = sext<16>(bits(Op1.sw, high, low)); 3157193Sgblack@eecs.umich.edu int64_t arg2 = sext<16>(bits(Op2.sw, high, low)); 3167193Sgblack@eecs.umich.edu saturateOp<16>(midRes, arg1, arg2, true); 3177193Sgblack@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 3187193Sgblack@eecs.umich.edu } 3197193Sgblack@eecs.umich.edu Dest = resTemp; 3207193Sgblack@eecs.umich.edu ''', flagType="none", buildCc=False) 3217193Sgblack@eecs.umich.edu buildRegDataInst("qsub8", ''' 3227193Sgblack@eecs.umich.edu int32_t midRes; 3237193Sgblack@eecs.umich.edu for (unsigned i = 0; i < 4; i++) { 3247193Sgblack@eecs.umich.edu int high = (i + 1) * 8 - 1; 3257193Sgblack@eecs.umich.edu int low = i * 8; 3267193Sgblack@eecs.umich.edu int64_t arg1 = sext<8>(bits(Op1.sw, high, low)); 3277193Sgblack@eecs.umich.edu int64_t arg2 = sext<8>(bits(Op2.sw, high, low)); 3287193Sgblack@eecs.umich.edu saturateOp<8>(midRes, arg1, arg2, true); 3297193Sgblack@eecs.umich.edu replaceBits(resTemp, high, low, midRes); 3307193Sgblack@eecs.umich.edu } 3317193Sgblack@eecs.umich.edu Dest = resTemp; 3327193Sgblack@eecs.umich.edu ''', flagType="none", buildCc=False) 3337193Sgblack@eecs.umich.edu buildRegDataInst("qdsub", ''' 3347193Sgblack@eecs.umich.edu int32_t midRes; 3357193Sgblack@eecs.umich.edu resTemp = saturateOp<32>(midRes, Op2.sw, Op2.sw) | 3367193Sgblack@eecs.umich.edu saturateOp<32>(midRes, Op1.sw, midRes, true); 3377193Sgblack@eecs.umich.edu Dest = midRes; 3387193Sgblack@eecs.umich.edu ''', flagType="saturate", buildNonCc=False) 3397193Sgblack@eecs.umich.edu buildRegDataInst("qasx", ''' 3407193Sgblack@eecs.umich.edu int32_t midRes; 3417193Sgblack@eecs.umich.edu int64_t arg1Low = sext<16>(bits(Op1.sw, 15, 0)); 3427193Sgblack@eecs.umich.edu int64_t arg1High = sext<16>(bits(Op1.sw, 31, 16)); 3437193Sgblack@eecs.umich.edu int64_t arg2Low = sext<16>(bits(Op2.sw, 15, 0)); 3447193Sgblack@eecs.umich.edu int64_t arg2High = sext<16>(bits(Op2.sw, 31, 16)); 3457193Sgblack@eecs.umich.edu saturateOp<16>(midRes, arg1Low, arg2High, true); 3467193Sgblack@eecs.umich.edu replaceBits(resTemp, 15, 0, midRes); 3477193Sgblack@eecs.umich.edu saturateOp<16>(midRes, arg1High, arg2Low); 3487193Sgblack@eecs.umich.edu replaceBits(resTemp, 31, 16, midRes); 3497193Sgblack@eecs.umich.edu Dest = resTemp; 3507193Sgblack@eecs.umich.edu ''', flagType="none", buildCc=False) 3517193Sgblack@eecs.umich.edu buildRegDataInst("qsax", ''' 3527193Sgblack@eecs.umich.edu int32_t midRes; 3537193Sgblack@eecs.umich.edu int64_t arg1Low = sext<16>(bits(Op1.sw, 15, 0)); 3547193Sgblack@eecs.umich.edu int64_t arg1High = sext<16>(bits(Op1.sw, 31, 16)); 3557193Sgblack@eecs.umich.edu int64_t arg2Low = sext<16>(bits(Op2.sw, 15, 0)); 3567193Sgblack@eecs.umich.edu int64_t arg2High = sext<16>(bits(Op2.sw, 31, 16)); 3577193Sgblack@eecs.umich.edu saturateOp<16>(midRes, arg1Low, arg2High); 3587193Sgblack@eecs.umich.edu replaceBits(resTemp, 15, 0, midRes); 3597193Sgblack@eecs.umich.edu saturateOp<16>(midRes, arg1High, arg2Low, true); 3607193Sgblack@eecs.umich.edu replaceBits(resTemp, 31, 16, midRes); 3617193Sgblack@eecs.umich.edu Dest = resTemp; 3627193Sgblack@eecs.umich.edu ''', flagType="none", buildCc=False) 3637138Sgblack@eecs.umich.edu}}; 364