xref: /gem5/src/arch/arm/isa/insts/aarch64.isa

// -*- mode:c++ -*-

// Copyright (c) 2011 ARM Limited
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//
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// licensed hereunder.  You may use the software subject to the license
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// modification, are permitted provided that the following conditions are
// met: redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer;
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// Authors: Gabe Black

let {{
    movzCode = 'Dest64 = ((uint64_t)imm1) << imm2;'
    movzIop = InstObjParams("movz", "Movz", "RegImmImmOp", movzCode, [])
    header_output += RegImmImmOpDeclare.subst(movzIop)
    decoder_output += RegImmImmOpConstructor.subst(movzIop)
    exec_output += BasicExecute.subst(movzIop)

    movkCode = 'Dest64 = insertBits(Dest64, imm2 + 15, imm2, imm1);'
    movkIop = InstObjParams("movk", "Movk", "RegImmImmOp", movkCode, [])
    header_output += RegImmImmOpDeclare.subst(movkIop)
    decoder_output += RegImmImmOpConstructor.subst(movkIop)
    exec_output += BasicExecute.subst(movkIop)

    movnCode = 'Dest64 = ~(((uint64_t)imm1) << imm2);'
    movnIop = InstObjParams("movn", "Movn", "RegImmImmOp", movnCode, [])
    header_output += RegImmImmOpDeclare.subst(movnIop)
    decoder_output += RegImmImmOpConstructor.subst(movnIop)
    exec_output += BasicExecute.subst(movnIop)
}};