includes.isa revision 6276 
1// -*- mode:c++ -*-
2
3// Copyright (c) 2007-2008 The Florida State University
4// All rights reserved.
5//
6// Redistribution and use in source and binary forms, with or without
7// modification, are permitted provided that the following conditions are
8// met: redistributions of source code must retain the above copyright
9// notice, this list of conditions and the following disclaimer;
10// redistributions in binary form must reproduce the above copyright
11// notice, this list of conditions and the following disclaimer in the
12// documentation and/or other materials provided with the distribution;
13// neither the name of the copyright holders nor the names of its
14// contributors may be used to endorse or promote products derived from
15// this software without specific prior written permission.
16//
17// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28//
29// Authors: Stephen Hines
30
31////////////////////////////////////////////////////////////////////
32//
33// Output include file directives.
34//
35
36output header {{
37#include <sstream>
38#include <iostream>
39#include <iomanip>
40
41#include "arch/arm/insts/branch.hh"
42#include "arch/arm/insts/macromem.hh"
43#include "arch/arm/insts/mem.hh"
44#include "arch/arm/insts/pred_inst.hh"
45#include "arch/arm/insts/static_inst.hh"
46#include "arch/arm/isa_traits.hh"
47#include "cpu/static_inst.hh"
48#include "mem/packet.hh"
49}};
50
51output decoder {{
52#include <cmath>
53#if defined(linux)
54#include <fenv.h>
55#endif
56
57#include "arch/arm/faults.hh"
58#include "arch/arm/isa_traits.hh"
59#include "arch/arm/utility.hh"
60#include "base/cprintf.hh"
61#include "base/loader/symtab.hh"
62#include "cpu/thread_context.hh"
63
64using namespace ArmISA;
65using std::isnan;
66}};
67
68output exec {{
69#include "arch/arm/faults.hh"
70#include "arch/arm/isa_traits.hh"
71#include "arch/arm/utility.hh"
72#include "base/condcodes.hh"
73
74#include <cmath>
75#if defined(linux)
76#include <fenv.h>
77#endif
78
79#include "cpu/base.hh"
80#include "cpu/exetrace.hh"
81#include "mem/packet.hh"
82#include "mem/packet_access.hh"
83#include "sim/sim_exit.hh"
84
85using namespace ArmISA;
86using std::isnan;
87}};
88
89