sve_top_level.isa revision 13759:9941fca869a9
12023SN/A// Copyright (c) 2017-2019 ARM Limited 25268Sksewell@umich.edu// All rights reserved 35254Sksewell@umich.edu// 45254Sksewell@umich.edu// The license below extends only to copyright in the software and shall 52023SN/A// not be construed as granting a license to any other intellectual 65254Sksewell@umich.edu// property including but not limited to intellectual property relating 75254Sksewell@umich.edu// to a hardware implementation of the functionality of the software 85254Sksewell@umich.edu// licensed hereunder. You may use the software subject to the license 95254Sksewell@umich.edu// terms below provided that you ensure that this notice is replicated 105254Sksewell@umich.edu// unmodified and in its entirety in all distributions of the software, 115254Sksewell@umich.edu// modified or unmodified, in source code or in binary form. 125254Sksewell@umich.edu// 135254Sksewell@umich.edu// Redistribution and use in source and binary forms, with or without 145254Sksewell@umich.edu// modification, are permitted provided that the following conditions are 155254Sksewell@umich.edu// met: redistributions of source code must retain the above copyright 162023SN/A// notice, this list of conditions and the following disclaimer; 175254Sksewell@umich.edu// redistributions in binary form must reproduce the above copyright 185254Sksewell@umich.edu// notice, this list of conditions and the following disclaimer in the 195254Sksewell@umich.edu// documentation and/or other materials provided with the distribution; 205254Sksewell@umich.edu// neither the name of the copyright holders nor the names of its 215254Sksewell@umich.edu// contributors may be used to endorse or promote products derived from 225254Sksewell@umich.edu// this software without specific prior written permission. 235254Sksewell@umich.edu// 245254Sksewell@umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 255254Sksewell@umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 265254Sksewell@umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 275254Sksewell@umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 282665Ssaidi@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 295254Sksewell@umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 305254Sksewell@umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 315222Sksewell@umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 322023SN/A// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 332023SN/A// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 342028SN/A// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 352028SN/A// 362023SN/A// Authors: Giacomo Gabrielli 372597SN/A 386216Snate@binkert.org/// @file 398542Sgblack@eecs.umich.edu/// SVE top-level decoder. 402023SN/A 417811Ssteve.reinhardt@amd.comoutput header {{ 422239SN/Anamespace Aarch64 432131SN/A{ 442023SN/A StaticInstPtr decodeSveIntArithBinPred(ExtMachInst machInst); 452525SN/A StaticInstPtr decodeSveIntReduc(ExtMachInst machInst); 466378Sgblack@eecs.umich.edu StaticInstPtr decodeSveShiftByImmPred(ExtMachInst machInst); 472023SN/A StaticInstPtr decodeSveIntArithUnaryPred(ExtMachInst machInst); 486378Sgblack@eecs.umich.edu StaticInstPtr decodeSveIntMulAdd(ExtMachInst machInst); 493093Sksewell@umich.edu StaticInstPtr decodeSveIntArithUnpred(ExtMachInst machInst); 506378Sgblack@eecs.umich.edu StaticInstPtr decodeSveIntLogUnpred(ExtMachInst machInst); 516378Sgblack@eecs.umich.edu StaticInstPtr decodeSveIndexGen(ExtMachInst machInst); 522239SN/A StaticInstPtr decodeSveStackAlloc(ExtMachInst machInst); 536378Sgblack@eecs.umich.edu StaticInstPtr decodeSveShiftByImmUnpred(ExtMachInst machInst); 546378Sgblack@eecs.umich.edu StaticInstPtr decodeSveCompVecAddr(ExtMachInst machInst); 556378Sgblack@eecs.umich.edu StaticInstPtr decodeSveIntMiscUnpred(ExtMachInst machInst); 566378Sgblack@eecs.umich.edu StaticInstPtr decodeSveElemCount(ExtMachInst machInst); 575222Sksewell@umich.edu StaticInstPtr decodeSveLogMaskImm(ExtMachInst machInst); 585222Sksewell@umich.edu StaticInstPtr decodeSveIntWideImmPred(ExtMachInst machInst); 596378Sgblack@eecs.umich.edu StaticInstPtr decodeSvePermExtract(ExtMachInst machInst); 606378Sgblack@eecs.umich.edu StaticInstPtr decodeSvePermUnpred(ExtMachInst machInst); 616378Sgblack@eecs.umich.edu StaticInstPtr decodeSvePermPredicates(ExtMachInst machInst); 626378Sgblack@eecs.umich.edu StaticInstPtr decodeSvePermIntlv(ExtMachInst machInst); 635222Sksewell@umich.edu StaticInstPtr decodeSvePermPred(ExtMachInst machInst); 646378Sgblack@eecs.umich.edu StaticInstPtr decodeSveSelVec(ExtMachInst machInst); 656378Sgblack@eecs.umich.edu StaticInstPtr decodeSveIntCmpVec(ExtMachInst machInst); 666378Sgblack@eecs.umich.edu StaticInstPtr decodeSveIntCmpUImm(ExtMachInst machInst); 676378Sgblack@eecs.umich.edu StaticInstPtr decodeSveIntCmpSImm(ExtMachInst machInst); 685222Sksewell@umich.edu StaticInstPtr decodeSvePredGen(ExtMachInst machInst); 696378Sgblack@eecs.umich.edu StaticInstPtr decodeSvePredCount(ExtMachInst machInst); 706378Sgblack@eecs.umich.edu StaticInstPtr decodeSveIntCmpSca(ExtMachInst machInst); 716378Sgblack@eecs.umich.edu StaticInstPtr decodeSveIntWideImmUnpred(ExtMachInst machInst); 726378Sgblack@eecs.umich.edu 736378Sgblack@eecs.umich.edu StaticInstPtr decodeSveMultiplyAddUnpred(ExtMachInst machInst); 746378Sgblack@eecs.umich.edu StaticInstPtr decodeSveMultiplyIndexed(ExtMachInst machInst); 755222Sksewell@umich.edu 766378Sgblack@eecs.umich.edu StaticInstPtr decodeSveFpFastReduc(ExtMachInst machInst); 776378Sgblack@eecs.umich.edu StaticInstPtr decodeSveFpUnaryUnpred(ExtMachInst machInst); 786378Sgblack@eecs.umich.edu StaticInstPtr decodeSveFpCmpZero(ExtMachInst machInst); 796378Sgblack@eecs.umich.edu StaticInstPtr decodeSveFpAccumReduc(ExtMachInst machInst); 805222Sksewell@umich.edu StaticInstPtr decodeSveFpArithUnpred(ExtMachInst machInst); 816378Sgblack@eecs.umich.edu StaticInstPtr decodeSveFpArithPred(ExtMachInst machInst); 826378Sgblack@eecs.umich.edu StaticInstPtr decodeSveFpUnaryPred(ExtMachInst machInst); 836378Sgblack@eecs.umich.edu StaticInstPtr decodeSveFpCmpVec(ExtMachInst machInst); 846378Sgblack@eecs.umich.edu StaticInstPtr decodeSveFpFusedMulAdd(ExtMachInst machInst); 855222Sksewell@umich.edu StaticInstPtr decodeSveFpCplxAdd(ExtMachInst machInst); 866378Sgblack@eecs.umich.edu StaticInstPtr decodeSveFpCplxMulAddVec(ExtMachInst machInst); 876378Sgblack@eecs.umich.edu StaticInstPtr decodeSveFpMulAddIndexed(ExtMachInst machInst); 886378Sgblack@eecs.umich.edu StaticInstPtr decodeSveFpCplxMulAddIndexed(ExtMachInst machInst); 895222Sksewell@umich.edu StaticInstPtr decodeSveFpMulIndexed(ExtMachInst machInst); 906378Sgblack@eecs.umich.edu 916378Sgblack@eecs.umich.edu StaticInstPtr decodeSveMemGather32(ExtMachInst machInst); 926378Sgblack@eecs.umich.edu StaticInstPtr decodeSveMemContigLoad(ExtMachInst machInst); 935222Sksewell@umich.edu StaticInstPtr decodeSveMemGather64(ExtMachInst machInst); 945222Sksewell@umich.edu StaticInstPtr decodeSveMemStore(ExtMachInst machInst); 956378Sgblack@eecs.umich.edu} 966378Sgblack@eecs.umich.edu}}; 976378Sgblack@eecs.umich.edu 986378Sgblack@eecs.umich.eduoutput decoder {{ 995254Sksewell@umich.edunamespace Aarch64 1005254Sksewell@umich.edu{ 1016378Sgblack@eecs.umich.edu 1026378Sgblack@eecs.umich.edu StaticInstPtr 1036378Sgblack@eecs.umich.edu decodeSveInt(ExtMachInst machInst) 1046378Sgblack@eecs.umich.edu { 1056378Sgblack@eecs.umich.edu uint8_t b_29_24_21 = (bits(machInst, 29) << 2) | 1066378Sgblack@eecs.umich.edu (bits(machInst, 24) << 1) | 1076378Sgblack@eecs.umich.edu bits(machInst, 21); 1085254Sksewell@umich.edu switch (b_29_24_21) { 1096378Sgblack@eecs.umich.edu case 0x0: 1105222Sksewell@umich.edu { 1116378Sgblack@eecs.umich.edu if (bits(machInst, 14)) { 1126378Sgblack@eecs.umich.edu return decodeSveIntMulAdd(machInst); 1136378Sgblack@eecs.umich.edu } else { 1146378Sgblack@eecs.umich.edu uint8_t b_15_13 = (bits(machInst, 15) << 1) | 1156378Sgblack@eecs.umich.edu bits(machInst, 13); 1166378Sgblack@eecs.umich.edu switch (b_15_13) { 1176378Sgblack@eecs.umich.edu case 0x0: 1186378Sgblack@eecs.umich.edu if (bits(machInst, 30)) { 1195222Sksewell@umich.edu return decodeSveMultiplyAddUnpred(machInst); 1206378Sgblack@eecs.umich.edu } else { 1216378Sgblack@eecs.umich.edu return decodeSveIntArithBinPred(machInst); 1225222Sksewell@umich.edu } 1236378Sgblack@eecs.umich.edu case 0x1: 1246378Sgblack@eecs.umich.edu return decodeSveIntReduc(machInst); 1256378Sgblack@eecs.umich.edu case 0x2: 1266378Sgblack@eecs.umich.edu return decodeSveShiftByImmPred(machInst); 1276378Sgblack@eecs.umich.edu case 0x3: 1286378Sgblack@eecs.umich.edu return decodeSveIntArithUnaryPred(machInst); 1295222Sksewell@umich.edu } 1306378Sgblack@eecs.umich.edu } 1315222Sksewell@umich.edu } 1326378Sgblack@eecs.umich.edu case 0x1: 1336378Sgblack@eecs.umich.edu { 1345222Sksewell@umich.edu uint8_t b_15_14 = bits(machInst, 15, 14); 1356378Sgblack@eecs.umich.edu uint8_t b_13 = bits(machInst, 13); 1366378Sgblack@eecs.umich.edu uint8_t b_12 = bits(machInst, 12); 1376378Sgblack@eecs.umich.edu switch (b_15_14) { 1386378Sgblack@eecs.umich.edu case 0x0: 1396378Sgblack@eecs.umich.edu if (b_13) { 1406378Sgblack@eecs.umich.edu return decodeSveIntLogUnpred(machInst); 1416378Sgblack@eecs.umich.edu } else { 1426378Sgblack@eecs.umich.edu if (bits(machInst, 30)) { 1436378Sgblack@eecs.umich.edu return decodeSveMultiplyIndexed(machInst); 1442131SN/A } else { 1456378Sgblack@eecs.umich.edu return decodeSveIntArithUnpred(machInst); 1469057SAli.Saidi@ARM.com } 1472131SN/A } 1486378Sgblack@eecs.umich.edu case 0x1: 1496378Sgblack@eecs.umich.edu if (b_13) { 1502131SN/A return new Unknown64(machInst); 1516378Sgblack@eecs.umich.edu } else if (b_12) { 1522131SN/A return decodeSveStackAlloc(machInst); 1536378Sgblack@eecs.umich.edu } else { 1546378Sgblack@eecs.umich.edu return decodeSveIndexGen(machInst); 1556378Sgblack@eecs.umich.edu } 1566378Sgblack@eecs.umich.edu case 0x2: 1576378Sgblack@eecs.umich.edu if (b_13) { 1586378Sgblack@eecs.umich.edu if (b_12) { 1596378Sgblack@eecs.umich.edu return decodeSveIntMiscUnpred(machInst); 1606378Sgblack@eecs.umich.edu } else { 1618412Sksewell@umich.edu return decodeSveCompVecAddr(machInst); 1626974Stjones1@inf.ed.ac.uk } 1639329Sdam.sunwoo@arm.com } else { 1649329Sdam.sunwoo@arm.com return decodeSveShiftByImmUnpred(machInst); 1659329Sdam.sunwoo@arm.com } 1667811Ssteve.reinhardt@amd.com case 0x3: 1672023SN/A return decodeSveElemCount(machInst); 1682028SN/A } 169 } 170 case 0x2: 171 if (bits(machInst, 20)) { 172 return decodeSveIntWideImmPred(machInst); 173 } else { 174 return decodeSveLogMaskImm(machInst); 175 } 176 case 0x3: 177 { 178 uint8_t b_15_14 = bits(machInst, 15, 14); 179 uint8_t b_13 = bits(machInst, 13); 180 switch (b_15_14) { 181 case 0x0: 182 if (b_13) { 183 return decodeSvePermUnpred(machInst); 184 } else { 185 return decodeSvePermExtract(machInst); 186 } 187 case 0x1: 188 if (b_13) { 189 return decodeSvePermIntlv(machInst); 190 } else { 191 return decodeSvePermPredicates(machInst); 192 } 193 case 0x2: 194 return decodeSvePermPred(machInst); 195 case 0x3: 196 return decodeSveSelVec(machInst); 197 } 198 } 199 case 0x4: 200 return decodeSveIntCmpVec(machInst); 201 case 0x5: 202 return decodeSveIntCmpUImm(machInst); 203 case 0x6: 204 if (bits(machInst, 14)) { 205 return decodeSvePredGen(machInst); 206 } else { 207 return decodeSveIntCmpSImm(machInst); 208 } 209 case 0x7: 210 { 211 uint8_t b_15_14 = bits(machInst, 15, 14); 212 switch (b_15_14) { 213 case 0x0: 214 return decodeSveIntCmpSca(machInst); 215 case 0x1: 216 return new Unknown64(machInst); 217 case 0x2: 218 return decodeSvePredCount(machInst); 219 case 0x3: 220 return decodeSveIntWideImmUnpred(machInst); 221 } 222 } 223 } 224 return new Unknown64(machInst); 225 } 226 227 StaticInstPtr 228 decodeSveFp(ExtMachInst machInst) 229 { 230 uint8_t b_24_21 = (bits(machInst, 24) << 1) | 231 bits(machInst, 21); 232 switch (b_24_21) { 233 case 0x0: 234 if (!bits(machInst, 15)) { 235 return decodeSveFpCplxMulAddVec(machInst); 236 } else if((bits(machInst, 20, 17) | bits(machInst, 14, 13)) == 0) { 237 return decodeSveFpCplxAdd(machInst); 238 } 239 return new Unknown64(machInst); 240 case 0x1: 241 if (bits(machInst, 15, 12) == 1) { 242 return decodeSveFpCplxMulAddIndexed(machInst); 243 } 244 switch (bits(machInst, 13, 11)) { 245 case 0: 246 return decodeSveFpMulAddIndexed(machInst); 247 case 4: 248 if (!bits(machInst, 10)) 249 return decodeSveFpMulIndexed(machInst); 250 M5_FALLTHROUGH; 251 default: 252 return new Unknown64(machInst); 253 } 254 case 0x2: 255 { 256 if (bits(machInst, 14)) { 257 return decodeSveFpCmpVec(machInst); 258 } else { 259 uint8_t b_15_13 = (bits(machInst, 15) << 1) | 260 bits(machInst, 13); 261 switch (b_15_13) { 262 case 0x0: 263 return decodeSveFpArithUnpred(machInst); 264 case 0x1: 265 { 266 uint8_t b_20_19 = (bits(machInst, 20) << 1) | 267 bits(machInst, 19); 268 switch (b_20_19) { 269 case 0x0: 270 return decodeSveFpFastReduc(machInst); 271 case 0x1: 272 if (bits(machInst, 12)) { 273 return decodeSveFpUnaryUnpred(machInst); 274 } else { 275 return new Unknown64(machInst); 276 } 277 case 0x2: 278 return decodeSveFpCmpZero(machInst); 279 case 0x3: 280 return decodeSveFpAccumReduc(machInst); 281 } 282 } 283 case 0x2: 284 return decodeSveFpArithPred(machInst); 285 case 0x3: 286 return decodeSveFpUnaryPred(machInst); 287 } 288 } 289 } 290 case 0x3: 291 return decodeSveFpFusedMulAdd(machInst); 292 } 293 return new Unknown64(machInst); 294 } 295 296 StaticInstPtr 297 decodeSveMem(ExtMachInst machInst) 298 { 299 uint8_t b_30_29 = bits(machInst, 30, 29); 300 switch (b_30_29) { 301 case 0x0: 302 return decodeSveMemGather32(machInst); 303 case 0x1: 304 return decodeSveMemContigLoad(machInst); 305 case 0x2: 306 return decodeSveMemGather64(machInst); 307 case 0x3: 308 return decodeSveMemStore(machInst); 309 } 310 return new Unknown64(machInst); 311 } 312 313} // namespace Aarch64 314}}; 315