pred.isa revision 6724:70129fdded75
14519Sgblack@eecs.umich.edu// -*- mode:c++ -*- 24519Sgblack@eecs.umich.edu 34519Sgblack@eecs.umich.edu// Copyright (c) 2007-2008 The Florida State University 44519Sgblack@eecs.umich.edu// All rights reserved. 54519Sgblack@eecs.umich.edu// 64519Sgblack@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 74519Sgblack@eecs.umich.edu// modification, are permitted provided that the following conditions are 84519Sgblack@eecs.umich.edu// met: redistributions of source code must retain the above copyright 94519Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 104519Sgblack@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 114519Sgblack@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 124519Sgblack@eecs.umich.edu// documentation and/or other materials provided with the distribution; 134519Sgblack@eecs.umich.edu// neither the name of the copyright holders nor the names of its 144519Sgblack@eecs.umich.edu// contributors may be used to endorse or promote products derived from 154519Sgblack@eecs.umich.edu// this software without specific prior written permission. 164519Sgblack@eecs.umich.edu// 174519Sgblack@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 184519Sgblack@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 194519Sgblack@eecs.umich.edu// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 204519Sgblack@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 214519Sgblack@eecs.umich.edu// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 224519Sgblack@eecs.umich.edu// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 234519Sgblack@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 244519Sgblack@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 254519Sgblack@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 264519Sgblack@eecs.umich.edu// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 274519Sgblack@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 284519Sgblack@eecs.umich.edu// 294519Sgblack@eecs.umich.edu// Authors: Stephen Hines 304519Sgblack@eecs.umich.edu 314519Sgblack@eecs.umich.edu//////////////////////////////////////////////////////////////////// 324519Sgblack@eecs.umich.edu// 334519Sgblack@eecs.umich.edu// Predicated Instruction Execution 344519Sgblack@eecs.umich.edu// 354519Sgblack@eecs.umich.edu 364519Sgblack@eecs.umich.edulet {{ 374519Sgblack@eecs.umich.edu predicateTest = 'testPredicate(CondCodes, condCode)' 384519Sgblack@eecs.umich.edu}}; 394519Sgblack@eecs.umich.edu 404519Sgblack@eecs.umich.edudef template PredOpExecute {{ 414519Sgblack@eecs.umich.edu Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const 424519Sgblack@eecs.umich.edu { 434519Sgblack@eecs.umich.edu Fault fault = NoFault; 444519Sgblack@eecs.umich.edu uint64_t resTemp = 0; 454519Sgblack@eecs.umich.edu resTemp = resTemp; 464519Sgblack@eecs.umich.edu %(op_decl)s; 474519Sgblack@eecs.umich.edu %(op_rd)s; 484519Sgblack@eecs.umich.edu 494519Sgblack@eecs.umich.edu if (%(predicate_test)s) 504519Sgblack@eecs.umich.edu { 514519Sgblack@eecs.umich.edu %(code)s; 524519Sgblack@eecs.umich.edu if (fault == NoFault) 534519Sgblack@eecs.umich.edu { 544519Sgblack@eecs.umich.edu %(op_wb)s; 554519Sgblack@eecs.umich.edu } 564519Sgblack@eecs.umich.edu } 574519Sgblack@eecs.umich.edu 584519Sgblack@eecs.umich.edu return fault; 594519Sgblack@eecs.umich.edu } 604519Sgblack@eecs.umich.edu}}; 614519Sgblack@eecs.umich.edu 624590Sgblack@eecs.umich.edudef template DataDecode {{ 634679Sgblack@eecs.umich.edu if (machInst.opcode4 == 0) { 644590Sgblack@eecs.umich.edu if (machInst.sField == 0) 654590Sgblack@eecs.umich.edu return new %(class_name)sImm(machInst); 664590Sgblack@eecs.umich.edu else 674590Sgblack@eecs.umich.edu return new %(class_name)sImmCc(machInst); 684590Sgblack@eecs.umich.edu } else { 694590Sgblack@eecs.umich.edu if (machInst.sField == 0) 704590Sgblack@eecs.umich.edu return new %(class_name)s(machInst); 714590Sgblack@eecs.umich.edu else 724590Sgblack@eecs.umich.edu return new %(class_name)sCc(machInst); 734590Sgblack@eecs.umich.edu } 744590Sgblack@eecs.umich.edu}}; 754590Sgblack@eecs.umich.edu 764590Sgblack@eecs.umich.edudef template DataImmDecode {{ 774590Sgblack@eecs.umich.edu if (machInst.sField == 0) 784696Sgblack@eecs.umich.edu return new %(class_name)s(machInst); 794696Sgblack@eecs.umich.edu else 804696Sgblack@eecs.umich.edu return new %(class_name)sCc(machInst); 814590Sgblack@eecs.umich.edu}}; 824590Sgblack@eecs.umich.edu 834590Sgblack@eecs.umich.edulet {{ 844590Sgblack@eecs.umich.edu 854590Sgblack@eecs.umich.edu calcCcCode = ''' 864519Sgblack@eecs.umich.edu uint16_t _ic, _iv, _iz, _in; 874519Sgblack@eecs.umich.edu 884519Sgblack@eecs.umich.edu _in = (resTemp >> 31) & 1; 894519Sgblack@eecs.umich.edu _iz = (resTemp == 0); 904519Sgblack@eecs.umich.edu _iv = %(ivValue)s & 1; 914519Sgblack@eecs.umich.edu _ic = %(icValue)s & 1; 924519Sgblack@eecs.umich.edu 934590Sgblack@eecs.umich.edu CondCodes = _in << 31 | _iz << 30 | _ic << 29 | _iv << 28 | 944590Sgblack@eecs.umich.edu (CondCodes & 0x0FFFFFFF); 954590Sgblack@eecs.umich.edu 964590Sgblack@eecs.umich.edu DPRINTF(Arm, "in = %%d\\n", _in); 974590Sgblack@eecs.umich.edu DPRINTF(Arm, "iz = %%d\\n", _iz); 984519Sgblack@eecs.umich.edu DPRINTF(Arm, "ic = %%d\\n", _ic); 994519Sgblack@eecs.umich.edu DPRINTF(Arm, "iv = %%d\\n", _iv); 1004519Sgblack@eecs.umich.edu ''' 1014590Sgblack@eecs.umich.edu 1024519Sgblack@eecs.umich.edu}}; 1034519Sgblack@eecs.umich.edu 1044519Sgblack@eecs.umich.edulet {{ 1054590Sgblack@eecs.umich.edu def getCcCode(flagtype): 1064590Sgblack@eecs.umich.edu icReg = icImm = iv = '' 1074519Sgblack@eecs.umich.edu if flagtype == "none": 1084519Sgblack@eecs.umich.edu icReg = icImm = 'CondCodes<29:>' 1094519Sgblack@eecs.umich.edu iv = 'CondCodes<28:>' 1104519Sgblack@eecs.umich.edu elif flagtype == "add": 1114519Sgblack@eecs.umich.edu icReg = icImm = 'findCarry(32, resTemp, Rn, op2)' 1124696Sgblack@eecs.umich.edu iv = 'findOverflow(32, resTemp, Rn, op2)' 1134696Sgblack@eecs.umich.edu elif flagtype == "sub": 1144696Sgblack@eecs.umich.edu icReg = icImm ='findCarry(32, resTemp, Rn, ~op2)' 1154696Sgblack@eecs.umich.edu iv = 'findOverflow(32, resTemp, Rn, ~op2)' 1164696Sgblack@eecs.umich.edu elif flagtype == "rsb": 1174696Sgblack@eecs.umich.edu icReg = icImm = 'findCarry(32, resTemp, op2, ~Rn)' 1184696Sgblack@eecs.umich.edu iv = 'findOverflow(32, resTemp, op2, ~Rn)' 1194696Sgblack@eecs.umich.edu else: 1204696Sgblack@eecs.umich.edu icReg = 'shift_carry_rs(Rm, Rs, shift, CondCodes<29:>)' 1214696Sgblack@eecs.umich.edu icImm = 'shift_carry_imm(Rm, shift_size, shift, CondCodes<29:>)' 1224696Sgblack@eecs.umich.edu iv = 'CondCodes<28:>' 1234696Sgblack@eecs.umich.edu return (calcCcCode % {"icValue" : icReg, "ivValue" : iv}, 1244696Sgblack@eecs.umich.edu calcCcCode % {"icValue" : icImm, "ivValue" : iv}) 1254696Sgblack@eecs.umich.edu 1264696Sgblack@eecs.umich.edu def getImmCcCode(flagtype): 1274696Sgblack@eecs.umich.edu ivValue = icValue = '' 1284519Sgblack@eecs.umich.edu if flagtype == "none": 1294590Sgblack@eecs.umich.edu icValue = 'CondCodes<29:>' 1304590Sgblack@eecs.umich.edu ivValue = 'CondCodes<28:>' 1314590Sgblack@eecs.umich.edu elif flagtype == "add": 1324590Sgblack@eecs.umich.edu icValue = 'findCarry(32, resTemp, Rn, rotated_imm)' 1334590Sgblack@eecs.umich.edu ivValue = 'findOverflow(32, resTemp, Rn, rotated_imm)' 1344590Sgblack@eecs.umich.edu elif flagtype == "sub": 1354590Sgblack@eecs.umich.edu icValue = 'findCarry(32, resTemp, Rn, ~rotated_imm)' 1364590Sgblack@eecs.umich.edu ivValue = 'findOverflow(32, resTemp, Rn, ~rotated_imm)' 1374590Sgblack@eecs.umich.edu elif flagtype == "rsb": 1384590Sgblack@eecs.umich.edu icValue = 'findCarry(32, resTemp, rotated_imm, ~Rn)' 1394590Sgblack@eecs.umich.edu ivValue = 'findOverflow(32, resTemp, rotated_imm, ~Rn)' 1404519Sgblack@eecs.umich.edu else: 141 icValue = '(rotate ? rotated_carry:CondCodes<29:>)' 142 ivValue = 'CondCodes<28:>' 143 return calcCcCode % vars() 144}}; 145 146def format DataOp(code, flagtype = logic) {{ 147 (regCcCode, immCcCode) = getCcCode(flagtype) 148 regCode = '''uint32_t op2 = shift_rm_rs(Rm, Rs, 149 shift, CondCodes<29:0>); 150 op2 = op2;''' + code 151 immCode = '''uint32_t op2 = shift_rm_imm(Rm, shift_size, 152 shift, CondCodes<29:0>); 153 op2 = op2;''' + code 154 regIop = InstObjParams(name, Name, 'PredIntOp', 155 {"code": regCode, 156 "predicate_test": predicateTest}) 157 immIop = InstObjParams(name, Name + "Imm", 'PredIntOp', 158 {"code": immCode, 159 "predicate_test": predicateTest}) 160 regCcIop = InstObjParams(name, Name + "Cc", 'PredIntOp', 161 {"code": regCode + regCcCode, 162 "predicate_test": predicateTest}) 163 immCcIop = InstObjParams(name, Name + "ImmCc", 'PredIntOp', 164 {"code": immCode + immCcCode, 165 "predicate_test": predicateTest}) 166 header_output = BasicDeclare.subst(regIop) + \ 167 BasicDeclare.subst(immIop) + \ 168 BasicDeclare.subst(regCcIop) + \ 169 BasicDeclare.subst(immCcIop) 170 decoder_output = BasicConstructor.subst(regIop) + \ 171 BasicConstructor.subst(immIop) + \ 172 BasicConstructor.subst(regCcIop) + \ 173 BasicConstructor.subst(immCcIop) 174 exec_output = PredOpExecute.subst(regIop) + \ 175 PredOpExecute.subst(immIop) + \ 176 PredOpExecute.subst(regCcIop) + \ 177 PredOpExecute.subst(immCcIop) 178 decode_block = DataDecode.subst(regIop) 179}}; 180 181def format DataImmOp(code, flagtype = logic) {{ 182 code += "resTemp = resTemp;" 183 iop = InstObjParams(name, Name, 'PredImmOp', 184 {"code": code, 185 "predicate_test": predicateTest}) 186 ccIop = InstObjParams(name, Name + "Cc", 'PredImmOp', 187 {"code": code + getImmCcCode(flagtype), 188 "predicate_test": predicateTest}) 189 header_output = BasicDeclare.subst(iop) + \ 190 BasicDeclare.subst(ccIop) 191 decoder_output = BasicConstructor.subst(iop) + \ 192 BasicConstructor.subst(ccIop) 193 exec_output = PredOpExecute.subst(iop) + \ 194 PredOpExecute.subst(ccIop) 195 decode_block = DataImmDecode.subst(iop) 196}}; 197 198def format PredOp(code, *opt_flags) {{ 199 iop = InstObjParams(name, Name, 'PredOp', 200 {"code": code, 201 "predicate_test": predicateTest}, 202 opt_flags) 203 header_output = BasicDeclare.subst(iop) 204 decoder_output = BasicConstructor.subst(iop) 205 decode_block = BasicDecode.subst(iop) 206 exec_output = PredOpExecute.subst(iop) 207}}; 208 209def format PredImmOp(code, *opt_flags) {{ 210 iop = InstObjParams(name, Name, 'PredImmOp', 211 {"code": code, 212 "predicate_test": predicateTest}, 213 opt_flags) 214 header_output = BasicDeclare.subst(iop) 215 decoder_output = BasicConstructor.subst(iop) 216 decode_block = BasicDecode.subst(iop) 217 exec_output = PredOpExecute.subst(iop) 218}}; 219 220def format PredImmOpCc(code, icValue, ivValue, *opt_flags) {{ 221 ccCode = calcCcCode % vars() 222 code += ccCode; 223 iop = InstObjParams(name, Name, 'PredImmOp', 224 {"code": code, 225 "cc_code": ccCode, 226 "predicate_test": predicateTest}, 227 opt_flags) 228 header_output = BasicDeclare.subst(iop) 229 decoder_output = BasicConstructor.subst(iop) 230 decode_block = BasicDecode.subst(iop) 231 exec_output = PredOpExecute.subst(iop) 232}}; 233 234def format PredIntOp(code, *opt_flags) {{ 235 new_code = ArmGenericCodeSubs(code) 236 iop = InstObjParams(name, Name, 'PredIntOp', 237 {"code": new_code, 238 "predicate_test": predicateTest}, 239 opt_flags) 240 header_output = BasicDeclare.subst(iop) 241 decoder_output = BasicConstructor.subst(iop) 242 decode_block = BasicDecode.subst(iop) 243 exec_output = PredOpExecute.subst(iop) 244}}; 245 246def format PredIntOpCc(code, icValue, ivValue, *opt_flags) {{ 247 ccCode = calcCcCode % vars() 248 code += ccCode; 249 new_code = ArmGenericCodeSubs(code) 250 iop = InstObjParams(name, Name, 'PredIntOp', 251 {"code": new_code, 252 "cc_code": ccCode, 253 "predicate_test": predicateTest}, 254 opt_flags) 255 header_output = BasicDeclare.subst(iop) 256 decoder_output = BasicConstructor.subst(iop) 257 decode_block = BasicDecode.subst(iop) 258 exec_output = PredOpExecute.subst(iop) 259}}; 260 261