bitfields.isa revision 7101
15952Ssaidi@eecs.umich.edu// -*- mode:c++ -*- 25952Ssaidi@eecs.umich.edu 35952Ssaidi@eecs.umich.edu// Copyright (c) 2010 ARM Limited 45952Ssaidi@eecs.umich.edu// All rights reserved 55952Ssaidi@eecs.umich.edu// 65952Ssaidi@eecs.umich.edu// The license below extends only to copyright in the software and shall 75952Ssaidi@eecs.umich.edu// not be construed as granting a license to any other intellectual 85952Ssaidi@eecs.umich.edu// property including but not limited to intellectual property relating 95952Ssaidi@eecs.umich.edu// to a hardware implementation of the functionality of the software 105952Ssaidi@eecs.umich.edu// licensed hereunder. You may use the software subject to the license 115952Ssaidi@eecs.umich.edu// terms below provided that you ensure that this notice is replicated 125952Ssaidi@eecs.umich.edu// unmodified and in its entirety in all distributions of the software, 135952Ssaidi@eecs.umich.edu// modified or unmodified, in source code or in binary form. 145952Ssaidi@eecs.umich.edu// 155952Ssaidi@eecs.umich.edu// Copyright (c) 2007-2008 The Florida State University 165952Ssaidi@eecs.umich.edu// All rights reserved. 175952Ssaidi@eecs.umich.edu// 185952Ssaidi@eecs.umich.edu// Redistribution and use in source and binary forms, with or without 195952Ssaidi@eecs.umich.edu// modification, are permitted provided that the following conditions are 205952Ssaidi@eecs.umich.edu// met: redistributions of source code must retain the above copyright 215952Ssaidi@eecs.umich.edu// notice, this list of conditions and the following disclaimer; 225952Ssaidi@eecs.umich.edu// redistributions in binary form must reproduce the above copyright 235952Ssaidi@eecs.umich.edu// notice, this list of conditions and the following disclaimer in the 245952Ssaidi@eecs.umich.edu// documentation and/or other materials provided with the distribution; 255952Ssaidi@eecs.umich.edu// neither the name of the copyright holders nor the names of its 265952Ssaidi@eecs.umich.edu// contributors may be used to endorse or promote products derived from 275952Ssaidi@eecs.umich.edu// this software without specific prior written permission. 285952Ssaidi@eecs.umich.edu// 295952Ssaidi@eecs.umich.edu// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 305952Ssaidi@eecs.umich.edu// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 3110377Sandreas.hansson@arm.com// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 325952Ssaidi@eecs.umich.edu// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 338229Snate@binkert.org// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 348229Snate@binkert.org// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 355952Ssaidi@eecs.umich.edu// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 365952Ssaidi@eecs.umich.edu// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 375952Ssaidi@eecs.umich.edu// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 386658Snate@binkert.org// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 395952Ssaidi@eecs.umich.edu// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 4010377Sandreas.hansson@arm.com// 4110377Sandreas.hansson@arm.com// Authors: Stephen Hines 425952Ssaidi@eecs.umich.edu 435952Ssaidi@eecs.umich.edu//////////////////////////////////////////////////////////////////// 445952Ssaidi@eecs.umich.edu// 455952Ssaidi@eecs.umich.edu// Bitfield definitions. 465952Ssaidi@eecs.umich.edu// 475952Ssaidi@eecs.umich.edu 485952Ssaidi@eecs.umich.edu// Opcode fields 495952Ssaidi@eecs.umich.edudef bitfield ENCODING encoding; 505952Ssaidi@eecs.umich.edudef bitfield OPCODE opcode; 515952Ssaidi@eecs.umich.edudef bitfield MEDIA_OPCODE mediaOpcode; 525952Ssaidi@eecs.umich.edudef bitfield MEDIA_OPCODE2 mediaOpcode2; 535952Ssaidi@eecs.umich.edudef bitfield USEIMM useImm; 545952Ssaidi@eecs.umich.edudef bitfield OPCODE_24 opcode24; 555952Ssaidi@eecs.umich.edudef bitfield OPCODE_23_20 opcode23_20; 565952Ssaidi@eecs.umich.edudef bitfield OPCODE_23_21 opcode23_21; 575952Ssaidi@eecs.umich.edudef bitfield OPCODE_22 opcode22; 585952Ssaidi@eecs.umich.edudef bitfield OPCODE_20 opcode20; 595952Ssaidi@eecs.umich.edudef bitfield OPCODE_19 opcode19; 605952Ssaidi@eecs.umich.edudef bitfield OPCODE_18 opcode18; 615952Ssaidi@eecs.umich.edudef bitfield OPCODE_15_12 opcode15_12; 625952Ssaidi@eecs.umich.edudef bitfield OPCODE_15 opcode15; 635952Ssaidi@eecs.umich.edudef bitfield MISC_OPCODE miscOpcode; 645952Ssaidi@eecs.umich.edudef bitfield OPC2 opc2; 655952Ssaidi@eecs.umich.edudef bitfield OPCODE_7 opcode7; 665952Ssaidi@eecs.umich.edudef bitfield OPCODE_4 opcode4; 675952Ssaidi@eecs.umich.edu 685952Ssaidi@eecs.umich.edudef bitfield IS_MISC isMisc; 695952Ssaidi@eecs.umich.edudef bitfield SEVEN_AND_FOUR sevenAndFour; 705952Ssaidi@eecs.umich.edu 715952Ssaidi@eecs.umich.edudef bitfield THUMB thumb; 725952Ssaidi@eecs.umich.edudef bitfield BIGTHUMB bigThumb; 735952Ssaidi@eecs.umich.edu 745952Ssaidi@eecs.umich.edu// Other 755952Ssaidi@eecs.umich.edudef bitfield COND_CODE condCode; 765952Ssaidi@eecs.umich.edudef bitfield S_FIELD sField; 775952Ssaidi@eecs.umich.edudef bitfield RN rn; 785952Ssaidi@eecs.umich.edudef bitfield RD rd; 795952Ssaidi@eecs.umich.edudef bitfield SHIFT_SIZE shiftSize; 805952Ssaidi@eecs.umich.edudef bitfield SHIFT shift; 815952Ssaidi@eecs.umich.edudef bitfield RM rm; 825952Ssaidi@eecs.umich.edu 835952Ssaidi@eecs.umich.edudef bitfield RS rs; 845952Ssaidi@eecs.umich.edu 855952Ssaidi@eecs.umich.edudef bitfield PUSWL puswl; 865952Ssaidi@eecs.umich.edudef bitfield PREPOST puswl.prepost; 875952Ssaidi@eecs.umich.edudef bitfield UP puswl.up; 885952Ssaidi@eecs.umich.edudef bitfield PSRUSER puswl.psruser; 895952Ssaidi@eecs.umich.edudef bitfield WRITEBACK puswl.writeback; 905952Ssaidi@eecs.umich.edudef bitfield LOADOP puswl.loadOp; 915952Ssaidi@eecs.umich.edu 925952Ssaidi@eecs.umich.edudef bitfield PUBWL pubwl; 935952Ssaidi@eecs.umich.edu 945952Ssaidi@eecs.umich.edudef bitfield IMM imm; 955952Ssaidi@eecs.umich.edu 965952Ssaidi@eecs.umich.edudef bitfield IMMED_11_0 immed11_0; 975952Ssaidi@eecs.umich.edu 985952Ssaidi@eecs.umich.edudef bitfield IMMED_HI_11_8 immedHi11_8; 995952Ssaidi@eecs.umich.edudef bitfield IMMED_LO_3_0 immedLo3_0; 1005952Ssaidi@eecs.umich.edu 1015952Ssaidi@eecs.umich.edudef bitfield IMMED_23_0 immed23_0; 1025952Ssaidi@eecs.umich.edu 1035952Ssaidi@eecs.umich.edudef bitfield CPNUM cpNum; 1045952Ssaidi@eecs.umich.edu// Note that FP Regs are only 3 bits 1055952Ssaidi@eecs.umich.edudef bitfield FN fn; 1065952Ssaidi@eecs.umich.edudef bitfield FD fd; 1075952Ssaidi@eecs.umich.edudef bitfield FPREGIMM fpRegImm; 1085952Ssaidi@eecs.umich.edu// We can just use 3:0 for FM since the hard-wired FP regs are handled in 1095952Ssaidi@eecs.umich.edu// float_regfile.hh 1105952Ssaidi@eecs.umich.edudef bitfield FM fm; 1115952Ssaidi@eecs.umich.edudef bitfield FPIMM fpImm; 1125952Ssaidi@eecs.umich.edudef bitfield PUNWL punwl; 1135952Ssaidi@eecs.umich.edu 1145952Ssaidi@eecs.umich.edu// M5 instructions 1155952Ssaidi@eecs.umich.edudef bitfield M5FUNC m5Func; 1165952Ssaidi@eecs.umich.edu 1175952Ssaidi@eecs.umich.edu