bitfields.isa revision 12763
1360SN/A// -*- mode:c++ -*-
210850SGiacomo.Gabrielli@arm.com
310796Sbrandon.potter@amd.com// Copyright (c) 2010, 2011, 2018 ARM Limited
410027SChris.Adeniyi-Jones@arm.com// All rights reserved
510027SChris.Adeniyi-Jones@arm.com//
610027SChris.Adeniyi-Jones@arm.com// The license below extends only to copyright in the software and shall
710027SChris.Adeniyi-Jones@arm.com// not be construed as granting a license to any other intellectual
810027SChris.Adeniyi-Jones@arm.com// property including but not limited to intellectual property relating
910027SChris.Adeniyi-Jones@arm.com// to a hardware implementation of the functionality of the software
1010027SChris.Adeniyi-Jones@arm.com// licensed hereunder.  You may use the software subject to the license
1110027SChris.Adeniyi-Jones@arm.com// terms below provided that you ensure that this notice is replicated
1210027SChris.Adeniyi-Jones@arm.com// unmodified and in its entirety in all distributions of the software,
1310027SChris.Adeniyi-Jones@arm.com// modified or unmodified, in source code or in binary form.
1410027SChris.Adeniyi-Jones@arm.com//
151458SN/A// Copyright (c) 2007-2008 The Florida State University
16360SN/A// All rights reserved.
17360SN/A//
18360SN/A// Redistribution and use in source and binary forms, with or without
19360SN/A// modification, are permitted provided that the following conditions are
20360SN/A// met: redistributions of source code must retain the above copyright
21360SN/A// notice, this list of conditions and the following disclaimer;
22360SN/A// redistributions in binary form must reproduce the above copyright
23360SN/A// notice, this list of conditions and the following disclaimer in the
24360SN/A// documentation and/or other materials provided with the distribution;
25360SN/A// neither the name of the copyright holders nor the names of its
26360SN/A// contributors may be used to endorse or promote products derived from
27360SN/A// this software without specific prior written permission.
28360SN/A//
29360SN/A// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
30360SN/A// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
31360SN/A// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
32360SN/A// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
33360SN/A// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
34360SN/A// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
35360SN/A// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
36360SN/A// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
37360SN/A// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
38360SN/A// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
39360SN/A// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
402665Ssaidi@eecs.umich.edu//
412665Ssaidi@eecs.umich.edu// Authors: Stephen Hines
422665Ssaidi@eecs.umich.edu
43360SN/A////////////////////////////////////////////////////////////////////
44360SN/A//
451354SN/A// Bitfield definitions.
461354SN/A//
47360SN/A
482764Sstever@eecs.umich.edu// Opcode fields
499202Spalle@lyckegaard.dkdef bitfield DECODERFAULT  decoderFault;
509202Spalle@lyckegaard.dkdef bitfield ILLEGALEXEC   illegalExecution;
512064SN/A
5211799Sbrandon.potter@amd.comdef bitfield ENCODING      encoding;
5311799Sbrandon.potter@amd.comdef bitfield OPCODE        opcode;
5411799Sbrandon.potter@amd.comdef bitfield MEDIA_OPCODE  mediaOpcode;
5511799Sbrandon.potter@amd.comdef bitfield MEDIA_OPCODE2 mediaOpcode2;
5611799Sbrandon.potter@amd.comdef bitfield USEIMM        useImm;
5711799Sbrandon.potter@amd.comdef bitfield OPCODE_24     opcode24;
58360SN/Adef bitfield OPCODE_24_23  opcode24_23;
59360SN/Adef bitfield OPCODE_23_20  opcode23_20;
60360SN/Adef bitfield OPCODE_23_21  opcode23_21;
61360SN/Adef bitfield OPCODE_22     opcode22;
62360SN/Adef bitfield OPCODE_20     opcode20;
63360SN/Adef bitfield OPCODE_19_16  opcode19_16;
641809SN/Adef bitfield OPCODE_19     opcode19;
6511800Sbrandon.potter@amd.comdef bitfield OPCODE_18     opcode18;
6611392Sbrandon.potter@amd.comdef bitfield OPCODE_15_12  opcode15_12;
671809SN/Adef bitfield OPCODE_15     opcode15;
6811392Sbrandon.potter@amd.comdef bitfield MISC_OPCODE   miscOpcode;
6911383Sbrandon.potter@amd.comdef bitfield OPC2          opc2;
703113Sgblack@eecs.umich.edudef bitfield OPCODE_7      opcode7;
7111799Sbrandon.potter@amd.comdef bitfield OPCODE_6      opcode6;
7211759Sbrandon.potter@amd.comdef bitfield OPCODE_4      opcode4;
7311812Sbaz21@cam.ac.uk
7411812Sbaz21@cam.ac.ukdef bitfield IS_MISC       isMisc;
7511799Sbrandon.potter@amd.comdef bitfield SEVEN_AND_FOUR sevenAndFour;
768229Snate@binkert.org
778229Snate@binkert.orgdef bitfield THUMB         thumb;
7811594Santhony.gutierrez@amd.comdef bitfield BIGTHUMB      bigThumb;
797075Snate@binkert.orgdef bitfield AARCH64       aarch64;
808229Snate@binkert.org
8111856Sbrandon.potter@amd.com// Other
827075Snate@binkert.orgdef bitfield COND_CODE     condCode;
83360SN/Adef bitfield S_FIELD       sField;
8411800Sbrandon.potter@amd.comdef bitfield RN            rn;
8511392Sbrandon.potter@amd.comdef bitfield RD            rd;
862462SN/Adef bitfield RT            rt;
871354SN/Adef bitfield SHIFT_SIZE    shiftSize;
886216Snate@binkert.orgdef bitfield SHIFT         shift;
896658Snate@binkert.orgdef bitfield RM            rm;
902474SN/A
912680Sktlim@umich.edudef bitfield RS            rs;
928229Snate@binkert.org
9310496Ssteve.reinhardt@amd.comdef bitfield PUSWL         puswl;
948229Snate@binkert.orgdef bitfield PREPOST       puswl.prepost;
9511794Sbrandon.potter@amd.comdef bitfield UP               puswl.up;
9610497Ssteve.reinhardt@amd.comdef bitfield PSRUSER       puswl.psruser;
9711794Sbrandon.potter@amd.comdef bitfield WRITEBACK     puswl.writeback;
98360SN/Adef bitfield LOADOP        puswl.loadOp;
9911794Sbrandon.potter@amd.com
100360SN/Adef bitfield PUBWL         pubwl;
101360SN/A
102360SN/Adef bitfield IMM           imm;
103360SN/A
104360SN/Adef bitfield IMMED_11_0    immed11_0;
105360SN/Adef bitfield IMMED_7_0     immed7_0;
106360SN/A
107360SN/Adef bitfield IMMED_HI_11_8 immedHi11_8;
108360SN/Adef bitfield IMMED_LO_3_0  immedLo3_0;
109360SN/A
110378SN/Adef bitfield IMMED_23_0    immed23_0;
1111706SN/A
11211851Sbrandon.potter@amd.comdef bitfield CPNUM         cpNum;
113378SN/A// Note that FP Regs are only 3 bits
114378SN/Adef bitfield FN            fn;
115378SN/Adef bitfield FD            fd;
116378SN/Adef bitfield FPREGIMM      fpRegImm;
117378SN/A// We can just use 3:0 for FM since the hard-wired FP regs are handled in
1181706SN/A// float_regfile.hh
11911851Sbrandon.potter@amd.comdef bitfield FM            fm;
120360SN/Adef bitfield FPIMM         fpImm;
12111760Sbrandon.potter@amd.comdef bitfield PUNWL         punwl;
12211760Sbrandon.potter@amd.com
12311851Sbrandon.potter@amd.com// M5 instructions
12411760Sbrandon.potter@amd.comdef bitfield M5FUNC        m5Func;
1256109Ssanchezd@stanford.edu
1261706SN/A// 16 bit thumb bitfields
12711851Sbrandon.potter@amd.comdef bitfield TOPCODE_15_13  topcode15_13;
128378SN/Adef bitfield TOPCODE_13_11  topcode13_11;
1296109Ssanchezd@stanford.edudef bitfield TOPCODE_12_11  topcode12_11;
1306109Ssanchezd@stanford.edudef bitfield TOPCODE_12_10  topcode12_10;
13111851Sbrandon.potter@amd.comdef bitfield TOPCODE_11_9   topcode11_9;
1326109Ssanchezd@stanford.edudef bitfield TOPCODE_11_8   topcode11_8;
133378SN/Adef bitfield TOPCODE_10_9   topcode10_9;
1341706SN/Adef bitfield TOPCODE_10_8   topcode10_8;
13511851Sbrandon.potter@amd.comdef bitfield TOPCODE_9_6    topcode9_6;
136378SN/Adef bitfield TOPCODE_7      topcode7;
1375748SSteve.Reinhardt@amd.comdef bitfield TOPCODE_7_6    topcode7_6;
1385748SSteve.Reinhardt@amd.comdef bitfield TOPCODE_7_5    topcode7_5;
13911851Sbrandon.potter@amd.comdef bitfield TOPCODE_7_4    topcode7_4;
140378SN/Adef bitfield TOPCODE_3_0    topcode3_0;
141378SN/A
1421706SN/A// 32 bit thumb bitfields
14311851Sbrandon.potter@amd.comdef bitfield HTOPCODE_12_11 htopcode12_11;
144378SN/Adef bitfield HTOPCODE_10_9  htopcode10_9;
145378SN/Adef bitfield HTOPCODE_9     htopcode9;
1461706SN/Adef bitfield HTOPCODE_9_8   htopcode9_8;
14711851Sbrandon.potter@amd.comdef bitfield HTOPCODE_9_5   htopcode9_5;
148378SN/Adef bitfield HTOPCODE_9_4   htopcode9_4;
149378SN/Adef bitfield HTOPCODE_8     htopcode8;
1501706SN/Adef bitfield HTOPCODE_8_7   htopcode8_7;
15111851Sbrandon.potter@amd.comdef bitfield HTOPCODE_8_6   htopcode8_6;
152378SN/Adef bitfield HTOPCODE_8_5   htopcode8_5;
153378SN/Adef bitfield HTOPCODE_7     htopcode7;
1541706SN/Adef bitfield HTOPCODE_7_5   htopcode7_5;
15511851Sbrandon.potter@amd.comdef bitfield HTOPCODE_6     htopcode6;
156378SN/Adef bitfield HTOPCODE_6_5   htopcode6_5;
1574118Sgblack@eecs.umich.edudef bitfield HTOPCODE_5_4   htopcode5_4;
1584118Sgblack@eecs.umich.edudef bitfield HTOPCODE_4     htopcode4;
15911851Sbrandon.potter@amd.com
1604118Sgblack@eecs.umich.edudef bitfield HTRN           htrn;
161378SN/Adef bitfield HTS            hts;
1621706SN/A
16311851Sbrandon.potter@amd.comdef bitfield LTOPCODE_15    ltopcode15;
164378SN/Adef bitfield LTOPCODE_11_8  ltopcode11_8;
165378SN/Adef bitfield LTOPCODE_7_6   ltopcode7_6;
1661706SN/Adef bitfield LTOPCODE_7_4   ltopcode7_4;
16711851Sbrandon.potter@amd.comdef bitfield LTOPCODE_4     ltopcode4;
168360SN/A
1695513SMichael.Adler@intel.comdef bitfield LTRD           ltrd;
1705513SMichael.Adler@intel.comdef bitfield LTCOPROC       ltcoproc;
17111851Sbrandon.potter@amd.com