static_inst.hh revision 7093
17093Sgblack@eecs.umich.edu/* 27093Sgblack@eecs.umich.edu * Copyright (c) 2010 ARM Limited 37093Sgblack@eecs.umich.edu * All rights reserved 47093Sgblack@eecs.umich.edu * 57093Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 67093Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 77093Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 87093Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 97093Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 107093Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 117093Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 127093Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 137093Sgblack@eecs.umich.edu * 147093Sgblack@eecs.umich.edu * Copyright (c) 2007-2008 The Florida State University 156253Sgblack@eecs.umich.edu * All rights reserved. 166253Sgblack@eecs.umich.edu * 176253Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 186253Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 196253Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 206253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 216253Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 226253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 236253Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 246253Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 256253Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 266253Sgblack@eecs.umich.edu * this software without specific prior written permission. 276253Sgblack@eecs.umich.edu * 286253Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 296253Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 306253Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 316253Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 326253Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 336253Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 346253Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 356253Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 366253Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 376253Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 386253Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 396253Sgblack@eecs.umich.edu * 406253Sgblack@eecs.umich.edu * Authors: Stephen Hines 416253Sgblack@eecs.umich.edu */ 426253Sgblack@eecs.umich.edu#ifndef __ARCH_ARM_INSTS_STATICINST_HH__ 436253Sgblack@eecs.umich.edu#define __ARCH_ARM_INSTS_STATICINST_HH__ 446253Sgblack@eecs.umich.edu 456253Sgblack@eecs.umich.edu#include "base/trace.hh" 466253Sgblack@eecs.umich.edu#include "cpu/static_inst.hh" 476253Sgblack@eecs.umich.edu 486253Sgblack@eecs.umich.edunamespace ArmISA 496253Sgblack@eecs.umich.edu{ 506254Sgblack@eecs.umich.educlass ArmStaticInst : public StaticInst 516254Sgblack@eecs.umich.edu{ 526254Sgblack@eecs.umich.edu protected: 536255Sgblack@eecs.umich.edu int32_t shift_rm_imm(uint32_t base, uint32_t shamt, 546255Sgblack@eecs.umich.edu uint32_t type, uint32_t cfval) const; 556255Sgblack@eecs.umich.edu int32_t shift_rm_rs(uint32_t base, uint32_t shamt, 566255Sgblack@eecs.umich.edu uint32_t type, uint32_t cfval) const; 576254Sgblack@eecs.umich.edu 586255Sgblack@eecs.umich.edu bool shift_carry_imm(uint32_t base, uint32_t shamt, 596255Sgblack@eecs.umich.edu uint32_t type, uint32_t cfval) const; 606255Sgblack@eecs.umich.edu bool shift_carry_rs(uint32_t base, uint32_t shamt, 616255Sgblack@eecs.umich.edu uint32_t type, uint32_t cfval) const; 626254Sgblack@eecs.umich.edu 636255Sgblack@eecs.umich.edu bool arm_add_carry(int32_t result, int32_t lhs, int32_t rhs) const; 646255Sgblack@eecs.umich.edu bool arm_sub_carry(int32_t result, int32_t lhs, int32_t rhs) const; 656254Sgblack@eecs.umich.edu 666255Sgblack@eecs.umich.edu bool arm_add_overflow(int32_t result, int32_t lhs, int32_t rhs) const; 676255Sgblack@eecs.umich.edu bool arm_sub_overflow(int32_t result, int32_t lhs, int32_t rhs) const; 686254Sgblack@eecs.umich.edu 696254Sgblack@eecs.umich.edu // Constructor 706254Sgblack@eecs.umich.edu ArmStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass) 716254Sgblack@eecs.umich.edu : StaticInst(mnem, _machInst, __opClass) 726253Sgblack@eecs.umich.edu { 736254Sgblack@eecs.umich.edu } 746253Sgblack@eecs.umich.edu 756254Sgblack@eecs.umich.edu /// Print a register name for disassembly given the unique 766254Sgblack@eecs.umich.edu /// dependence tag number (FP or int). 776254Sgblack@eecs.umich.edu void printReg(std::ostream &os, int reg) const; 786262Sgblack@eecs.umich.edu void printMnemonic(std::ostream &os, 796262Sgblack@eecs.umich.edu const std::string &suffix = "", 806262Sgblack@eecs.umich.edu bool withPred = true) const; 816263Sgblack@eecs.umich.edu void printMemSymbol(std::ostream &os, const SymbolTable *symtab, 826263Sgblack@eecs.umich.edu const std::string &prefix, const Addr addr, 836263Sgblack@eecs.umich.edu const std::string &suffix) const; 846264Sgblack@eecs.umich.edu void printShiftOperand(std::ostream &os) const; 856263Sgblack@eecs.umich.edu 866253Sgblack@eecs.umich.edu 876306Sgblack@eecs.umich.edu void printDataInst(std::ostream &os, bool withImm) const; 886264Sgblack@eecs.umich.edu 896254Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 906748Sgblack@eecs.umich.edu 916748Sgblack@eecs.umich.edu static uint32_t 926748Sgblack@eecs.umich.edu cpsrWriteByInstr(CPSR cpsr, uint32_t val, 936748Sgblack@eecs.umich.edu uint8_t byteMask, bool affectState) 946748Sgblack@eecs.umich.edu { 956748Sgblack@eecs.umich.edu bool privileged = (cpsr.mode != MODE_USER); 966748Sgblack@eecs.umich.edu 976748Sgblack@eecs.umich.edu uint32_t bitMask = 0; 986748Sgblack@eecs.umich.edu 996748Sgblack@eecs.umich.edu if (bits(byteMask, 3)) { 1006748Sgblack@eecs.umich.edu unsigned lowIdx = affectState ? 24 : 27; 1016748Sgblack@eecs.umich.edu bitMask = bitMask | mask(31, lowIdx); 1026748Sgblack@eecs.umich.edu } 1036748Sgblack@eecs.umich.edu if (bits(byteMask, 2)) { 1046748Sgblack@eecs.umich.edu bitMask = bitMask | mask(19, 16); 1056748Sgblack@eecs.umich.edu } 1066748Sgblack@eecs.umich.edu if (bits(byteMask, 1)) { 1076748Sgblack@eecs.umich.edu unsigned highIdx = affectState ? 15 : 9; 1086748Sgblack@eecs.umich.edu unsigned lowIdx = privileged ? 8 : 9; 1096748Sgblack@eecs.umich.edu bitMask = bitMask | mask(highIdx, lowIdx); 1106748Sgblack@eecs.umich.edu } 1116748Sgblack@eecs.umich.edu if (bits(byteMask, 0)) { 1126748Sgblack@eecs.umich.edu if (privileged) { 1136748Sgblack@eecs.umich.edu bitMask = bitMask | mask(7, 6); 1146748Sgblack@eecs.umich.edu bitMask = bitMask | mask(5); 1156748Sgblack@eecs.umich.edu } 1166748Sgblack@eecs.umich.edu if (affectState) 1176748Sgblack@eecs.umich.edu bitMask = bitMask | (1 << 5); 1186748Sgblack@eecs.umich.edu } 1196748Sgblack@eecs.umich.edu 1206748Sgblack@eecs.umich.edu return ((uint32_t)cpsr & ~bitMask) | (val & bitMask); 1216748Sgblack@eecs.umich.edu } 1226748Sgblack@eecs.umich.edu 1236748Sgblack@eecs.umich.edu static uint32_t 1246748Sgblack@eecs.umich.edu spsrWriteByInstr(uint32_t spsr, uint32_t val, 1256748Sgblack@eecs.umich.edu uint8_t byteMask, bool affectState) 1266748Sgblack@eecs.umich.edu { 1276748Sgblack@eecs.umich.edu uint32_t bitMask = 0; 1286748Sgblack@eecs.umich.edu 1296748Sgblack@eecs.umich.edu if (bits(byteMask, 3)) 1306748Sgblack@eecs.umich.edu bitMask = bitMask | mask(31, 24); 1316748Sgblack@eecs.umich.edu if (bits(byteMask, 2)) 1326748Sgblack@eecs.umich.edu bitMask = bitMask | mask(19, 16); 1336748Sgblack@eecs.umich.edu if (bits(byteMask, 1)) 1346748Sgblack@eecs.umich.edu bitMask = bitMask | mask(15, 8); 1356748Sgblack@eecs.umich.edu if (bits(byteMask, 0)) 1366748Sgblack@eecs.umich.edu bitMask = bitMask | mask(7, 0); 1376748Sgblack@eecs.umich.edu 1386748Sgblack@eecs.umich.edu return ((spsr & ~bitMask) | (val & bitMask)); 1396748Sgblack@eecs.umich.edu } 1407093Sgblack@eecs.umich.edu 1417093Sgblack@eecs.umich.edu template<class XC> 1427093Sgblack@eecs.umich.edu static void 1437093Sgblack@eecs.umich.edu setNextPC(XC *xc, Addr val) 1447093Sgblack@eecs.umich.edu { 1457093Sgblack@eecs.umich.edu xc->setNextPC((xc->readNextPC() & PcModeMask) | 1467093Sgblack@eecs.umich.edu (val & ~PcModeMask)); 1477093Sgblack@eecs.umich.edu } 1486254Sgblack@eecs.umich.edu}; 1496253Sgblack@eecs.umich.edu} 1506253Sgblack@eecs.umich.edu 1516253Sgblack@eecs.umich.edu#endif //__ARCH_ARM_INSTS_STATICINST_HH__ 152