static_inst.hh revision 6748
16253Sgblack@eecs.umich.edu/* Copyright (c) 2007-2008 The Florida State University 26253Sgblack@eecs.umich.edu * All rights reserved. 36253Sgblack@eecs.umich.edu * 46253Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 56253Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 66253Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 76253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 86253Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 96253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 106253Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 116253Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 126253Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 136253Sgblack@eecs.umich.edu * this software without specific prior written permission. 146253Sgblack@eecs.umich.edu * 156253Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 166253Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 176253Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 186253Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 196253Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 206253Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 216253Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 226253Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 236253Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 246253Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 256253Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 266253Sgblack@eecs.umich.edu * 276253Sgblack@eecs.umich.edu * Authors: Stephen Hines 286253Sgblack@eecs.umich.edu */ 296253Sgblack@eecs.umich.edu#ifndef __ARCH_ARM_INSTS_STATICINST_HH__ 306253Sgblack@eecs.umich.edu#define __ARCH_ARM_INSTS_STATICINST_HH__ 316253Sgblack@eecs.umich.edu 326253Sgblack@eecs.umich.edu#include "base/trace.hh" 336253Sgblack@eecs.umich.edu#include "cpu/static_inst.hh" 346253Sgblack@eecs.umich.edu 356253Sgblack@eecs.umich.edunamespace ArmISA 366253Sgblack@eecs.umich.edu{ 376254Sgblack@eecs.umich.educlass ArmStaticInst : public StaticInst 386254Sgblack@eecs.umich.edu{ 396254Sgblack@eecs.umich.edu protected: 406255Sgblack@eecs.umich.edu int32_t shift_rm_imm(uint32_t base, uint32_t shamt, 416255Sgblack@eecs.umich.edu uint32_t type, uint32_t cfval) const; 426255Sgblack@eecs.umich.edu int32_t shift_rm_rs(uint32_t base, uint32_t shamt, 436255Sgblack@eecs.umich.edu uint32_t type, uint32_t cfval) const; 446254Sgblack@eecs.umich.edu 456255Sgblack@eecs.umich.edu bool shift_carry_imm(uint32_t base, uint32_t shamt, 466255Sgblack@eecs.umich.edu uint32_t type, uint32_t cfval) const; 476255Sgblack@eecs.umich.edu bool shift_carry_rs(uint32_t base, uint32_t shamt, 486255Sgblack@eecs.umich.edu uint32_t type, uint32_t cfval) const; 496254Sgblack@eecs.umich.edu 506255Sgblack@eecs.umich.edu bool arm_add_carry(int32_t result, int32_t lhs, int32_t rhs) const; 516255Sgblack@eecs.umich.edu bool arm_sub_carry(int32_t result, int32_t lhs, int32_t rhs) const; 526254Sgblack@eecs.umich.edu 536255Sgblack@eecs.umich.edu bool arm_add_overflow(int32_t result, int32_t lhs, int32_t rhs) const; 546255Sgblack@eecs.umich.edu bool arm_sub_overflow(int32_t result, int32_t lhs, int32_t rhs) const; 556254Sgblack@eecs.umich.edu 566254Sgblack@eecs.umich.edu // Constructor 576254Sgblack@eecs.umich.edu ArmStaticInst(const char *mnem, MachInst _machInst, OpClass __opClass) 586254Sgblack@eecs.umich.edu : StaticInst(mnem, _machInst, __opClass) 596253Sgblack@eecs.umich.edu { 606254Sgblack@eecs.umich.edu } 616253Sgblack@eecs.umich.edu 626254Sgblack@eecs.umich.edu /// Print a register name for disassembly given the unique 636254Sgblack@eecs.umich.edu /// dependence tag number (FP or int). 646254Sgblack@eecs.umich.edu void printReg(std::ostream &os, int reg) const; 656262Sgblack@eecs.umich.edu void printMnemonic(std::ostream &os, 666262Sgblack@eecs.umich.edu const std::string &suffix = "", 676262Sgblack@eecs.umich.edu bool withPred = true) const; 686263Sgblack@eecs.umich.edu void printMemSymbol(std::ostream &os, const SymbolTable *symtab, 696263Sgblack@eecs.umich.edu const std::string &prefix, const Addr addr, 706263Sgblack@eecs.umich.edu const std::string &suffix) const; 716264Sgblack@eecs.umich.edu void printShiftOperand(std::ostream &os) const; 726263Sgblack@eecs.umich.edu 736253Sgblack@eecs.umich.edu 746306Sgblack@eecs.umich.edu void printDataInst(std::ostream &os, bool withImm) const; 756264Sgblack@eecs.umich.edu 766254Sgblack@eecs.umich.edu std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 776748Sgblack@eecs.umich.edu 786748Sgblack@eecs.umich.edu static uint32_t 796748Sgblack@eecs.umich.edu cpsrWriteByInstr(CPSR cpsr, uint32_t val, 806748Sgblack@eecs.umich.edu uint8_t byteMask, bool affectState) 816748Sgblack@eecs.umich.edu { 826748Sgblack@eecs.umich.edu bool privileged = (cpsr.mode != MODE_USER); 836748Sgblack@eecs.umich.edu 846748Sgblack@eecs.umich.edu uint32_t bitMask = 0; 856748Sgblack@eecs.umich.edu 866748Sgblack@eecs.umich.edu if (bits(byteMask, 3)) { 876748Sgblack@eecs.umich.edu unsigned lowIdx = affectState ? 24 : 27; 886748Sgblack@eecs.umich.edu bitMask = bitMask | mask(31, lowIdx); 896748Sgblack@eecs.umich.edu } 906748Sgblack@eecs.umich.edu if (bits(byteMask, 2)) { 916748Sgblack@eecs.umich.edu bitMask = bitMask | mask(19, 16); 926748Sgblack@eecs.umich.edu } 936748Sgblack@eecs.umich.edu if (bits(byteMask, 1)) { 946748Sgblack@eecs.umich.edu unsigned highIdx = affectState ? 15 : 9; 956748Sgblack@eecs.umich.edu unsigned lowIdx = privileged ? 8 : 9; 966748Sgblack@eecs.umich.edu bitMask = bitMask | mask(highIdx, lowIdx); 976748Sgblack@eecs.umich.edu } 986748Sgblack@eecs.umich.edu if (bits(byteMask, 0)) { 996748Sgblack@eecs.umich.edu if (privileged) { 1006748Sgblack@eecs.umich.edu bitMask = bitMask | mask(7, 6); 1016748Sgblack@eecs.umich.edu bitMask = bitMask | mask(5); 1026748Sgblack@eecs.umich.edu } 1036748Sgblack@eecs.umich.edu if (affectState) 1046748Sgblack@eecs.umich.edu bitMask = bitMask | (1 << 5); 1056748Sgblack@eecs.umich.edu } 1066748Sgblack@eecs.umich.edu 1076748Sgblack@eecs.umich.edu return ((uint32_t)cpsr & ~bitMask) | (val & bitMask); 1086748Sgblack@eecs.umich.edu } 1096748Sgblack@eecs.umich.edu 1106748Sgblack@eecs.umich.edu static uint32_t 1116748Sgblack@eecs.umich.edu spsrWriteByInstr(uint32_t spsr, uint32_t val, 1126748Sgblack@eecs.umich.edu uint8_t byteMask, bool affectState) 1136748Sgblack@eecs.umich.edu { 1146748Sgblack@eecs.umich.edu uint32_t bitMask = 0; 1156748Sgblack@eecs.umich.edu 1166748Sgblack@eecs.umich.edu if (bits(byteMask, 3)) 1176748Sgblack@eecs.umich.edu bitMask = bitMask | mask(31, 24); 1186748Sgblack@eecs.umich.edu if (bits(byteMask, 2)) 1196748Sgblack@eecs.umich.edu bitMask = bitMask | mask(19, 16); 1206748Sgblack@eecs.umich.edu if (bits(byteMask, 1)) 1216748Sgblack@eecs.umich.edu bitMask = bitMask | mask(15, 8); 1226748Sgblack@eecs.umich.edu if (bits(byteMask, 0)) 1236748Sgblack@eecs.umich.edu bitMask = bitMask | mask(7, 0); 1246748Sgblack@eecs.umich.edu 1256748Sgblack@eecs.umich.edu return ((spsr & ~bitMask) | (val & bitMask)); 1266748Sgblack@eecs.umich.edu } 1276254Sgblack@eecs.umich.edu}; 1286253Sgblack@eecs.umich.edu} 1296253Sgblack@eecs.umich.edu 1306253Sgblack@eecs.umich.edu#endif //__ARCH_ARM_INSTS_STATICINST_HH__ 131