macromem.hh revision 7294 
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder.  You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated
11 * unmodified and in its entirety in all distributions of the software,
12 * modified or unmodified, in source code or in binary form.
13 *
14 * Copyright (c) 2007-2008 The Florida State University
15 * All rights reserved.
16 *
17 * Redistribution and use in source and binary forms, with or without
18 * modification, are permitted provided that the following conditions are
19 * met: redistributions of source code must retain the above copyright
20 * notice, this list of conditions and the following disclaimer;
21 * redistributions in binary form must reproduce the above copyright
22 * notice, this list of conditions and the following disclaimer in the
23 * documentation and/or other materials provided with the distribution;
24 * neither the name of the copyright holders nor the names of its
25 * contributors may be used to endorse or promote products derived from
26 * this software without specific prior written permission.
27 *
28 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
29 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
30 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
31 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
32 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
33 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
34 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
35 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
36 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
37 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
38 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
39 *
40 * Authors: Stephen Hines
41 */
42#ifndef __ARCH_ARM_MACROMEM_HH__
43#define __ARCH_ARM_MACROMEM_HH__
44
45#include "arch/arm/insts/pred_inst.hh"
46#include "arch/arm/tlb.hh"
47
48namespace ArmISA
49{
50
51static inline unsigned int
52number_of_ones(int32_t val)
53{
54    uint32_t ones = 0;
55    for (int i = 0; i < 32; i++ )
56    {
57        if ( val & (1<<i) )
58            ones++;
59    }
60    return ones;
61}
62
63/**
64 * Microops of the form IntRegA = IntRegB op Imm
65 */
66class MicroIntOp : public PredOp
67{
68  protected:
69    RegIndex ura, urb;
70    uint8_t imm;
71
72    MicroIntOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
73               RegIndex _ura, RegIndex _urb, uint8_t _imm)
74            : PredOp(mnem, machInst, __opClass),
75              ura(_ura), urb(_urb), imm(_imm)
76    {
77    }
78};
79
80/**
81 * Memory microops which use IntReg + Imm addressing
82 */
83class MicroMemOp : public MicroIntOp
84{
85  protected:
86    bool up;
87    unsigned memAccessFlags;
88
89    MicroMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
90               RegIndex _ura, RegIndex _urb, bool _up, uint8_t _imm)
91            : MicroIntOp(mnem, machInst, __opClass, _ura, _urb, _imm),
92              up(_up), memAccessFlags(TLB::MustBeOne | TLB::AlignWord)
93    {
94    }
95};
96
97class MacroMemOp : public PredMacroOp
98{
99  protected:
100    MacroMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
101               IntRegIndex rn, bool index, bool up, bool user,
102               bool writeback, bool load, uint32_t reglist);
103};
104
105class MacroVFPMemOp : public PredMacroOp
106{
107  protected:
108    MacroVFPMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass,
109                  IntRegIndex rn, RegIndex vd, bool single, bool up,
110                  bool writeback, bool load, uint32_t offset);
111};
112
113}
114
115#endif //__ARCH_ARM_INSTS_MACROMEM_HH__
116