macromem.hh revision 7431
17130Sgblack@eecs.umich.edu/* 27130Sgblack@eecs.umich.edu * Copyright (c) 2010 ARM Limited 37130Sgblack@eecs.umich.edu * All rights reserved 47130Sgblack@eecs.umich.edu * 57130Sgblack@eecs.umich.edu * The license below extends only to copyright in the software and shall 67130Sgblack@eecs.umich.edu * not be construed as granting a license to any other intellectual 77130Sgblack@eecs.umich.edu * property including but not limited to intellectual property relating 87130Sgblack@eecs.umich.edu * to a hardware implementation of the functionality of the software 97130Sgblack@eecs.umich.edu * licensed hereunder. You may use the software subject to the license 107130Sgblack@eecs.umich.edu * terms below provided that you ensure that this notice is replicated 117130Sgblack@eecs.umich.edu * unmodified and in its entirety in all distributions of the software, 127130Sgblack@eecs.umich.edu * modified or unmodified, in source code or in binary form. 137130Sgblack@eecs.umich.edu * 147130Sgblack@eecs.umich.edu * Copyright (c) 2007-2008 The Florida State University 156253Sgblack@eecs.umich.edu * All rights reserved. 166253Sgblack@eecs.umich.edu * 176253Sgblack@eecs.umich.edu * Redistribution and use in source and binary forms, with or without 186253Sgblack@eecs.umich.edu * modification, are permitted provided that the following conditions are 196253Sgblack@eecs.umich.edu * met: redistributions of source code must retain the above copyright 206253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer; 216253Sgblack@eecs.umich.edu * redistributions in binary form must reproduce the above copyright 226253Sgblack@eecs.umich.edu * notice, this list of conditions and the following disclaimer in the 236253Sgblack@eecs.umich.edu * documentation and/or other materials provided with the distribution; 246253Sgblack@eecs.umich.edu * neither the name of the copyright holders nor the names of its 256253Sgblack@eecs.umich.edu * contributors may be used to endorse or promote products derived from 266253Sgblack@eecs.umich.edu * this software without specific prior written permission. 276253Sgblack@eecs.umich.edu * 286253Sgblack@eecs.umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 296253Sgblack@eecs.umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 306253Sgblack@eecs.umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 316253Sgblack@eecs.umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 326253Sgblack@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 336253Sgblack@eecs.umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 346253Sgblack@eecs.umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 356253Sgblack@eecs.umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 366253Sgblack@eecs.umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 376253Sgblack@eecs.umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 386253Sgblack@eecs.umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 396253Sgblack@eecs.umich.edu * 406253Sgblack@eecs.umich.edu * Authors: Stephen Hines 416253Sgblack@eecs.umich.edu */ 426253Sgblack@eecs.umich.edu#ifndef __ARCH_ARM_MACROMEM_HH__ 436253Sgblack@eecs.umich.edu#define __ARCH_ARM_MACROMEM_HH__ 446253Sgblack@eecs.umich.edu 456253Sgblack@eecs.umich.edu#include "arch/arm/insts/pred_inst.hh" 467294Sgblack@eecs.umich.edu#include "arch/arm/tlb.hh" 476253Sgblack@eecs.umich.edu 486253Sgblack@eecs.umich.edunamespace ArmISA 496253Sgblack@eecs.umich.edu{ 506253Sgblack@eecs.umich.edu 516253Sgblack@eecs.umich.edustatic inline unsigned int 526253Sgblack@eecs.umich.edunumber_of_ones(int32_t val) 536253Sgblack@eecs.umich.edu{ 546253Sgblack@eecs.umich.edu uint32_t ones = 0; 556253Sgblack@eecs.umich.edu for (int i = 0; i < 32; i++ ) 566253Sgblack@eecs.umich.edu { 576253Sgblack@eecs.umich.edu if ( val & (1<<i) ) 586253Sgblack@eecs.umich.edu ones++; 596253Sgblack@eecs.umich.edu } 606253Sgblack@eecs.umich.edu return ones; 616253Sgblack@eecs.umich.edu} 626253Sgblack@eecs.umich.edu 637431Sgblack@eecs.umich.edu/** 647431Sgblack@eecs.umich.edu * Base class for Memory microops 657431Sgblack@eecs.umich.edu */ 667343Sgblack@eecs.umich.educlass MicroOp : public PredOp 677343Sgblack@eecs.umich.edu{ 687343Sgblack@eecs.umich.edu protected: 697343Sgblack@eecs.umich.edu MicroOp(const char *mnem, ExtMachInst machInst, OpClass __opClass) 707343Sgblack@eecs.umich.edu : PredOp(mnem, machInst, __opClass) 717343Sgblack@eecs.umich.edu { 727343Sgblack@eecs.umich.edu } 737343Sgblack@eecs.umich.edu 747343Sgblack@eecs.umich.edu public: 757343Sgblack@eecs.umich.edu void 767343Sgblack@eecs.umich.edu setDelayedCommit() 777343Sgblack@eecs.umich.edu { 787343Sgblack@eecs.umich.edu flags[IsDelayedCommit] = true; 797343Sgblack@eecs.umich.edu } 807343Sgblack@eecs.umich.edu}; 817343Sgblack@eecs.umich.edu 826253Sgblack@eecs.umich.edu/** 836308Sgblack@eecs.umich.edu * Microops of the form IntRegA = IntRegB op Imm 846308Sgblack@eecs.umich.edu */ 857343Sgblack@eecs.umich.educlass MicroIntOp : public MicroOp 866308Sgblack@eecs.umich.edu{ 876308Sgblack@eecs.umich.edu protected: 886308Sgblack@eecs.umich.edu RegIndex ura, urb; 896308Sgblack@eecs.umich.edu uint8_t imm; 906308Sgblack@eecs.umich.edu 916308Sgblack@eecs.umich.edu MicroIntOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, 926308Sgblack@eecs.umich.edu RegIndex _ura, RegIndex _urb, uint8_t _imm) 937343Sgblack@eecs.umich.edu : MicroOp(mnem, machInst, __opClass), 946308Sgblack@eecs.umich.edu ura(_ura), urb(_urb), imm(_imm) 956308Sgblack@eecs.umich.edu { 966308Sgblack@eecs.umich.edu } 976308Sgblack@eecs.umich.edu}; 986308Sgblack@eecs.umich.edu 996308Sgblack@eecs.umich.edu/** 1006309Sgblack@eecs.umich.edu * Memory microops which use IntReg + Imm addressing 1016309Sgblack@eecs.umich.edu */ 1026309Sgblack@eecs.umich.educlass MicroMemOp : public MicroIntOp 1036309Sgblack@eecs.umich.edu{ 1046309Sgblack@eecs.umich.edu protected: 1057134Sgblack@eecs.umich.edu bool up; 1066309Sgblack@eecs.umich.edu unsigned memAccessFlags; 1076309Sgblack@eecs.umich.edu 1086309Sgblack@eecs.umich.edu MicroMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, 1097134Sgblack@eecs.umich.edu RegIndex _ura, RegIndex _urb, bool _up, uint8_t _imm) 1106309Sgblack@eecs.umich.edu : MicroIntOp(mnem, machInst, __opClass, _ura, _urb, _imm), 1117294Sgblack@eecs.umich.edu up(_up), memAccessFlags(TLB::MustBeOne | TLB::AlignWord) 1126309Sgblack@eecs.umich.edu { 1136309Sgblack@eecs.umich.edu } 1146309Sgblack@eecs.umich.edu}; 1156309Sgblack@eecs.umich.edu 1167431Sgblack@eecs.umich.edu/** 1177431Sgblack@eecs.umich.edu * Base class for microcoded integer memory instructions. 1187431Sgblack@eecs.umich.edu */ 1197170Sgblack@eecs.umich.educlass MacroMemOp : public PredMacroOp 1207170Sgblack@eecs.umich.edu{ 1217170Sgblack@eecs.umich.edu protected: 1227170Sgblack@eecs.umich.edu MacroMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, 1237170Sgblack@eecs.umich.edu IntRegIndex rn, bool index, bool up, bool user, 1247170Sgblack@eecs.umich.edu bool writeback, bool load, uint32_t reglist); 1257170Sgblack@eecs.umich.edu}; 1267170Sgblack@eecs.umich.edu 1277431Sgblack@eecs.umich.edu/** 1287431Sgblack@eecs.umich.edu * Base class for microcoded floating point memory instructions. 1297431Sgblack@eecs.umich.edu */ 1307175Sgblack@eecs.umich.educlass MacroVFPMemOp : public PredMacroOp 1317175Sgblack@eecs.umich.edu{ 1327175Sgblack@eecs.umich.edu protected: 1337175Sgblack@eecs.umich.edu MacroVFPMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, 1347175Sgblack@eecs.umich.edu IntRegIndex rn, RegIndex vd, bool single, bool up, 1357175Sgblack@eecs.umich.edu bool writeback, bool load, uint32_t offset); 1367175Sgblack@eecs.umich.edu}; 1377175Sgblack@eecs.umich.edu 1386253Sgblack@eecs.umich.edu} 1396253Sgblack@eecs.umich.edu 1406253Sgblack@eecs.umich.edu#endif //__ARCH_ARM_INSTS_MACROMEM_HH__ 141