macromem.hh revision 7343
13898Ssaidi@eecs.umich.edu/* 22934Sktlim@umich.edu * Copyright (c) 2010 ARM Limited 32934Sktlim@umich.edu * All rights reserved 42934Sktlim@umich.edu * 52934Sktlim@umich.edu * The license below extends only to copyright in the software and shall 62934Sktlim@umich.edu * not be construed as granting a license to any other intellectual 72934Sktlim@umich.edu * property including but not limited to intellectual property relating 82934Sktlim@umich.edu * to a hardware implementation of the functionality of the software 92934Sktlim@umich.edu * licensed hereunder. You may use the software subject to the license 102934Sktlim@umich.edu * terms below provided that you ensure that this notice is replicated 112934Sktlim@umich.edu * unmodified and in its entirety in all distributions of the software, 122934Sktlim@umich.edu * modified or unmodified, in source code or in binary form. 132934Sktlim@umich.edu * 142934Sktlim@umich.edu * Copyright (c) 2007-2008 The Florida State University 152934Sktlim@umich.edu * All rights reserved. 162934Sktlim@umich.edu * 172934Sktlim@umich.edu * Redistribution and use in source and binary forms, with or without 182934Sktlim@umich.edu * modification, are permitted provided that the following conditions are 192934Sktlim@umich.edu * met: redistributions of source code must retain the above copyright 202934Sktlim@umich.edu * notice, this list of conditions and the following disclaimer; 212934Sktlim@umich.edu * redistributions in binary form must reproduce the above copyright 222934Sktlim@umich.edu * notice, this list of conditions and the following disclaimer in the 232934Sktlim@umich.edu * documentation and/or other materials provided with the distribution; 242934Sktlim@umich.edu * neither the name of the copyright holders nor the names of its 252934Sktlim@umich.edu * contributors may be used to endorse or promote products derived from 262934Sktlim@umich.edu * this software without specific prior written permission. 272934Sktlim@umich.edu * 282934Sktlim@umich.edu * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 292934Sktlim@umich.edu * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 302969Sktlim@umich.edu * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 312934Sktlim@umich.edu * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 322995Ssaidi@eecs.umich.edu * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 332934Sktlim@umich.edu * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 342934Sktlim@umich.edu * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 352934Sktlim@umich.edu * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 362934Sktlim@umich.edu * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 372934Sktlim@umich.edu * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 382934Sktlim@umich.edu * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 392934Sktlim@umich.edu * 402934Sktlim@umich.edu * Authors: Stephen Hines 413898Ssaidi@eecs.umich.edu */ 423898Ssaidi@eecs.umich.edu#ifndef __ARCH_ARM_MACROMEM_HH__ 433898Ssaidi@eecs.umich.edu#define __ARCH_ARM_MACROMEM_HH__ 443898Ssaidi@eecs.umich.edu 453898Ssaidi@eecs.umich.edu#include "arch/arm/insts/pred_inst.hh" 463898Ssaidi@eecs.umich.edu#include "arch/arm/tlb.hh" 473898Ssaidi@eecs.umich.edu 483898Ssaidi@eecs.umich.edunamespace ArmISA 492934Sktlim@umich.edu{ 502934Sktlim@umich.edu 512934Sktlim@umich.edustatic inline unsigned int 522934Sktlim@umich.edunumber_of_ones(int32_t val) 532934Sktlim@umich.edu{ 542934Sktlim@umich.edu uint32_t ones = 0; 552934Sktlim@umich.edu for (int i = 0; i < 32; i++ ) 563005Sstever@eecs.umich.edu { 572934Sktlim@umich.edu if ( val & (1<<i) ) 583005Sstever@eecs.umich.edu ones++; 593005Sstever@eecs.umich.edu } 603304Sstever@eecs.umich.edu return ones; 612995Ssaidi@eecs.umich.edu} 622934Sktlim@umich.edu 632934Sktlim@umich.educlass MicroOp : public PredOp 642934Sktlim@umich.edu{ 652995Ssaidi@eecs.umich.edu protected: 662934Sktlim@umich.edu MicroOp(const char *mnem, ExtMachInst machInst, OpClass __opClass) 672934Sktlim@umich.edu : PredOp(mnem, machInst, __opClass) 682934Sktlim@umich.edu { 692934Sktlim@umich.edu } 702934Sktlim@umich.edu 712995Ssaidi@eecs.umich.edu public: 722934Sktlim@umich.edu void 732934Sktlim@umich.edu setDelayedCommit() 742934Sktlim@umich.edu { 752934Sktlim@umich.edu flags[IsDelayedCommit] = true; 762934Sktlim@umich.edu } 772995Ssaidi@eecs.umich.edu}; 782934Sktlim@umich.edu 792934Sktlim@umich.edu/** 802953Sktlim@umich.edu * Microops of the form IntRegA = IntRegB op Imm 814094Sbinkertn@umich.edu */ 822934Sktlim@umich.educlass MicroIntOp : public MicroOp 833449Shsul@eecs.umich.edu{ 842934Sktlim@umich.edu protected: 852934Sktlim@umich.edu RegIndex ura, urb; 862934Sktlim@umich.edu uint8_t imm; 872934Sktlim@umich.edu 882934Sktlim@umich.edu MicroIntOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, 893584Ssaidi@eecs.umich.edu RegIndex _ura, RegIndex _urb, uint8_t _imm) 903584Ssaidi@eecs.umich.edu : MicroOp(mnem, machInst, __opClass), 913584Ssaidi@eecs.umich.edu ura(_ura), urb(_urb), imm(_imm) 923584Ssaidi@eecs.umich.edu { 933584Ssaidi@eecs.umich.edu } 943584Ssaidi@eecs.umich.edu}; 953743Sgblack@eecs.umich.edu 963584Ssaidi@eecs.umich.edu/** 973743Sgblack@eecs.umich.edu * Memory microops which use IntReg + Imm addressing 983743Sgblack@eecs.umich.edu */ 993743Sgblack@eecs.umich.educlass MicroMemOp : public MicroIntOp 1003823Ssaidi@eecs.umich.edu{ 1013814Ssaidi@eecs.umich.edu protected: 1023743Sgblack@eecs.umich.edu bool up; 1033743Sgblack@eecs.umich.edu unsigned memAccessFlags; 1043584Ssaidi@eecs.umich.edu 1053814Ssaidi@eecs.umich.edu MicroMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, 1063584Ssaidi@eecs.umich.edu RegIndex _ura, RegIndex _urb, bool _up, uint8_t _imm) 1073745Sgblack@eecs.umich.edu : MicroIntOp(mnem, machInst, __opClass, _ura, _urb, _imm), 1083745Sgblack@eecs.umich.edu up(_up), memAccessFlags(TLB::MustBeOne | TLB::AlignWord) 1093745Sgblack@eecs.umich.edu { 1103584Ssaidi@eecs.umich.edu } 1113898Ssaidi@eecs.umich.edu}; 1123898Ssaidi@eecs.umich.edu 1133898Ssaidi@eecs.umich.educlass MacroMemOp : public PredMacroOp 1144103Ssaidi@eecs.umich.edu{ 1154103Ssaidi@eecs.umich.edu protected: 1164103Ssaidi@eecs.umich.edu MacroMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, 1173745Sgblack@eecs.umich.edu IntRegIndex rn, bool index, bool up, bool user, 1183745Sgblack@eecs.umich.edu bool writeback, bool load, uint32_t reglist); 1193745Sgblack@eecs.umich.edu}; 1203584Ssaidi@eecs.umich.edu 1213584Ssaidi@eecs.umich.educlass MacroVFPMemOp : public PredMacroOp 1223584Ssaidi@eecs.umich.edu{ 1233584Ssaidi@eecs.umich.edu protected: 1243025Ssaidi@eecs.umich.edu MacroVFPMemOp(const char *mnem, ExtMachInst machInst, OpClass __opClass, 1252934Sktlim@umich.edu IntRegIndex rn, RegIndex vd, bool single, bool up, 1262995Ssaidi@eecs.umich.edu bool writeback, bool load, uint32_t offset); 1272995Ssaidi@eecs.umich.edu}; 1283025Ssaidi@eecs.umich.edu 1293025Ssaidi@eecs.umich.edu} 1303025Ssaidi@eecs.umich.edu 1313025Ssaidi@eecs.umich.edu#endif //__ARCH_ARM_INSTS_MACROMEM_HH__ 1323025Ssaidi@eecs.umich.edu