data64.hh revision 10037
110037SARM gem5 Developers/* 210037SARM gem5 Developers * Copyright (c) 2011-2013 ARM Limited 310037SARM gem5 Developers * All rights reserved 410037SARM gem5 Developers * 510037SARM gem5 Developers * The license below extends only to copyright in the software and shall 610037SARM gem5 Developers * not be construed as granting a license to any other intellectual 710037SARM gem5 Developers * property including but not limited to intellectual property relating 810037SARM gem5 Developers * to a hardware implementation of the functionality of the software 910037SARM gem5 Developers * licensed hereunder. You may use the software subject to the license 1010037SARM gem5 Developers * terms below provided that you ensure that this notice is replicated 1110037SARM gem5 Developers * unmodified and in its entirety in all distributions of the software, 1210037SARM gem5 Developers * modified or unmodified, in source code or in binary form. 1310037SARM gem5 Developers * 1410037SARM gem5 Developers * Redistribution and use in source and binary forms, with or without 1510037SARM gem5 Developers * modification, are permitted provided that the following conditions are 1610037SARM gem5 Developers * met: redistributions of source code must retain the above copyright 1710037SARM gem5 Developers * notice, this list of conditions and the following disclaimer; 1810037SARM gem5 Developers * redistributions in binary form must reproduce the above copyright 1910037SARM gem5 Developers * notice, this list of conditions and the following disclaimer in the 2010037SARM gem5 Developers * documentation and/or other materials provided with the distribution; 2110037SARM gem5 Developers * neither the name of the copyright holders nor the names of its 2210037SARM gem5 Developers * contributors may be used to endorse or promote products derived from 2310037SARM gem5 Developers * this software without specific prior written permission. 2410037SARM gem5 Developers * 2510037SARM gem5 Developers * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2610037SARM gem5 Developers * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2710037SARM gem5 Developers * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2810037SARM gem5 Developers * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2910037SARM gem5 Developers * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3010037SARM gem5 Developers * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3110037SARM gem5 Developers * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3210037SARM gem5 Developers * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3310037SARM gem5 Developers * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3410037SARM gem5 Developers * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3510037SARM gem5 Developers * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3610037SARM gem5 Developers * 3710037SARM gem5 Developers * Authors: Gabe Black 3810037SARM gem5 Developers */ 3910037SARM gem5 Developers#ifndef __ARCH_ARM_INSTS_DATA64_HH__ 4010037SARM gem5 Developers#define __ARCH_ARM_INSTS_DATA64_HH__ 4110037SARM gem5 Developers 4210037SARM gem5 Developers#include "arch/arm/insts/static_inst.hh" 4310037SARM gem5 Developers#include "base/trace.hh" 4410037SARM gem5 Developers 4510037SARM gem5 Developersnamespace ArmISA 4610037SARM gem5 Developers{ 4710037SARM gem5 Developers 4810037SARM gem5 Developersclass DataXImmOp : public ArmStaticInst 4910037SARM gem5 Developers{ 5010037SARM gem5 Developers protected: 5110037SARM gem5 Developers IntRegIndex dest, op1; 5210037SARM gem5 Developers uint64_t imm; 5310037SARM gem5 Developers 5410037SARM gem5 Developers DataXImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 5510037SARM gem5 Developers IntRegIndex _dest, IntRegIndex _op1, uint64_t _imm) : 5610037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass), 5710037SARM gem5 Developers dest(_dest), op1(_op1), imm(_imm) 5810037SARM gem5 Developers {} 5910037SARM gem5 Developers 6010037SARM gem5 Developers std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 6110037SARM gem5 Developers}; 6210037SARM gem5 Developers 6310037SARM gem5 Developersclass DataXImmOnlyOp : public ArmStaticInst 6410037SARM gem5 Developers{ 6510037SARM gem5 Developers protected: 6610037SARM gem5 Developers IntRegIndex dest; 6710037SARM gem5 Developers uint64_t imm; 6810037SARM gem5 Developers 6910037SARM gem5 Developers DataXImmOnlyOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 7010037SARM gem5 Developers IntRegIndex _dest, uint64_t _imm) : 7110037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass), 7210037SARM gem5 Developers dest(_dest), imm(_imm) 7310037SARM gem5 Developers {} 7410037SARM gem5 Developers 7510037SARM gem5 Developers std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 7610037SARM gem5 Developers}; 7710037SARM gem5 Developers 7810037SARM gem5 Developersclass DataXSRegOp : public ArmStaticInst 7910037SARM gem5 Developers{ 8010037SARM gem5 Developers protected: 8110037SARM gem5 Developers IntRegIndex dest, op1, op2; 8210037SARM gem5 Developers int32_t shiftAmt; 8310037SARM gem5 Developers ArmShiftType shiftType; 8410037SARM gem5 Developers 8510037SARM gem5 Developers DataXSRegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 8610037SARM gem5 Developers IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 8710037SARM gem5 Developers int32_t _shiftAmt, ArmShiftType _shiftType) : 8810037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass), 8910037SARM gem5 Developers dest(_dest), op1(_op1), op2(_op2), 9010037SARM gem5 Developers shiftAmt(_shiftAmt), shiftType(_shiftType) 9110037SARM gem5 Developers {} 9210037SARM gem5 Developers 9310037SARM gem5 Developers std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 9410037SARM gem5 Developers}; 9510037SARM gem5 Developers 9610037SARM gem5 Developersclass DataXERegOp : public ArmStaticInst 9710037SARM gem5 Developers{ 9810037SARM gem5 Developers protected: 9910037SARM gem5 Developers IntRegIndex dest, op1, op2; 10010037SARM gem5 Developers ArmExtendType extendType; 10110037SARM gem5 Developers int32_t shiftAmt; 10210037SARM gem5 Developers 10310037SARM gem5 Developers DataXERegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 10410037SARM gem5 Developers IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 10510037SARM gem5 Developers ArmExtendType _extendType, int32_t _shiftAmt) : 10610037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass), 10710037SARM gem5 Developers dest(_dest), op1(_op1), op2(_op2), 10810037SARM gem5 Developers extendType(_extendType), shiftAmt(_shiftAmt) 10910037SARM gem5 Developers {} 11010037SARM gem5 Developers 11110037SARM gem5 Developers std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 11210037SARM gem5 Developers}; 11310037SARM gem5 Developers 11410037SARM gem5 Developersclass DataX1RegOp : public ArmStaticInst 11510037SARM gem5 Developers{ 11610037SARM gem5 Developers protected: 11710037SARM gem5 Developers IntRegIndex dest, op1; 11810037SARM gem5 Developers 11910037SARM gem5 Developers DataX1RegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 12010037SARM gem5 Developers IntRegIndex _dest, IntRegIndex _op1) : 12110037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass), dest(_dest), op1(_op1) 12210037SARM gem5 Developers {} 12310037SARM gem5 Developers 12410037SARM gem5 Developers std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 12510037SARM gem5 Developers}; 12610037SARM gem5 Developers 12710037SARM gem5 Developersclass DataX1RegImmOp : public ArmStaticInst 12810037SARM gem5 Developers{ 12910037SARM gem5 Developers protected: 13010037SARM gem5 Developers IntRegIndex dest, op1; 13110037SARM gem5 Developers uint64_t imm; 13210037SARM gem5 Developers 13310037SARM gem5 Developers DataX1RegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 13410037SARM gem5 Developers IntRegIndex _dest, IntRegIndex _op1, uint64_t _imm) : 13510037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass), dest(_dest), op1(_op1), 13610037SARM gem5 Developers imm(_imm) 13710037SARM gem5 Developers {} 13810037SARM gem5 Developers 13910037SARM gem5 Developers std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 14010037SARM gem5 Developers}; 14110037SARM gem5 Developers 14210037SARM gem5 Developersclass DataX1Reg2ImmOp : public ArmStaticInst 14310037SARM gem5 Developers{ 14410037SARM gem5 Developers protected: 14510037SARM gem5 Developers IntRegIndex dest, op1; 14610037SARM gem5 Developers uint64_t imm1, imm2; 14710037SARM gem5 Developers 14810037SARM gem5 Developers DataX1Reg2ImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 14910037SARM gem5 Developers IntRegIndex _dest, IntRegIndex _op1, uint64_t _imm1, 15010037SARM gem5 Developers uint64_t _imm2) : 15110037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass), dest(_dest), op1(_op1), 15210037SARM gem5 Developers imm1(_imm1), imm2(_imm2) 15310037SARM gem5 Developers {} 15410037SARM gem5 Developers 15510037SARM gem5 Developers std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 15610037SARM gem5 Developers}; 15710037SARM gem5 Developers 15810037SARM gem5 Developersclass DataX2RegOp : public ArmStaticInst 15910037SARM gem5 Developers{ 16010037SARM gem5 Developers protected: 16110037SARM gem5 Developers IntRegIndex dest, op1, op2; 16210037SARM gem5 Developers 16310037SARM gem5 Developers DataX2RegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 16410037SARM gem5 Developers IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2) : 16510037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass), 16610037SARM gem5 Developers dest(_dest), op1(_op1), op2(_op2) 16710037SARM gem5 Developers {} 16810037SARM gem5 Developers 16910037SARM gem5 Developers std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 17010037SARM gem5 Developers}; 17110037SARM gem5 Developers 17210037SARM gem5 Developersclass DataX2RegImmOp : public ArmStaticInst 17310037SARM gem5 Developers{ 17410037SARM gem5 Developers protected: 17510037SARM gem5 Developers IntRegIndex dest, op1, op2; 17610037SARM gem5 Developers uint64_t imm; 17710037SARM gem5 Developers 17810037SARM gem5 Developers DataX2RegImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 17910037SARM gem5 Developers IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 18010037SARM gem5 Developers uint64_t _imm) : 18110037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass), 18210037SARM gem5 Developers dest(_dest), op1(_op1), op2(_op2), imm(_imm) 18310037SARM gem5 Developers {} 18410037SARM gem5 Developers 18510037SARM gem5 Developers std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 18610037SARM gem5 Developers}; 18710037SARM gem5 Developers 18810037SARM gem5 Developersclass DataX3RegOp : public ArmStaticInst 18910037SARM gem5 Developers{ 19010037SARM gem5 Developers protected: 19110037SARM gem5 Developers IntRegIndex dest, op1, op2, op3; 19210037SARM gem5 Developers 19310037SARM gem5 Developers DataX3RegOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 19410037SARM gem5 Developers IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 19510037SARM gem5 Developers IntRegIndex _op3) : 19610037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass), 19710037SARM gem5 Developers dest(_dest), op1(_op1), op2(_op2), op3(_op3) 19810037SARM gem5 Developers {} 19910037SARM gem5 Developers 20010037SARM gem5 Developers std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 20110037SARM gem5 Developers}; 20210037SARM gem5 Developers 20310037SARM gem5 Developersclass DataXCondCompImmOp : public ArmStaticInst 20410037SARM gem5 Developers{ 20510037SARM gem5 Developers protected: 20610037SARM gem5 Developers IntRegIndex op1; 20710037SARM gem5 Developers uint64_t imm; 20810037SARM gem5 Developers ConditionCode condCode; 20910037SARM gem5 Developers uint8_t defCc; 21010037SARM gem5 Developers 21110037SARM gem5 Developers DataXCondCompImmOp(const char *mnem, ExtMachInst _machInst, 21210037SARM gem5 Developers OpClass __opClass, IntRegIndex _op1, uint64_t _imm, 21310037SARM gem5 Developers ConditionCode _condCode, uint8_t _defCc) : 21410037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass), 21510037SARM gem5 Developers op1(_op1), imm(_imm), condCode(_condCode), defCc(_defCc) 21610037SARM gem5 Developers {} 21710037SARM gem5 Developers 21810037SARM gem5 Developers std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 21910037SARM gem5 Developers}; 22010037SARM gem5 Developers 22110037SARM gem5 Developersclass DataXCondCompRegOp : public ArmStaticInst 22210037SARM gem5 Developers{ 22310037SARM gem5 Developers protected: 22410037SARM gem5 Developers IntRegIndex op1, op2; 22510037SARM gem5 Developers ConditionCode condCode; 22610037SARM gem5 Developers uint8_t defCc; 22710037SARM gem5 Developers 22810037SARM gem5 Developers DataXCondCompRegOp(const char *mnem, ExtMachInst _machInst, 22910037SARM gem5 Developers OpClass __opClass, IntRegIndex _op1, IntRegIndex _op2, 23010037SARM gem5 Developers ConditionCode _condCode, uint8_t _defCc) : 23110037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass), 23210037SARM gem5 Developers op1(_op1), op2(_op2), condCode(_condCode), defCc(_defCc) 23310037SARM gem5 Developers {} 23410037SARM gem5 Developers 23510037SARM gem5 Developers std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 23610037SARM gem5 Developers}; 23710037SARM gem5 Developers 23810037SARM gem5 Developersclass DataXCondSelOp : public ArmStaticInst 23910037SARM gem5 Developers{ 24010037SARM gem5 Developers protected: 24110037SARM gem5 Developers IntRegIndex dest, op1, op2; 24210037SARM gem5 Developers ConditionCode condCode; 24310037SARM gem5 Developers 24410037SARM gem5 Developers DataXCondSelOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass, 24510037SARM gem5 Developers IntRegIndex _dest, IntRegIndex _op1, IntRegIndex _op2, 24610037SARM gem5 Developers ConditionCode _condCode) : 24710037SARM gem5 Developers ArmStaticInst(mnem, _machInst, __opClass), 24810037SARM gem5 Developers dest(_dest), op1(_op1), op2(_op2), condCode(_condCode) 24910037SARM gem5 Developers {} 25010037SARM gem5 Developers 25110037SARM gem5 Developers std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; 25210037SARM gem5 Developers}; 25310037SARM gem5 Developers 25410037SARM gem5 Developers} 25510037SARM gem5 Developers 25610037SARM gem5 Developers#endif //__ARCH_ARM_INSTS_PREDINST_HH__ 257