ArmPMU.py revision 11988
112841Sgabeblack@google.com# -*- mode:python -*- 212841Sgabeblack@google.com# Copyright (c) 2009-2014 ARM Limited 312841Sgabeblack@google.com# All rights reserved. 412841Sgabeblack@google.com# 512841Sgabeblack@google.com# The license below extends only to copyright in the software and shall 612841Sgabeblack@google.com# not be construed as granting a license to any other intellectual 712841Sgabeblack@google.com# property including but not limited to intellectual property relating 812841Sgabeblack@google.com# to a hardware implementation of the functionality of the software 912841Sgabeblack@google.com# licensed hereunder. You may use the software subject to the license 1012841Sgabeblack@google.com# terms below provided that you ensure that this notice is replicated 1112841Sgabeblack@google.com# unmodified and in its entirety in all distributions of the software, 1212841Sgabeblack@google.com# modified or unmodified, in source code or in binary form. 1312841Sgabeblack@google.com# 1412841Sgabeblack@google.com# Redistribution and use in source and binary forms, with or without 1512841Sgabeblack@google.com# modification, are permitted provided that the following conditions are 1612841Sgabeblack@google.com# met: redistributions of source code must retain the above copyright 1712841Sgabeblack@google.com# notice, this list of conditions and the following disclaimer; 1812841Sgabeblack@google.com# redistributions in binary form must reproduce the above copyright 1912841Sgabeblack@google.com# notice, this list of conditions and the following disclaimer in the 2012841Sgabeblack@google.com# documentation and/or other materials provided with the distribution; 2112841Sgabeblack@google.com# neither the name of the copyright holders nor the names of its 2212841Sgabeblack@google.com# contributors may be used to endorse or promote products derived from 2312841Sgabeblack@google.com# this software without specific prior written permission. 2412841Sgabeblack@google.com# 2512841Sgabeblack@google.com# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 2612841Sgabeblack@google.com# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 2712841Sgabeblack@google.com# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 2812841Sgabeblack@google.com# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 2912841Sgabeblack@google.com# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 3012841Sgabeblack@google.com# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 3112841Sgabeblack@google.com# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 3212841Sgabeblack@google.com# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 3312841Sgabeblack@google.com# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 3412841Sgabeblack@google.com# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 3512841Sgabeblack@google.com# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 3612841Sgabeblack@google.com# 3712841Sgabeblack@google.com# Authors: Matt Horsnell 3812853Sgabeblack@google.com# Andreas Sandberg 3912841Sgabeblack@google.com 4012841Sgabeblack@google.comfrom m5.defines import buildEnv 4112841Sgabeblack@google.comfrom m5.SimObject import * 4212841Sgabeblack@google.comfrom m5.params import * 4312853Sgabeblack@google.comfrom m5.params import isNullPointer 4412841Sgabeblack@google.comfrom m5.proxy import * 4512841Sgabeblack@google.com 4612841Sgabeblack@google.comclass ArmPMU(SimObject): 4712841Sgabeblack@google.com type = 'ArmPMU' 4812841Sgabeblack@google.com cxx_class = 'ArmISA::PMU' 4912841Sgabeblack@google.com cxx_header = 'arch/arm/pmu.hh' 5012841Sgabeblack@google.com 5112841Sgabeblack@google.com cxx_exports = [ 5212841Sgabeblack@google.com PyBindMethod("addEventProbe"), 5312841Sgabeblack@google.com ] 5412841Sgabeblack@google.com 5512841Sgabeblack@google.com # To prevent cycles in the configuration hierarchy, we don't keep 5612841Sgabeblack@google.com # a list of supported events as a configuration param. Instead, we 5712841Sgabeblack@google.com # keep them in a local list and register them using the 5812841Sgabeblack@google.com # addEventProbe interface when other SimObjects register their 5912841Sgabeblack@google.com # probe listeners. 6012841Sgabeblack@google.com _deferred_event_types = [] 6112841Sgabeblack@google.com # Override the normal SimObject::regProbeListeners method and 6212841Sgabeblack@google.com # register deferred event handlers. 6312841Sgabeblack@google.com def regProbeListeners(self): 6412841Sgabeblack@google.com for event_id, obj, name in self._deferred_event_types: 6512841Sgabeblack@google.com self.getCCObject().addEventProbe(event_id, obj.getCCObject(), name) 6612841Sgabeblack@google.com 6712841Sgabeblack@google.com self.getCCObject().regProbeListeners() 6812841Sgabeblack@google.com 6912841Sgabeblack@google.com def addEventProbe(self, event_id, obj, *args): 7012841Sgabeblack@google.com """Add a probe-based event to the PMU if obj is not None.""" 7112841Sgabeblack@google.com 7212841Sgabeblack@google.com if obj is None: 7312841Sgabeblack@google.com return 7412841Sgabeblack@google.com 7512841Sgabeblack@google.com for name in args: 76 self._deferred_event_types.append((event_id, obj, name)) 77 78 def addArchEvents(self, 79 cpu=None, 80 itb=None, dtb=None, 81 icache=None, dcache=None, 82 l2cache=None): 83 """Add architected events to the PMU. 84 85 This method can be called multiple times with only a subset of 86 the keyword arguments set. This enables event registration in 87 configuration scripts to happen closer to the instantiation of 88 the instrumented objects (e.g., the memory system) instead of 89 a central point. 90 91 CPU events should also be registered once per CPU that is 92 sharing the PMU (e.g., when switching between CPU models). 93 """ 94 95 bpred = cpu.branchPred if cpu and not isNullPointer(cpu.branchPred) \ 96 else None 97 98 # 0x01: L1I_CACHE_REFILL 99 self.addEventProbe(0x02, itb, "Refills") 100 # 0x03: L2D_CACHE_REFILL 101 # 0x04: L1D_CACHE 102 self.addEventProbe(0x05, dtb, "Refills") 103 self.addEventProbe(0x06, cpu, "RetiredLoads") 104 self.addEventProbe(0x07, cpu, "RetiredStores") 105 self.addEventProbe(0x08, cpu, "RetiredInsts") 106 # 0x09: EXC_TAKEN 107 # 0x0A: EXC_RETURN 108 # 0x0B: CID_WRITE_RETIRED 109 self.addEventProbe(0x0C, cpu, "RetiredBranches") 110 # 0x0D: BR_IMMED_RETIRED 111 # 0x0E: BR_RETURN_RETIRED 112 # 0x0F: UNALIGEND_LDST_RETIRED 113 self.addEventProbe(0x10, bpred, "Misses") 114 self.addEventProbe(0x11, cpu, "Cycles") 115 self.addEventProbe(0x12, bpred, "Branches") 116 self.addEventProbe(0x13, cpu, "RetiredLoads", "RetiredStores") 117 # 0x14: L1I_CACHE 118 # 0x15: L1D_CACHE_WB 119 # 0x16: L2D_CACHE 120 # 0x17: L2D_CACHE_REFILL 121 # 0x18: L2D_CACHE_WB 122 # 0x19: BUS_ACCESS 123 # 0x1A: MEMORY_ERROR 124 # 0x1B: INST_SPEC 125 # 0x1C: TTBR_WRITE_RETIRED 126 # 0x1D: BUS_CYCLES 127 # 0x1E: CHAIN 128 # 0x1F: L1D_CACHE_ALLOCATE 129 # 0x20: L2D_CACHE_ALLOCATE 130 131 platform = Param.Platform(Parent.any, "Platform this device is part of.") 132 eventCounters = Param.Int(31, "Number of supported PMU counters") 133 pmuInterrupt = Param.Int(68, "PMU GIC interrupt number") 134